2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/of_gpio.h>
25 #include <video/of_display_timing.h>
26 #include <linux/regulator/consumer.h>
27 #include <video/videomode.h>
29 #include <video/atmel_lcdc.h>
31 struct atmel_lcdfb_config
{
32 bool have_alt_pixclock
;
34 bool have_intensity_bit
;
37 /* LCD Controller info data structure, stored in device platform_data */
38 struct atmel_lcdfb_info
{
43 struct work_struct task
;
45 unsigned int smem_len
;
46 struct platform_device
*pdev
;
50 struct backlight_device
*backlight
;
54 u32 pseudo_palette
[16];
55 bool have_intensity_bit
;
57 struct atmel_lcdfb_pdata pdata
;
59 struct atmel_lcdfb_config
*config
;
60 struct regulator
*reg_lcd
;
63 struct atmel_lcdfb_power_ctrl_gpio
{
67 struct list_head list
;
70 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
71 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
73 /* configurable parameters */
74 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
75 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
76 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
78 static struct atmel_lcdfb_config at91sam9261_config
= {
80 .have_intensity_bit
= true,
83 static struct atmel_lcdfb_config at91sam9263_config
= {
84 .have_intensity_bit
= true,
87 static struct atmel_lcdfb_config at91sam9g10_config
= {
91 static struct atmel_lcdfb_config at91sam9g45_config
= {
92 .have_alt_pixclock
= true,
95 static struct atmel_lcdfb_config at91sam9g45es_config
= {
98 static struct atmel_lcdfb_config at91sam9rl_config
= {
99 .have_intensity_bit
= true,
102 static struct atmel_lcdfb_config at32ap_config
= {
106 static const struct platform_device_id atmel_lcdfb_devtypes
[] = {
108 .name
= "at91sam9261-lcdfb",
109 .driver_data
= (unsigned long)&at91sam9261_config
,
111 .name
= "at91sam9263-lcdfb",
112 .driver_data
= (unsigned long)&at91sam9263_config
,
114 .name
= "at91sam9g10-lcdfb",
115 .driver_data
= (unsigned long)&at91sam9g10_config
,
117 .name
= "at91sam9g45-lcdfb",
118 .driver_data
= (unsigned long)&at91sam9g45_config
,
120 .name
= "at91sam9g45es-lcdfb",
121 .driver_data
= (unsigned long)&at91sam9g45es_config
,
123 .name
= "at91sam9rl-lcdfb",
124 .driver_data
= (unsigned long)&at91sam9rl_config
,
126 .name
= "at32ap-lcdfb",
127 .driver_data
= (unsigned long)&at32ap_config
,
132 MODULE_DEVICE_TABLE(platform
, atmel_lcdfb_devtypes
);
134 static struct atmel_lcdfb_config
*
135 atmel_lcdfb_get_config(struct platform_device
*pdev
)
139 data
= platform_get_device_id(pdev
)->driver_data
;
141 return (struct atmel_lcdfb_config
*)data
;
144 #if defined(CONFIG_ARCH_AT91)
145 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
146 | FBINFO_PARTIAL_PAN_OK \
147 | FBINFO_HWACCEL_YPAN)
149 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
150 struct fb_var_screeninfo
*var
,
151 struct fb_info
*info
)
155 #elif defined(CONFIG_AVR32)
156 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
157 | FBINFO_PARTIAL_PAN_OK \
158 | FBINFO_HWACCEL_XPAN \
159 | FBINFO_HWACCEL_YPAN)
161 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
162 struct fb_var_screeninfo
*var
,
163 struct fb_info
*info
)
168 pixeloff
= (var
->xoffset
* info
->var
.bits_per_pixel
) & 0x1f;
170 dma2dcfg
= (info
->var
.xres_virtual
- info
->var
.xres
)
171 * info
->var
.bits_per_pixel
/ 8;
172 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
173 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
175 /* Update configuration */
176 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
177 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
178 | ATMEL_LCDC_DMAUPDT
);
182 static u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
183 | ATMEL_LCDC_POL_POSITIVE
184 | ATMEL_LCDC_ENA_PWMENABLE
;
186 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
188 /* some bl->props field just changed */
189 static int atmel_bl_update_status(struct backlight_device
*bl
)
191 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
192 int power
= sinfo
->bl_power
;
193 int brightness
= bl
->props
.brightness
;
195 /* REVISIT there may be a meaningful difference between
196 * fb_blank and power ... there seem to be some cases
197 * this doesn't handle correctly.
199 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
200 power
= bl
->props
.fb_blank
;
201 else if (bl
->props
.power
!= sinfo
->bl_power
)
202 power
= bl
->props
.power
;
204 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
205 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
206 else if (power
!= FB_BLANK_UNBLANK
)
209 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
210 if (contrast_ctr
& ATMEL_LCDC_POL_POSITIVE
)
211 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
212 brightness
? contrast_ctr
: 0);
214 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
216 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
221 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
223 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
225 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
228 static const struct backlight_ops atmel_lcdc_bl_ops
= {
229 .update_status
= atmel_bl_update_status
,
230 .get_brightness
= atmel_bl_get_brightness
,
233 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
235 struct backlight_properties props
;
236 struct backlight_device
*bl
;
238 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
240 if (sinfo
->backlight
)
243 memset(&props
, 0, sizeof(struct backlight_properties
));
244 props
.type
= BACKLIGHT_RAW
;
245 props
.max_brightness
= 0xff;
246 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
, sinfo
,
247 &atmel_lcdc_bl_ops
, &props
);
249 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
253 sinfo
->backlight
= bl
;
255 bl
->props
.power
= FB_BLANK_UNBLANK
;
256 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
257 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
260 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
262 if (!sinfo
->backlight
)
265 if (sinfo
->backlight
->ops
) {
266 sinfo
->backlight
->props
.power
= FB_BLANK_POWERDOWN
;
267 sinfo
->backlight
->ops
->update_status(sinfo
->backlight
);
269 backlight_device_unregister(sinfo
->backlight
);
274 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
276 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
279 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
285 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
287 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
289 /* contrast pwm can be 'inverted' */
290 if (pdata
->lcdcon_pol_negative
)
291 contrast_ctr
&= ~(ATMEL_LCDC_POL_POSITIVE
);
293 /* have some default contrast/backlight settings */
294 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
295 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
297 if (pdata
->lcdcon_is_backlight
)
298 init_backlight(sinfo
);
301 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info
*sinfo
, int on
)
304 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
306 if (pdata
->atmel_lcdfb_power_control
)
307 pdata
->atmel_lcdfb_power_control(pdata
, on
);
308 else if (sinfo
->reg_lcd
) {
310 ret
= regulator_enable(sinfo
->reg_lcd
);
312 dev_err(&sinfo
->pdev
->dev
,
313 "lcd regulator enable failed: %d\n", ret
);
315 ret
= regulator_disable(sinfo
->reg_lcd
);
317 dev_err(&sinfo
->pdev
->dev
,
318 "lcd regulator disable failed: %d\n", ret
);
323 static const struct fb_fix_screeninfo atmel_lcdfb_fix __initconst
= {
324 .type
= FB_TYPE_PACKED_PIXELS
,
325 .visual
= FB_VISUAL_TRUECOLOR
,
329 .accel
= FB_ACCEL_NONE
,
332 static unsigned long compute_hozval(struct atmel_lcdfb_info
*sinfo
,
335 unsigned long lcdcon2
;
338 if (!sinfo
->config
->have_hozval
)
341 lcdcon2
= lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
);
343 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
345 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
348 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
349 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
350 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
351 value
= DIV_ROUND_UP(value
, 4);
353 value
= DIV_ROUND_UP(value
, 8);
359 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info
*sinfo
)
361 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
363 /* Turn off the LCD controller and the DMA controller */
364 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
365 pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
367 /* Wait for the LCDC core to become idle */
368 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
371 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
374 static void atmel_lcdfb_stop(struct atmel_lcdfb_info
*sinfo
)
376 atmel_lcdfb_stop_nowait(sinfo
);
378 /* Wait for DMA engine to become idle... */
379 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
383 static void atmel_lcdfb_start(struct atmel_lcdfb_info
*sinfo
)
385 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
387 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, pdata
->default_dmacon
);
388 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
389 (pdata
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
)
393 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
394 struct fb_var_screeninfo
*var
)
396 struct atmel_lcdfb_info
*sinfo
= info
->par
;
397 struct fb_fix_screeninfo
*fix
= &info
->fix
;
398 unsigned long dma_addr
;
400 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
401 + var
->xoffset
* info
->var
.bits_per_pixel
/ 8);
405 /* Set framebuffer DMA base address and pixel offset */
406 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
408 atmel_lcdfb_update_dma2d(sinfo
, var
, info
);
411 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
413 struct fb_info
*info
= sinfo
->info
;
415 dma_free_wc(info
->device
, info
->fix
.smem_len
, info
->screen_base
,
416 info
->fix
.smem_start
);
420 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
421 * @sinfo: the frame buffer to allocate memory for
423 * This function is called only from the atmel_lcdfb_probe()
424 * so no locking by fb_info->mm_lock around smem_len setting is needed.
426 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
428 struct fb_info
*info
= sinfo
->info
;
429 struct fb_var_screeninfo
*var
= &info
->var
;
430 unsigned int smem_len
;
432 smem_len
= (var
->xres_virtual
* var
->yres_virtual
433 * ((var
->bits_per_pixel
+ 7) / 8));
434 info
->fix
.smem_len
= max(smem_len
, sinfo
->smem_len
);
436 info
->screen_base
= dma_alloc_wc(info
->device
, info
->fix
.smem_len
,
437 (dma_addr_t
*)&info
->fix
.smem_start
,
440 if (!info
->screen_base
) {
444 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
449 static const struct fb_videomode
*atmel_lcdfb_choose_mode(struct fb_var_screeninfo
*var
,
450 struct fb_info
*info
)
452 struct fb_videomode varfbmode
;
453 const struct fb_videomode
*fbmode
= NULL
;
455 fb_var_to_videomode(&varfbmode
, var
);
456 fbmode
= fb_find_nearest_mode(&varfbmode
, &info
->modelist
);
458 fb_videomode_to_var(var
, fbmode
);
464 * atmel_lcdfb_check_var - Validates a var passed in.
465 * @var: frame buffer variable screen structure
466 * @info: frame buffer structure that represents a single frame buffer
468 * Checks to see if the hardware supports the state requested by
469 * var passed in. This function does not alter the hardware
470 * state!!! This means the data stored in struct fb_info and
471 * struct atmel_lcdfb_info do not change. This includes the var
472 * inside of struct fb_info. Do NOT change these. This function
473 * can be called on its own if we intent to only test a mode and
474 * not actually set it. The stuff in modedb.c is a example of
475 * this. If the var passed in is slightly off by what the
476 * hardware can support then we alter the var PASSED in to what
477 * we can do. If the hardware doesn't support mode change a
478 * -EINVAL will be returned by the upper layers. You don't need
479 * to implement this function then. If you hardware doesn't
480 * support changing the resolution then this function is not
481 * needed. In this case the driver would just provide a var that
482 * represents the static state the screen is in.
484 * Returns negative errno on error, or zero on success.
486 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
487 struct fb_info
*info
)
489 struct device
*dev
= info
->device
;
490 struct atmel_lcdfb_info
*sinfo
= info
->par
;
491 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
492 unsigned long clk_value_khz
;
494 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
496 dev_dbg(dev
, "%s:\n", __func__
);
498 if (!(var
->pixclock
&& var
->bits_per_pixel
)) {
499 /* choose a suitable mode if possible */
500 if (!atmel_lcdfb_choose_mode(var
, info
)) {
501 dev_err(dev
, "needed value not specified\n");
506 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
507 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
508 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
509 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
511 if (PICOS2KHZ(var
->pixclock
) > clk_value_khz
) {
512 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
516 /* Do not allow to have real resoulution larger than virtual */
517 if (var
->xres
> var
->xres_virtual
)
518 var
->xres_virtual
= var
->xres
;
520 if (var
->yres
> var
->yres_virtual
)
521 var
->yres_virtual
= var
->yres
;
523 /* Force same alignment for each line */
524 var
->xres
= (var
->xres
+ 3) & ~3UL;
525 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
527 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
528 var
->transp
.msb_right
= 0;
529 var
->transp
.offset
= var
->transp
.length
= 0;
530 var
->xoffset
= var
->yoffset
= 0;
532 if (info
->fix
.smem_len
) {
533 unsigned int smem_len
= (var
->xres_virtual
* var
->yres_virtual
534 * ((var
->bits_per_pixel
+ 7) / 8));
535 if (smem_len
> info
->fix
.smem_len
) {
536 dev_err(dev
, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
537 info
->fix
.smem_len
, smem_len
);
542 /* Saturate vertical and horizontal timings at maximum values */
543 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
544 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
545 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
546 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
547 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
549 var
->right_margin
= min_t(u32
, var
->right_margin
,
550 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
551 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
552 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
553 var
->left_margin
= min_t(u32
, var
->left_margin
,
556 /* Some parameters can't be zero */
557 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
558 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
559 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
560 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
562 switch (var
->bits_per_pixel
) {
567 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
568 var
->red
.length
= var
->green
.length
= var
->blue
.length
569 = var
->bits_per_pixel
;
572 /* Older SOCs use IBGR:555 rather than BGR:565. */
573 if (sinfo
->config
->have_intensity_bit
)
574 var
->green
.length
= 5;
576 var
->green
.length
= 6;
578 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
580 var
->red
.offset
= var
->green
.length
+ 5;
581 var
->blue
.offset
= 0;
585 var
->blue
.offset
= var
->green
.length
+ 5;
587 var
->green
.offset
= 5;
588 var
->red
.length
= var
->blue
.length
= 5;
591 var
->transp
.offset
= 24;
592 var
->transp
.length
= 8;
595 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
597 var
->red
.offset
= 16;
598 var
->blue
.offset
= 0;
602 var
->blue
.offset
= 16;
604 var
->green
.offset
= 8;
605 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
608 dev_err(dev
, "color depth %d not supported\n",
609 var
->bits_per_pixel
);
619 static void atmel_lcdfb_reset(struct atmel_lcdfb_info
*sinfo
)
623 atmel_lcdfb_stop(sinfo
);
624 atmel_lcdfb_start(sinfo
);
628 * atmel_lcdfb_set_par - Alters the hardware state.
629 * @info: frame buffer structure that represents a single frame buffer
631 * Using the fb_var_screeninfo in fb_info we set the resolution
632 * of the this particular framebuffer. This function alters the
633 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
634 * not alter var in fb_info since we are using that data. This
635 * means we depend on the data in var inside fb_info to be
636 * supported by the hardware. atmel_lcdfb_check_var is always called
637 * before atmel_lcdfb_set_par to ensure this. Again if you can't
638 * change the resolution you don't need this function.
641 static int atmel_lcdfb_set_par(struct fb_info
*info
)
643 struct atmel_lcdfb_info
*sinfo
= info
->par
;
644 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
645 unsigned long hozval_linesz
;
647 unsigned long clk_value_khz
;
648 unsigned long bits_per_line
;
649 unsigned long pix_factor
= 2;
653 dev_dbg(info
->device
, "%s:\n", __func__
);
654 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
655 info
->var
.xres
, info
->var
.yres
,
656 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
658 atmel_lcdfb_stop_nowait(sinfo
);
660 if (info
->var
.bits_per_pixel
== 1)
661 info
->fix
.visual
= FB_VISUAL_MONO01
;
662 else if (info
->var
.bits_per_pixel
<= 8)
663 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
665 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
667 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
668 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
670 /* Re-initialize the DMA engine... */
671 dev_dbg(info
->device
, " * update DMA engine\n");
672 atmel_lcdfb_update_dma(info
, &info
->var
);
674 /* ...set frame size and burst length = 8 words (?) */
675 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
676 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
677 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
679 /* Now, the LCDC core... */
681 /* Set pixel clock */
682 if (sinfo
->config
->have_alt_pixclock
)
685 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
687 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
689 if (value
< pix_factor
) {
690 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
691 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
693 value
= (value
/ pix_factor
) - 1;
694 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n",
696 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
,
697 value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
699 KHZ2PICOS(clk_value_khz
/ (pix_factor
* (value
+ 1)));
700 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
701 PICOS2KHZ(info
->var
.pixclock
));
705 /* Initialize control register 2 */
706 value
= pdata
->default_lcdcon2
;
708 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
709 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
710 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
711 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
713 switch (info
->var
.bits_per_pixel
) {
714 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
715 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
716 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
717 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
718 case 15: /* fall through */
719 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
720 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
721 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
722 default: BUG(); break;
724 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
725 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
727 /* Vertical timing */
728 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
729 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
730 value
|= info
->var
.lower_margin
;
731 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
732 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
734 /* Horizontal timing */
735 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
736 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
737 value
|= (info
->var
.left_margin
- 1);
738 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
739 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
741 /* Horizontal value (aka line size) */
742 hozval_linesz
= compute_hozval(sinfo
, info
->var
.xres
);
745 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
746 value
|= info
->var
.yres
- 1;
747 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
748 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
750 /* FIFO Threshold: Use formula from data sheet */
751 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
752 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
754 /* Toggle LCD_MODE every frame */
755 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
757 /* Disable all interrupts */
758 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
759 /* Enable FIFO & DMA errors */
760 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
| ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
762 /* ...wait for DMA engine to become idle... */
763 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
766 atmel_lcdfb_start(sinfo
);
768 dev_dbg(info
->device
, " * DONE\n");
773 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
776 chan
>>= 16 - bf
->length
;
777 return chan
<< bf
->offset
;
781 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
782 * @regno: Which register in the CLUT we are programming
783 * @red: The red value which can be up to 16 bits wide
784 * @green: The green value which can be up to 16 bits wide
785 * @blue: The blue value which can be up to 16 bits wide.
786 * @transp: If supported the alpha value which can be up to 16 bits wide.
787 * @info: frame buffer info structure
789 * Set a single color register. The values supplied have a 16 bit
790 * magnitude which needs to be scaled in this function for the hardware.
791 * Things to take into consideration are how many color registers, if
792 * any, are supported with the current color visual. With truecolor mode
793 * no color palettes are supported. Here a pseudo palette is created
794 * which we store the value in pseudo_palette in struct fb_info. For
795 * pseudocolor mode we have a limited color palette. To deal with this
796 * we can program what color is displayed for a particular pixel value.
797 * DirectColor is similar in that we can program each color field. If
798 * we have a static colormap we don't need to implement this function.
800 * Returns negative errno on error, or zero on success. In an
801 * ideal world, this would have been the case, but as it turns
802 * out, the other drivers return 1 on failure, so that's what
805 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
806 unsigned int green
, unsigned int blue
,
807 unsigned int transp
, struct fb_info
*info
)
809 struct atmel_lcdfb_info
*sinfo
= info
->par
;
810 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
815 if (info
->var
.grayscale
)
816 red
= green
= blue
= (19595 * red
+ 38470 * green
817 + 7471 * blue
) >> 16;
819 switch (info
->fix
.visual
) {
820 case FB_VISUAL_TRUECOLOR
:
822 pal
= info
->pseudo_palette
;
824 val
= chan_to_field(red
, &info
->var
.red
);
825 val
|= chan_to_field(green
, &info
->var
.green
);
826 val
|= chan_to_field(blue
, &info
->var
.blue
);
833 case FB_VISUAL_PSEUDOCOLOR
:
835 if (sinfo
->config
->have_intensity_bit
) {
836 /* old style I+BGR:555 */
837 val
= ((red
>> 11) & 0x001f);
838 val
|= ((green
>> 6) & 0x03e0);
839 val
|= ((blue
>> 1) & 0x7c00);
842 * TODO: intensity bit. Maybe something like
843 * ~(red[10] ^ green[10] ^ blue[10]) & 1
846 /* new style BGR:565 / RGB:565 */
847 if (pdata
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
848 val
= ((blue
>> 11) & 0x001f);
849 val
|= ((red
>> 0) & 0xf800);
851 val
= ((red
>> 11) & 0x001f);
852 val
|= ((blue
>> 0) & 0xf800);
855 val
|= ((green
>> 5) & 0x07e0);
858 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
863 case FB_VISUAL_MONO01
:
865 val
= (regno
== 0) ? 0x00 : 0x1F;
866 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
876 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
877 struct fb_info
*info
)
879 dev_dbg(info
->device
, "%s\n", __func__
);
881 atmel_lcdfb_update_dma(info
, var
);
886 static int atmel_lcdfb_blank(int blank_mode
, struct fb_info
*info
)
888 struct atmel_lcdfb_info
*sinfo
= info
->par
;
890 switch (blank_mode
) {
891 case FB_BLANK_UNBLANK
:
892 case FB_BLANK_NORMAL
:
893 atmel_lcdfb_start(sinfo
);
895 case FB_BLANK_VSYNC_SUSPEND
:
896 case FB_BLANK_HSYNC_SUSPEND
:
898 case FB_BLANK_POWERDOWN
:
899 atmel_lcdfb_stop(sinfo
);
905 /* let fbcon do a soft blank for us */
906 return ((blank_mode
== FB_BLANK_NORMAL
) ? 1 : 0);
909 static struct fb_ops atmel_lcdfb_ops
= {
910 .owner
= THIS_MODULE
,
911 .fb_check_var
= atmel_lcdfb_check_var
,
912 .fb_set_par
= atmel_lcdfb_set_par
,
913 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
914 .fb_blank
= atmel_lcdfb_blank
,
915 .fb_pan_display
= atmel_lcdfb_pan_display
,
916 .fb_fillrect
= cfb_fillrect
,
917 .fb_copyarea
= cfb_copyarea
,
918 .fb_imageblit
= cfb_imageblit
,
921 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
923 struct fb_info
*info
= dev_id
;
924 struct atmel_lcdfb_info
*sinfo
= info
->par
;
927 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
928 if (status
& ATMEL_LCDC_UFLWI
) {
929 dev_warn(info
->device
, "FIFO underflow %#x\n", status
);
930 /* reset DMA and FIFO to avoid screen shifting */
931 schedule_work(&sinfo
->task
);
933 lcdc_writel(sinfo
, ATMEL_LCDC_ICR
, status
);
938 * LCD controller task (to reset the LCD)
940 static void atmel_lcdfb_task(struct work_struct
*work
)
942 struct atmel_lcdfb_info
*sinfo
=
943 container_of(work
, struct atmel_lcdfb_info
, task
);
945 atmel_lcdfb_reset(sinfo
);
948 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
950 struct fb_info
*info
= sinfo
->info
;
953 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
955 dev_info(info
->device
,
956 "%luKiB frame buffer at %08lx (mapped at %p)\n",
957 (unsigned long)info
->fix
.smem_len
/ 1024,
958 (unsigned long)info
->fix
.smem_start
,
961 /* Allocate colormap */
962 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
964 dev_err(info
->device
, "Alloc color map failed\n");
969 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
971 clk_prepare_enable(sinfo
->bus_clk
);
972 clk_prepare_enable(sinfo
->lcdc_clk
);
975 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
977 clk_disable_unprepare(sinfo
->bus_clk
);
978 clk_disable_unprepare(sinfo
->lcdc_clk
);
982 static const struct of_device_id atmel_lcdfb_dt_ids
[] = {
983 { .compatible
= "atmel,at91sam9261-lcdc" , .data
= &at91sam9261_config
, },
984 { .compatible
= "atmel,at91sam9263-lcdc" , .data
= &at91sam9263_config
, },
985 { .compatible
= "atmel,at91sam9g10-lcdc" , .data
= &at91sam9g10_config
, },
986 { .compatible
= "atmel,at91sam9g45-lcdc" , .data
= &at91sam9g45_config
, },
987 { .compatible
= "atmel,at91sam9g45es-lcdc" , .data
= &at91sam9g45es_config
, },
988 { .compatible
= "atmel,at91sam9rl-lcdc" , .data
= &at91sam9rl_config
, },
989 { .compatible
= "atmel,at32ap-lcdc" , .data
= &at32ap_config
, },
993 MODULE_DEVICE_TABLE(of
, atmel_lcdfb_dt_ids
);
995 static const char *atmel_lcdfb_wiring_modes
[] = {
996 [ATMEL_LCDC_WIRING_BGR
] = "BRG",
997 [ATMEL_LCDC_WIRING_RGB
] = "RGB",
1000 static int atmel_lcdfb_get_of_wiring_modes(struct device_node
*np
)
1005 err
= of_property_read_string(np
, "atmel,lcd-wiring-mode", &mode
);
1007 return ATMEL_LCDC_WIRING_BGR
;
1009 for (i
= 0; i
< ARRAY_SIZE(atmel_lcdfb_wiring_modes
); i
++)
1010 if (!strcasecmp(mode
, atmel_lcdfb_wiring_modes
[i
]))
1016 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata
*pdata
, int on
)
1018 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1020 list_for_each_entry(og
, &pdata
->pwr_gpios
, list
)
1021 gpio_set_value(og
->gpio
, on
);
1024 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1026 struct fb_info
*info
= sinfo
->info
;
1027 struct atmel_lcdfb_pdata
*pdata
= &sinfo
->pdata
;
1028 struct fb_var_screeninfo
*var
= &info
->var
;
1029 struct device
*dev
= &sinfo
->pdev
->dev
;
1030 struct device_node
*np
=dev
->of_node
;
1031 struct device_node
*display_np
;
1032 struct device_node
*timings_np
;
1033 struct display_timings
*timings
;
1034 enum of_gpio_flags flags
;
1035 struct atmel_lcdfb_power_ctrl_gpio
*og
;
1036 bool is_gpio_power
= false;
1040 sinfo
->config
= (struct atmel_lcdfb_config
*)
1041 of_match_device(atmel_lcdfb_dt_ids
, dev
)->data
;
1043 display_np
= of_parse_phandle(np
, "display", 0);
1045 dev_err(dev
, "failed to find display phandle\n");
1049 ret
= of_property_read_u32(display_np
, "bits-per-pixel", &var
->bits_per_pixel
);
1051 dev_err(dev
, "failed to get property bits-per-pixel\n");
1052 goto put_display_node
;
1055 ret
= of_property_read_u32(display_np
, "atmel,guard-time", &pdata
->guard_time
);
1057 dev_err(dev
, "failed to get property atmel,guard-time\n");
1058 goto put_display_node
;
1061 ret
= of_property_read_u32(display_np
, "atmel,lcdcon2", &pdata
->default_lcdcon2
);
1063 dev_err(dev
, "failed to get property atmel,lcdcon2\n");
1064 goto put_display_node
;
1067 ret
= of_property_read_u32(display_np
, "atmel,dmacon", &pdata
->default_dmacon
);
1069 dev_err(dev
, "failed to get property bits-per-pixel\n");
1070 goto put_display_node
;
1073 INIT_LIST_HEAD(&pdata
->pwr_gpios
);
1075 for (i
= 0; i
< of_gpio_named_count(display_np
, "atmel,power-control-gpio"); i
++) {
1076 gpio
= of_get_named_gpio_flags(display_np
, "atmel,power-control-gpio",
1081 og
= devm_kzalloc(dev
, sizeof(*og
), GFP_KERNEL
);
1083 goto put_display_node
;
1086 og
->active_low
= flags
& OF_GPIO_ACTIVE_LOW
;
1087 is_gpio_power
= true;
1088 ret
= devm_gpio_request(dev
, gpio
, "lcd-power-control-gpio");
1090 dev_err(dev
, "request gpio %d failed\n", gpio
);
1091 goto put_display_node
;
1094 ret
= gpio_direction_output(gpio
, og
->active_low
);
1096 dev_err(dev
, "set direction output gpio %d failed\n", gpio
);
1097 goto put_display_node
;
1099 list_add(&og
->list
, &pdata
->pwr_gpios
);
1103 pdata
->atmel_lcdfb_power_control
= atmel_lcdfb_power_control_gpio
;
1105 ret
= atmel_lcdfb_get_of_wiring_modes(display_np
);
1107 dev_err(dev
, "invalid atmel,lcd-wiring-mode\n");
1108 goto put_display_node
;
1110 pdata
->lcd_wiring_mode
= ret
;
1112 pdata
->lcdcon_is_backlight
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight");
1113 pdata
->lcdcon_pol_negative
= of_property_read_bool(display_np
, "atmel,lcdcon-backlight-inverted");
1115 timings
= of_get_display_timings(display_np
);
1117 dev_err(dev
, "failed to get display timings\n");
1119 goto put_display_node
;
1122 timings_np
= of_get_child_by_name(display_np
, "display-timings");
1124 dev_err(dev
, "failed to find display-timings node\n");
1126 goto put_display_node
;
1129 for (i
= 0; i
< of_get_child_count(timings_np
); i
++) {
1130 struct videomode vm
;
1131 struct fb_videomode fb_vm
;
1133 ret
= videomode_from_timings(timings
, &vm
, i
);
1135 goto put_timings_node
;
1136 ret
= fb_videomode_from_videomode(&vm
, &fb_vm
);
1138 goto put_timings_node
;
1140 fb_add_videomode(&fb_vm
, &info
->modelist
);
1144 * FIXME: Make sure we are not referencing any fields in display_np
1145 * and timings_np and drop our references to them before returning to
1146 * avoid leaking the nodes on probe deferral and driver unbind.
1152 of_node_put(timings_np
);
1154 of_node_put(display_np
);
1158 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info
*sinfo
)
1164 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
1166 struct device
*dev
= &pdev
->dev
;
1167 struct fb_info
*info
;
1168 struct atmel_lcdfb_info
*sinfo
;
1169 struct atmel_lcdfb_pdata
*pdata
= NULL
;
1170 struct resource
*regs
= NULL
;
1171 struct resource
*map
= NULL
;
1172 struct fb_modelist
*modelist
;
1175 dev_dbg(dev
, "%s BEGIN\n", __func__
);
1178 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
1180 dev_err(dev
, "cannot allocate memory\n");
1188 INIT_LIST_HEAD(&info
->modelist
);
1190 if (pdev
->dev
.of_node
) {
1191 ret
= atmel_lcdfb_of_init(sinfo
);
1194 } else if (dev_get_platdata(dev
)) {
1195 struct fb_monspecs
*monspecs
;
1198 pdata
= dev_get_platdata(dev
);
1199 monspecs
= pdata
->default_monspecs
;
1200 sinfo
->pdata
= *pdata
;
1202 for (i
= 0; i
< monspecs
->modedb_len
; i
++)
1203 fb_add_videomode(&monspecs
->modedb
[i
], &info
->modelist
);
1205 sinfo
->config
= atmel_lcdfb_get_config(pdev
);
1207 info
->var
.bits_per_pixel
= pdata
->default_bpp
? pdata
->default_bpp
: 16;
1208 memcpy(&info
->monspecs
, pdata
->default_monspecs
, sizeof(info
->monspecs
));
1210 dev_err(dev
, "cannot get default configuration\n");
1217 sinfo
->reg_lcd
= devm_regulator_get(&pdev
->dev
, "lcd");
1218 if (IS_ERR(sinfo
->reg_lcd
))
1219 sinfo
->reg_lcd
= NULL
;
1221 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
1222 info
->pseudo_palette
= sinfo
->pseudo_palette
;
1223 info
->fbops
= &atmel_lcdfb_ops
;
1225 info
->fix
= atmel_lcdfb_fix
;
1226 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
1228 /* Enable LCDC Clocks */
1229 sinfo
->bus_clk
= clk_get(dev
, "hclk");
1230 if (IS_ERR(sinfo
->bus_clk
)) {
1231 ret
= PTR_ERR(sinfo
->bus_clk
);
1234 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
1235 if (IS_ERR(sinfo
->lcdc_clk
)) {
1236 ret
= PTR_ERR(sinfo
->lcdc_clk
);
1239 atmel_lcdfb_start_clock(sinfo
);
1241 modelist
= list_first_entry(&info
->modelist
,
1242 struct fb_modelist
, list
);
1243 fb_videomode_to_var(&info
->var
, &modelist
->mode
);
1245 atmel_lcdfb_check_var(&info
->var
, info
);
1247 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1249 dev_err(dev
, "resources unusable\n");
1254 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
1255 if (sinfo
->irq_base
< 0) {
1256 dev_err(dev
, "unable to get irq\n");
1257 ret
= sinfo
->irq_base
;
1261 /* Initialize video memory */
1262 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1264 /* use a pre-allocated memory buffer */
1265 info
->fix
.smem_start
= map
->start
;
1266 info
->fix
.smem_len
= resource_size(map
);
1267 if (!request_mem_region(info
->fix
.smem_start
,
1268 info
->fix
.smem_len
, pdev
->name
)) {
1273 info
->screen_base
= ioremap_wc(info
->fix
.smem_start
,
1274 info
->fix
.smem_len
);
1275 if (!info
->screen_base
) {
1277 goto release_intmem
;
1281 * Don't clear the framebuffer -- someone may have set
1282 * up a splash image.
1285 /* allocate memory buffer */
1286 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
1288 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
1293 /* LCDC registers */
1294 info
->fix
.mmio_start
= regs
->start
;
1295 info
->fix
.mmio_len
= resource_size(regs
);
1297 if (!request_mem_region(info
->fix
.mmio_start
,
1298 info
->fix
.mmio_len
, pdev
->name
)) {
1303 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1305 dev_err(dev
, "cannot map LCDC registers\n");
1310 /* Initialize PWM for contrast or backlight ("off") */
1311 init_contrast(sinfo
);
1314 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
1316 dev_err(dev
, "request_irq failed: %d\n", ret
);
1320 /* Some operations on the LCDC might sleep and
1321 * require a preemptible task context */
1322 INIT_WORK(&sinfo
->task
, atmel_lcdfb_task
);
1324 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
1326 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
1327 goto unregister_irqs
;
1330 ret
= atmel_lcdfb_set_par(info
);
1332 dev_err(dev
, "set par failed: %d\n", ret
);
1333 goto unregister_irqs
;
1336 dev_set_drvdata(dev
, info
);
1339 * Tell the world that we're ready to go
1341 ret
= register_framebuffer(info
);
1343 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
1347 /* Power up the LCDC screen */
1348 atmel_lcdfb_power_control(sinfo
, 1);
1350 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1351 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
1356 dev_set_drvdata(dev
, NULL
);
1357 fb_dealloc_cmap(&info
->cmap
);
1359 cancel_work_sync(&sinfo
->task
);
1360 free_irq(sinfo
->irq_base
, info
);
1362 exit_backlight(sinfo
);
1363 iounmap(sinfo
->mmio
);
1365 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1368 iounmap(info
->screen_base
);
1370 atmel_lcdfb_free_video_memory(sinfo
);
1374 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1376 atmel_lcdfb_stop_clock(sinfo
);
1377 clk_put(sinfo
->lcdc_clk
);
1379 clk_put(sinfo
->bus_clk
);
1381 framebuffer_release(info
);
1383 dev_dbg(dev
, "%s FAILED\n", __func__
);
1387 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
1389 struct device
*dev
= &pdev
->dev
;
1390 struct fb_info
*info
= dev_get_drvdata(dev
);
1391 struct atmel_lcdfb_info
*sinfo
;
1392 struct atmel_lcdfb_pdata
*pdata
;
1394 if (!info
|| !info
->par
)
1397 pdata
= &sinfo
->pdata
;
1399 cancel_work_sync(&sinfo
->task
);
1400 exit_backlight(sinfo
);
1401 atmel_lcdfb_power_control(sinfo
, 0);
1402 unregister_framebuffer(info
);
1403 atmel_lcdfb_stop_clock(sinfo
);
1404 clk_put(sinfo
->lcdc_clk
);
1405 clk_put(sinfo
->bus_clk
);
1406 fb_dealloc_cmap(&info
->cmap
);
1407 free_irq(sinfo
->irq_base
, info
);
1408 iounmap(sinfo
->mmio
);
1409 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1410 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
1411 iounmap(info
->screen_base
);
1412 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1414 atmel_lcdfb_free_video_memory(sinfo
);
1417 framebuffer_release(info
);
1424 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1426 struct fb_info
*info
= platform_get_drvdata(pdev
);
1427 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1430 * We don't want to handle interrupts while the clock is
1431 * stopped. It may take forever.
1433 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
1435 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_CTR
);
1436 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
1437 atmel_lcdfb_power_control(sinfo
, 0);
1438 atmel_lcdfb_stop(sinfo
);
1439 atmel_lcdfb_stop_clock(sinfo
);
1444 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
1446 struct fb_info
*info
= platform_get_drvdata(pdev
);
1447 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1449 atmel_lcdfb_start_clock(sinfo
);
1450 atmel_lcdfb_start(sinfo
);
1451 atmel_lcdfb_power_control(sinfo
, 1);
1452 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
1454 /* Enable FIFO & DMA errors */
1455 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
1456 | ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
1462 #define atmel_lcdfb_suspend NULL
1463 #define atmel_lcdfb_resume NULL
1466 static struct platform_driver atmel_lcdfb_driver
= {
1467 .remove
= __exit_p(atmel_lcdfb_remove
),
1468 .suspend
= atmel_lcdfb_suspend
,
1469 .resume
= atmel_lcdfb_resume
,
1470 .id_table
= atmel_lcdfb_devtypes
,
1472 .name
= "atmel_lcdfb",
1473 .of_match_table
= of_match_ptr(atmel_lcdfb_dt_ids
),
1477 module_platform_driver_probe(atmel_lcdfb_driver
, atmel_lcdfb_probe
);
1479 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1480 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1481 MODULE_LICENSE("GPL");