sound/soc/spear/spdif_out_regs.h

   1 /*
   2  * SPEAr SPDIF OUT controller header file
   3  *
   4  * Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com)
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19  */
  20
  21 #ifndef SPDIF_OUT_REGS_H
  22 #define SPDIF_OUT_REGS_H
  23
  24 #define SPDIF_OUT_SOFT_RST      0x00
  25         #define SPDIF_OUT_RESET         (1 << 0)
  26 #define SPDIF_OUT_FIFO_DATA     0x04
  27 #define SPDIF_OUT_INT_STA       0x08
  28 #define SPDIF_OUT_INT_STA_CLR   0x0C
  29         #define SPDIF_INT_UNDERFLOW     (1 << 0)
  30         #define SPDIF_INT_EODATA        (1 << 1)
  31         #define SPDIF_INT_EOBLOCK       (1 << 2)
  32         #define SPDIF_INT_EOLATENCY     (1 << 3)
  33         #define SPDIF_INT_EOPD_DATA     (1 << 4)
  34         #define SPDIF_INT_MEMFULLREAD   (1 << 5)
  35         #define SPDIF_INT_EOPD_PAUSE    (1 << 6)
  36
  37 #define SPDIF_OUT_INT_EN        0x10
  38 #define SPDIF_OUT_INT_EN_SET    0x14
  39 #define SPDIF_OUT_INT_EN_CLR    0x18
  40 #define SPDIF_OUT_CTRL          0x1C
  41         #define SPDIF_OPMODE_MASK       (7 << 0)
  42         #define SPDIF_OPMODE_OFF        (0 << 0)
  43         #define SPDIF_OPMODE_MUTE_PCM   (1 << 0)
  44         #define SPDIF_OPMODE_MUTE_PAUSE (2 << 0)
  45         #define SPDIF_OPMODE_AUD_DATA   (3 << 0)
  46         #define SPDIF_OPMODE_ENCODE     (4 << 0)
  47         #define SPDIF_STATE_NORMAL      (1 << 3)
  48         #define SPDIF_DIVIDER_MASK      (0xff << 5)
  49         #define SPDIF_DIVIDER_SHIFT     (5)
  50         #define SPDIF_SAMPLEREAD_MASK   (0x1ffff << 15)
  51         #define SPDIF_SAMPLEREAD_SHIFT  (15)
  52 #define SPDIF_OUT_STA           0x20
  53 #define SPDIF_OUT_PA_PB         0x24
  54 #define SPDIF_OUT_PC_PD         0x28
  55 #define SPDIF_OUT_CL1           0x2C
  56 #define SPDIF_OUT_CR1           0x30
  57 #define SPDIF_OUT_CL2_CR2_UV    0x34
  58 #define SPDIF_OUT_PAUSE_LAT     0x38
  59 #define SPDIF_OUT_FRMLEN_BRST   0x3C
  60 #define SPDIF_OUT_CFG           0x40
  61         #define SPDIF_OUT_MEMFMT_16_0   (0 << 5)
  62         #define SPDIF_OUT_MEMFMT_16_16  (1 << 5)
  63         #define SPDIF_OUT_VALID_DMA     (0 << 3)
  64         #define SPDIF_OUT_VALID_HW      (1 << 3)
  65         #define SPDIF_OUT_USER_DMA      (0 << 2)
  66         #define SPDIF_OUT_USER_HW       (1 << 2)
  67         #define SPDIF_OUT_CHNLSTA_DMA   (0 << 1)
  68         #define SPDIF_OUT_CHNLSTA_HW    (1 << 1)
  69         #define SPDIF_OUT_PARITY_HW     (0 << 0)
  70         #define SPDIF_OUT_PARITY_DMA    (1 << 0)
  71         #define SPDIF_OUT_FDMA_TRIG_2   (2 << 8)
  72         #define SPDIF_OUT_FDMA_TRIG_6   (6 << 8)
  73         #define SPDIF_OUT_FDMA_TRIG_8   (8 << 8)
  74         #define SPDIF_OUT_FDMA_TRIG_10  (10 << 8)
  75         #define SPDIF_OUT_FDMA_TRIG_12  (12 << 8)
  76         #define SPDIF_OUT_FDMA_TRIG_16  (16 << 8)
  77         #define SPDIF_OUT_FDMA_TRIG_18  (18 << 8)
  78
  79 #endif /* SPDIF_OUT_REGS_H */