3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 #include <linux/sched.h>
31 #include <asm/mach-au1x00/au1000.h>
32 #include <asm/mach-db1x00/bcsr.h>
34 #ifdef CONFIG_MIPS_PB1200
35 #include <asm/mach-pb1x00/pb1200.h>
38 #ifdef CONFIG_MIPS_DB1200
39 #include <asm/mach-db1x00/db1200.h>
40 #define PB1200_INT_BEGIN DB1200_INT_BEGIN
41 #define PB1200_INT_END DB1200_INT_END
46 const char *get_system_type(void)
48 return "Alchemy Pb1200";
51 void __init
board_setup(void)
53 printk(KERN_INFO
"AMD Alchemy Pb1200 Board\n");
54 bcsr_init(PB1200_BCSR_PHYS_ADDR
,
55 PB1200_BCSR_PHYS_ADDR
+ PB1200_BCSR_HEXLED_OFS
);
62 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
63 * but it is board specific code, so put it here.
65 pin_func
= au_readl(SYS_PINFUNC
);
67 pin_func
|= SYS_PF_MUST_BE_SET
| SYS_PF_PSC1_S1
;
68 au_writel(pin_func
, SYS_PINFUNC
);
70 au_writel(0, (u32
)bcsr
| 0x10); /* turn off PCMCIA power */
75 #if defined(CONFIG_I2C_AU1550)
80 /* Select SMBus in CPLD */
81 bcsr_mod(BCSR_RESETS
, BCSR_RESETS_PSC0MUX
, 0);
83 pin_func
= au_readl(SYS_PINFUNC
);
85 pin_func
&= ~(SYS_PINFUNC_P0A
| SYS_PINFUNC_P0B
);
86 /* Set GPIOs correctly */
88 au_writel(pin_func
, SYS_PINFUNC
);
91 /* The I2C driver depends on 50 MHz clock */
92 freq0
= au_readl(SYS_FREQCTRL0
);
94 freq0
&= ~(SYS_FC_FRDIV1_MASK
| SYS_FC_FS1
| SYS_FC_FE1
);
95 freq0
|= 3 << SYS_FC_FRDIV1_BIT
;
96 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
97 au_writel(freq0
, SYS_FREQCTRL0
);
100 au_writel(freq0
, SYS_FREQCTRL0
);
103 clksrc
= au_readl(SYS_CLKSRC
);
105 clksrc
&= ~(SYS_CS_CE0
| SYS_CS_DE0
| SYS_CS_ME0_MASK
);
106 /* Bit 22 is EXTCLK0 for PSC0 */
107 clksrc
|= SYS_CS_MUX_FQ1
<< SYS_CS_ME0_BIT
;
108 au_writel(clksrc
, SYS_CLKSRC
);
114 * The Pb1200 development board uses external MUX for PSC0 to
115 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
117 #ifdef CONFIG_I2C_AU1550
118 bcsr_mod(BCSR_RESETS
, BCSR_RESETS_PSC0MUX
, 0);
123 static int __init
pb1200_init_irq(void)
125 /* We have a problem with CPLD rev 3. */
126 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI
)) <= 3) {
127 printk(KERN_ERR
"WARNING!!!\n");
128 printk(KERN_ERR
"WARNING!!!\n");
129 printk(KERN_ERR
"WARNING!!!\n");
130 printk(KERN_ERR
"WARNING!!!\n");
131 printk(KERN_ERR
"WARNING!!!\n");
132 printk(KERN_ERR
"WARNING!!!\n");
133 printk(KERN_ERR
"Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
134 printk(KERN_ERR
"updated to latest revision. This software will\n");
135 printk(KERN_ERR
"not work on anything less than CPLD rev 4.\n");
136 printk(KERN_ERR
"WARNING!!!\n");
137 printk(KERN_ERR
"WARNING!!!\n");
138 printk(KERN_ERR
"WARNING!!!\n");
139 printk(KERN_ERR
"WARNING!!!\n");
140 printk(KERN_ERR
"WARNING!!!\n");
141 printk(KERN_ERR
"WARNING!!!\n");
142 panic("Game over. Your score is 0.");
145 irq_set_irq_type(AU1200_GPIO7_INT
, IRQF_TRIGGER_LOW
);
146 bcsr_init_irq(PB1200_INT_BEGIN
, PB1200_INT_END
, AU1200_GPIO7_INT
);
150 arch_initcall(pb1200_init_irq
);
153 int board_au1200fb_panel(void)
155 return (bcsr_read(BCSR_SWITCHES
) >> 8) & 0x0f;
158 int board_au1200fb_panel_init(void)
161 bcsr_mod(BCSR_BOARD
, 0, BCSR_BOARD_LCDVEE
| BCSR_BOARD_LCDVDD
|
163 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
167 int board_au1200fb_panel_shutdown(void)
170 bcsr_mod(BCSR_BOARD
, BCSR_BOARD_LCDVEE
| BCSR_BOARD_LCDVDD
|
171 BCSR_BOARD_LCDBL
, 0);
172 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */