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Staging: unisys: Remove RETINT macro
[linux/fpc-iii.git] / sound / pci / hda / patch_sigmatel.c
blob3bc29c9b25296d6ed058eaf552bf71bdba356cab
1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
39 #include "hda_beep.h"
40 #include "hda_jack.h"
41 #include "hda_generic.h"
42
43 enum {
44 STAC_VREF_EVENT = 8,
45 STAC_PWR_EVENT,
46 };
47
48 enum {
49 STAC_REF,
50 STAC_9200_OQO,
51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
61 STAC_9200_M4,
62 STAC_9200_M4_2,
63 STAC_9200_PANASONIC,
64 STAC_9200_EAPD_INIT,
65 STAC_9200_MODELS
66 };
67
68 enum {
69 STAC_9205_REF,
70 STAC_9205_DELL_M42,
71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
73 STAC_9205_EAPD,
74 STAC_9205_MODELS
75 };
76
77 enum {
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
79 STAC_92HD73XX_REF,
80 STAC_92HD73XX_INTEL,
81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
84 STAC_DELL_EQ,
85 STAC_ALIENWARE_M17X,
86 STAC_92HD89XX_HP_FRONT_JACK,
87 STAC_92HD73XX_MODELS
88 };
89
90 enum {
91 STAC_92HD83XXX_REF,
92 STAC_92HD83XXX_PWR_REF,
93 STAC_DELL_S14,
94 STAC_DELL_VOSTRO_3500,
95 STAC_92HD83XXX_HP_cNB11_INTQUAD,
96 STAC_HP_DV7_4000,
97 STAC_HP_ZEPHYR,
98 STAC_92HD83XXX_HP_LED,
99 STAC_92HD83XXX_HP_INV_LED,
100 STAC_92HD83XXX_HP_MIC_LED,
101 STAC_HP_LED_GPIO10,
102 STAC_92HD83XXX_HEADSET_JACK,
103 STAC_92HD83XXX_HP,
104 STAC_HP_ENVY_BASS,
105 STAC_HP_BNB13_EQ,
106 STAC_92HD83XXX_MODELS
107 };
108
109 enum {
110 STAC_92HD71BXX_REF,
111 STAC_DELL_M4_1,
112 STAC_DELL_M4_2,
113 STAC_DELL_M4_3,
114 STAC_HP_M4,
115 STAC_HP_DV4,
116 STAC_HP_DV5,
117 STAC_HP_HDX,
118 STAC_92HD71BXX_HP,
119 STAC_92HD71BXX_NO_DMIC,
120 STAC_92HD71BXX_NO_SMUX,
121 STAC_92HD71BXX_MODELS
122 };
123
124 enum {
125 STAC_925x_REF,
126 STAC_M1,
127 STAC_M1_2,
128 STAC_M2,
129 STAC_M2_2,
130 STAC_M3,
131 STAC_M5,
132 STAC_M6,
133 STAC_925x_MODELS
134 };
135
136 enum {
137 STAC_D945_REF,
138 STAC_D945GTP3,
139 STAC_D945GTP5,
140 STAC_INTEL_MAC_V1,
141 STAC_INTEL_MAC_V2,
142 STAC_INTEL_MAC_V3,
143 STAC_INTEL_MAC_V4,
144 STAC_INTEL_MAC_V5,
145 STAC_INTEL_MAC_AUTO,
146 STAC_ECS_202,
147 STAC_922X_DELL_D81,
148 STAC_922X_DELL_D82,
149 STAC_922X_DELL_M81,
150 STAC_922X_DELL_M82,
151 STAC_922X_INTEL_MAC_GPIO,
152 STAC_922X_MODELS
153 };
154
155 enum {
156 STAC_D965_REF_NO_JD, /* no jack-detection */
157 STAC_D965_REF,
158 STAC_D965_3ST,
159 STAC_D965_5ST,
160 STAC_D965_5ST_NO_FP,
161 STAC_D965_VERBS,
162 STAC_DELL_3ST,
163 STAC_DELL_BIOS,
164 STAC_DELL_BIOS_AMIC,
165 STAC_DELL_BIOS_SPDIF,
166 STAC_927X_DELL_DMIC,
167 STAC_927X_VOLKNOB,
168 STAC_927X_MODELS
169 };
170
171 enum {
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174 };
175
176 struct sigmatel_spec {
177 struct hda_gen_spec gen;
178
179 unsigned int eapd_switch: 1;
180 unsigned int linear_tone_beep:1;
181 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
182 unsigned int volknob_init:1; /* special volume-knob initialization */
183 unsigned int powerdown_adcs:1;
184 unsigned int have_spdif_mux:1;
185
186 /* gpio lines */
187 unsigned int eapd_mask;
188 unsigned int gpio_mask;
189 unsigned int gpio_dir;
190 unsigned int gpio_data;
191 unsigned int gpio_mute;
192 unsigned int gpio_led;
193 unsigned int gpio_led_polarity;
194 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
195 unsigned int vref_led;
196 int default_polarity;
197
198 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
199 unsigned int mic_enabled; /* current mic mute state (bitmask) */
200
201 /* stream */
202 unsigned int stream_delay;
203
204 /* analog loopback */
205 const struct snd_kcontrol_new *aloopback_ctl;
206 unsigned int aloopback;
207 unsigned char aloopback_mask;
208 unsigned char aloopback_shift;
209
210 /* power management */
211 unsigned int power_map_bits;
212 unsigned int num_pwrs;
213 const hda_nid_t *pwr_nids;
214 unsigned int active_adcs;
215
216 /* beep widgets */
217 hda_nid_t anabeep_nid;
218
219 /* SPDIF-out mux */
220 const char * const *spdif_labels;
221 struct hda_input_mux spdif_mux;
222 unsigned int cur_smux[2];
223 };
224
225 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
226 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
227
228 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
229 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
230 0x0f, 0x10, 0x11
231 };
232
233 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
234 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
235 0x0f, 0x10
236 };
237
238 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
239 0x0a, 0x0d, 0x0f
240 };
241
242
243 /*
244 * PCM hooks
245 */
246 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
247 struct hda_codec *codec,
248 struct snd_pcm_substream *substream,
249 int action)
250 {
251 struct sigmatel_spec *spec = codec->spec;
252 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
253 msleep(spec->stream_delay);
254 }
255
256 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
257 struct hda_codec *codec,
258 struct snd_pcm_substream *substream,
259 int action)
260 {
261 struct sigmatel_spec *spec = codec->spec;
262 int i, idx = 0;
263
264 if (!spec->powerdown_adcs)
265 return;
266
267 for (i = 0; i < spec->gen.num_all_adcs; i++) {
268 if (spec->gen.all_adcs[i] == hinfo->nid) {
269 idx = i;
270 break;
271 }
272 }
273
274 switch (action) {
275 case HDA_GEN_PCM_ACT_OPEN:
276 msleep(40);
277 snd_hda_codec_write(codec, hinfo->nid, 0,
278 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
279 spec->active_adcs |= (1 << idx);
280 break;
281 case HDA_GEN_PCM_ACT_CLOSE:
282 snd_hda_codec_write(codec, hinfo->nid, 0,
283 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
284 spec->active_adcs &= ~(1 << idx);
285 break;
286 }
287 }
288
289 /*
290 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
291 * funky external mute control using GPIO pins.
292 */
293
294 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
295 unsigned int dir_mask, unsigned int data)
296 {
297 unsigned int gpiostate, gpiomask, gpiodir;
298
299 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
300
301 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
302 AC_VERB_GET_GPIO_DATA, 0);
303 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
304
305 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
306 AC_VERB_GET_GPIO_MASK, 0);
307 gpiomask |= mask;
308
309 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
310 AC_VERB_GET_GPIO_DIRECTION, 0);
311 gpiodir |= dir_mask;
312
313 /* Configure GPIOx as CMOS */
314 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
315
316 snd_hda_codec_write(codec, codec->afg, 0,
317 AC_VERB_SET_GPIO_MASK, gpiomask);
318 snd_hda_codec_read(codec, codec->afg, 0,
319 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
320
321 msleep(1);
322
323 snd_hda_codec_read(codec, codec->afg, 0,
324 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
325 }
326
327 /* hook for controlling mic-mute LED GPIO */
328 static void stac_capture_led_hook(struct hda_codec *codec,
329 struct snd_kcontrol *kcontrol,
330 struct snd_ctl_elem_value *ucontrol)
331 {
332 struct sigmatel_spec *spec = codec->spec;
333 unsigned int mask;
334 bool cur_mute, prev_mute;
335
336 if (!kcontrol || !ucontrol)
337 return;
338
339 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
340 prev_mute = !spec->mic_enabled;
341 if (ucontrol->value.integer.value[0] ||
342 ucontrol->value.integer.value[1])
343 spec->mic_enabled |= mask;
344 else
345 spec->mic_enabled &= ~mask;
346 cur_mute = !spec->mic_enabled;
347 if (cur_mute != prev_mute) {
348 if (cur_mute)
349 spec->gpio_data |= spec->mic_mute_led_gpio;
350 else
351 spec->gpio_data &= ~spec->mic_mute_led_gpio;
352 stac_gpio_set(codec, spec->gpio_mask,
353 spec->gpio_dir, spec->gpio_data);
354 }
355 }
356
357 static int stac_vrefout_set(struct hda_codec *codec,
358 hda_nid_t nid, unsigned int new_vref)
359 {
360 int error, pinctl;
361
362 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
363 pinctl = snd_hda_codec_read(codec, nid, 0,
364 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
365
366 if (pinctl < 0)
367 return pinctl;
368
369 pinctl &= 0xff;
370 pinctl &= ~AC_PINCTL_VREFEN;
371 pinctl |= (new_vref & AC_PINCTL_VREFEN);
372
373 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
374 if (error < 0)
375 return error;
376
377 return 1;
378 }
379
380 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
381 /* this hook is set in stac_setup_gpio() */
382 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
383 hda_nid_t nid,
384 unsigned int power_state)
385 {
386 if (nid == codec->afg && power_state == AC_PWRST_D3)
387 return AC_PWRST_D1;
388 return snd_hda_gen_path_power_filter(codec, nid, power_state);
389 }
390
391 /* update mute-LED accoring to the master switch */
392 static void stac_update_led_status(struct hda_codec *codec, int enabled)
393 {
394 struct sigmatel_spec *spec = codec->spec;
395 int muted = !enabled;
396
397 if (!spec->gpio_led)
398 return;
399
400 /* LED state is inverted on these systems */
401 if (spec->gpio_led_polarity)
402 muted = !muted;
403
404 if (!spec->vref_mute_led_nid) {
405 if (muted)
406 spec->gpio_data |= spec->gpio_led;
407 else
408 spec->gpio_data &= ~spec->gpio_led;
409 stac_gpio_set(codec, spec->gpio_mask,
410 spec->gpio_dir, spec->gpio_data);
411 } else {
412 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
413 stac_vrefout_set(codec, spec->vref_mute_led_nid,
414 spec->vref_led);
415 }
416 }
417
418 /* vmaster hook to update mute LED */
419 static void stac_vmaster_hook(void *private_data, int val)
420 {
421 stac_update_led_status(private_data, val);
422 }
423
424 /* automute hook to handle GPIO mute and EAPD updates */
425 static void stac_update_outputs(struct hda_codec *codec)
426 {
427 struct sigmatel_spec *spec = codec->spec;
428
429 if (spec->gpio_mute)
430 spec->gen.master_mute =
431 !(snd_hda_codec_read(codec, codec->afg, 0,
432 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
433
434 snd_hda_gen_update_outputs(codec);
435
436 if (spec->eapd_mask && spec->eapd_switch) {
437 unsigned int val = spec->gpio_data;
438 if (spec->gen.speaker_muted)
439 val &= ~spec->eapd_mask;
440 else
441 val |= spec->eapd_mask;
442 if (spec->gpio_data != val) {
443 spec->gpio_data = val;
444 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
445 val);
446 }
447 }
448 }
449
450 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
451 bool enable, bool do_write)
452 {
453 struct sigmatel_spec *spec = codec->spec;
454 unsigned int idx, val;
455
456 for (idx = 0; idx < spec->num_pwrs; idx++) {
457 if (spec->pwr_nids[idx] == nid)
458 break;
459 }
460 if (idx >= spec->num_pwrs)
461 return;
462
463 idx = 1 << idx;
464
465 val = spec->power_map_bits;
466 if (enable)
467 val &= ~idx;
468 else
469 val |= idx;
470
471 /* power down unused output ports */
472 if (val != spec->power_map_bits) {
473 spec->power_map_bits = val;
474 if (do_write)
475 snd_hda_codec_write(codec, codec->afg, 0,
476 AC_VERB_IDT_SET_POWER_MAP, val);
477 }
478 }
479
480 /* update power bit per jack plug/unplug */
481 static void jack_update_power(struct hda_codec *codec,
482 struct hda_jack_tbl *jack)
483 {
484 struct sigmatel_spec *spec = codec->spec;
485 int i;
486
487 if (!spec->num_pwrs)
488 return;
489
490 if (jack && jack->nid) {
491 stac_toggle_power_map(codec, jack->nid,
492 snd_hda_jack_detect(codec, jack->nid),
493 true);
494 return;
495 }
496
497 /* update all jacks */
498 for (i = 0; i < spec->num_pwrs; i++) {
499 hda_nid_t nid = spec->pwr_nids[i];
500 jack = snd_hda_jack_tbl_get(codec, nid);
501 if (!jack || !jack->action)
502 continue;
503 if (jack->action == STAC_PWR_EVENT ||
504 jack->action <= HDA_GEN_LAST_EVENT)
505 stac_toggle_power_map(codec, nid,
506 snd_hda_jack_detect(codec, nid),
507 false);
508 }
509
510 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
511 spec->power_map_bits);
512 }
513
514 static void stac_hp_automute(struct hda_codec *codec,
515 struct hda_jack_tbl *jack)
516 {
517 snd_hda_gen_hp_automute(codec, jack);
518 jack_update_power(codec, jack);
519 }
520
521 static void stac_line_automute(struct hda_codec *codec,
522 struct hda_jack_tbl *jack)
523 {
524 snd_hda_gen_line_automute(codec, jack);
525 jack_update_power(codec, jack);
526 }
527
528 static void stac_mic_autoswitch(struct hda_codec *codec,
529 struct hda_jack_tbl *jack)
530 {
531 snd_hda_gen_mic_autoswitch(codec, jack);
532 jack_update_power(codec, jack);
533 }
534
535 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
536 {
537 unsigned int data;
538
539 data = snd_hda_codec_read(codec, codec->afg, 0,
540 AC_VERB_GET_GPIO_DATA, 0);
541 /* toggle VREF state based on GPIOx status */
542 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
543 !!(data & (1 << event->private_data)));
544 }
545
546 /* initialize the power map and enable the power event to jacks that
547 * haven't been assigned to automute
548 */
549 static void stac_init_power_map(struct hda_codec *codec)
550 {
551 struct sigmatel_spec *spec = codec->spec;
552 int i;
553
554 for (i = 0; i < spec->num_pwrs; i++) {
555 hda_nid_t nid = spec->pwr_nids[i];
556 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
557 def_conf = get_defcfg_connect(def_conf);
558 if (snd_hda_jack_tbl_get(codec, nid))
559 continue;
560 if (def_conf == AC_JACK_PORT_COMPLEX &&
561 !(spec->vref_mute_led_nid == nid ||
562 is_jack_detectable(codec, nid))) {
563 snd_hda_jack_detect_enable_callback(codec, nid,
564 STAC_PWR_EVENT,
565 jack_update_power);
566 } else {
567 if (def_conf == AC_JACK_PORT_NONE)
568 stac_toggle_power_map(codec, nid, false, false);
569 else
570 stac_toggle_power_map(codec, nid, true, false);
571 }
572 }
573 }
574
575 /*
576 */
577
578 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
579 int *valp)
580 {
581 return !snd_hda_get_int_hint(codec, key, valp);
582 }
583
584 /* override some hints from the hwdep entry */
585 static void stac_store_hints(struct hda_codec *codec)
586 {
587 struct sigmatel_spec *spec = codec->spec;
588 int val;
589
590 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
591 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
592 spec->gpio_mask;
593 }
594 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
595 spec->gpio_mask &= spec->gpio_mask;
596 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
597 spec->gpio_dir &= spec->gpio_mask;
598 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
599 spec->eapd_mask &= spec->gpio_mask;
600 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
601 spec->gpio_mute &= spec->gpio_mask;
602 val = snd_hda_get_bool_hint(codec, "eapd_switch");
603 if (val >= 0)
604 spec->eapd_switch = val;
605 }
606
607 /*
608 * loopback controls
609 */
610
611 #define stac_aloopback_info snd_ctl_boolean_mono_info
612
613 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615 {
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
618 struct sigmatel_spec *spec = codec->spec;
619
620 ucontrol->value.integer.value[0] = !!(spec->aloopback &
621 (spec->aloopback_mask << idx));
622 return 0;
623 }
624
625 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_value *ucontrol)
627 {
628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
629 struct sigmatel_spec *spec = codec->spec;
630 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
631 unsigned int dac_mode;
632 unsigned int val, idx_val;
633
634 idx_val = spec->aloopback_mask << idx;
635 if (ucontrol->value.integer.value[0])
636 val = spec->aloopback | idx_val;
637 else
638 val = spec->aloopback & ~idx_val;
639 if (spec->aloopback == val)
640 return 0;
641
642 spec->aloopback = val;
643
644 /* Only return the bits defined by the shift value of the
645 * first two bytes of the mask
646 */
647 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
648 kcontrol->private_value & 0xFFFF, 0x0);
649 dac_mode >>= spec->aloopback_shift;
650
651 if (spec->aloopback & idx_val) {
652 snd_hda_power_up(codec);
653 dac_mode |= idx_val;
654 } else {
655 snd_hda_power_down(codec);
656 dac_mode &= ~idx_val;
657 }
658
659 snd_hda_codec_write_cache(codec, codec->afg, 0,
660 kcontrol->private_value >> 16, dac_mode);
661
662 return 1;
663 }
664
665 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
666 { \
667 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
668 .name = "Analog Loopback", \
669 .count = cnt, \
670 .info = stac_aloopback_info, \
671 .get = stac_aloopback_get, \
672 .put = stac_aloopback_put, \
673 .private_value = verb_read | (verb_write << 16), \
674 }
675
676 /*
677 * Mute LED handling on HP laptops
678 */
679
680 /* check whether it's a HP laptop with a docking port */
681 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
682 {
683 if (codec->vendor_id != 0x111d7605 &&
684 codec->vendor_id != 0x111d76d1)
685 return false;
686
687 switch (codec->subsystem_id) {
688 case 0x103c1618:
689 case 0x103c1619:
690 case 0x103c161a:
691 case 0x103c161b:
692 case 0x103c161c:
693 case 0x103c161d:
694 case 0x103c161e:
695 case 0x103c161f:
696
697 case 0x103c162a:
698 case 0x103c162b:
699
700 case 0x103c1630:
701 case 0x103c1631:
702
703 case 0x103c1633:
704 case 0x103c1634:
705 case 0x103c1635:
706
707 case 0x103c3587:
708 case 0x103c3588:
709 case 0x103c3589:
710 case 0x103c358a:
711
712 case 0x103c3667:
713 case 0x103c3668:
714 case 0x103c3669:
715
716 return true;
717 }
718 return false;
719 }
720
721 static bool hp_blike_system(u32 subsystem_id)
722 {
723 switch (subsystem_id) {
724 case 0x103c1520:
725 case 0x103c1521:
726 case 0x103c1523:
727 case 0x103c1524:
728 case 0x103c1525:
729 case 0x103c1722:
730 case 0x103c1723:
731 case 0x103c1724:
732 case 0x103c1725:
733 case 0x103c1726:
734 case 0x103c1727:
735 case 0x103c1728:
736 case 0x103c1729:
737 case 0x103c172a:
738 case 0x103c172b:
739 case 0x103c307e:
740 case 0x103c307f:
741 case 0x103c3080:
742 case 0x103c3081:
743 case 0x103c7007:
744 case 0x103c7008:
745 return true;
746 }
747 return false;
748 }
749
750 static void set_hp_led_gpio(struct hda_codec *codec)
751 {
752 struct sigmatel_spec *spec = codec->spec;
753 unsigned int gpio;
754
755 if (spec->gpio_led)
756 return;
757
758 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
759 gpio &= AC_GPIO_IO_COUNT;
760 if (gpio > 3)
761 spec->gpio_led = 0x08; /* GPIO 3 */
762 else
763 spec->gpio_led = 0x01; /* GPIO 0 */
764 }
765
766 /*
767 * This method searches for the mute LED GPIO configuration
768 * provided as OEM string in SMBIOS. The format of that string
769 * is HP_Mute_LED_P_G or HP_Mute_LED_P
770 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
771 * that corresponds to the NOT muted state of the master volume
772 * and G is the index of the GPIO to use as the mute LED control (0..9)
773 * If _G portion is missing it is assigned based on the codec ID
774 *
775 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
776 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
777 *
778 *
779 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
780 * SMBIOS - at least the ones I have seen do not have them - which include
781 * my own system (HP Pavilion dv6-1110ax) and my cousin's
782 * HP Pavilion dv9500t CTO.
783 * Need more information on whether it is true across the entire series.
784 * -- kunal
785 */
786 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
787 {
788 struct sigmatel_spec *spec = codec->spec;
789 const struct dmi_device *dev = NULL;
790
791 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
792 get_int_hint(codec, "gpio_led_polarity",
793 &spec->gpio_led_polarity);
794 return 1;
795 }
796
797 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
798 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
799 &spec->gpio_led_polarity,
800 &spec->gpio_led) == 2) {
801 unsigned int max_gpio;
802 max_gpio = snd_hda_param_read(codec, codec->afg,
803 AC_PAR_GPIO_CAP);
804 max_gpio &= AC_GPIO_IO_COUNT;
805 if (spec->gpio_led < max_gpio)
806 spec->gpio_led = 1 << spec->gpio_led;
807 else
808 spec->vref_mute_led_nid = spec->gpio_led;
809 return 1;
810 }
811 if (sscanf(dev->name, "HP_Mute_LED_%d",
812 &spec->gpio_led_polarity) == 1) {
813 set_hp_led_gpio(codec);
814 return 1;
815 }
816 /* BIOS bug: unfilled OEM string */
817 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
818 set_hp_led_gpio(codec);
819 if (default_polarity >= 0)
820 spec->gpio_led_polarity = default_polarity;
821 else
822 spec->gpio_led_polarity = 1;
823 return 1;
824 }
825 }
826
827 /*
828 * Fallback case - if we don't find the DMI strings,
829 * we statically set the GPIO - if not a B-series system
830 * and default polarity is provided
831 */
832 if (!hp_blike_system(codec->subsystem_id) &&
833 (default_polarity == 0 || default_polarity == 1)) {
834 set_hp_led_gpio(codec);
835 spec->gpio_led_polarity = default_polarity;
836 return 1;
837 }
838 return 0;
839 }
840
841 /* check whether a built-in speaker is included in parsed pins */
842 static bool has_builtin_speaker(struct hda_codec *codec)
843 {
844 struct sigmatel_spec *spec = codec->spec;
845 hda_nid_t *nid_pin;
846 int nids, i;
847
848 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
849 nid_pin = spec->gen.autocfg.line_out_pins;
850 nids = spec->gen.autocfg.line_outs;
851 } else {
852 nid_pin = spec->gen.autocfg.speaker_pins;
853 nids = spec->gen.autocfg.speaker_outs;
854 }
855
856 for (i = 0; i < nids; i++) {
857 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
858 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
859 return true;
860 }
861 return false;
862 }
863
864 /*
865 * PC beep controls
866 */
867
868 /* create PC beep volume controls */
869 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
870 hda_nid_t nid)
871 {
872 struct sigmatel_spec *spec = codec->spec;
873 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
874 struct snd_kcontrol_new *knew;
875 static struct snd_kcontrol_new abeep_mute_ctl =
876 HDA_CODEC_MUTE(NULL, 0, 0, 0);
877 static struct snd_kcontrol_new dbeep_mute_ctl =
878 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
879 static struct snd_kcontrol_new beep_vol_ctl =
880 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
881
882 /* check for mute support for the the amp */
883 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
884 const struct snd_kcontrol_new *temp;
885 if (spec->anabeep_nid == nid)
886 temp = &abeep_mute_ctl;
887 else
888 temp = &dbeep_mute_ctl;
889 knew = snd_hda_gen_add_kctl(&spec->gen,
890 "Beep Playback Switch", temp);
891 if (!knew)
892 return -ENOMEM;
893 knew->private_value =
894 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
895 }
896
897 /* check to see if there is volume support for the amp */
898 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
899 knew = snd_hda_gen_add_kctl(&spec->gen,
900 "Beep Playback Volume",
901 &beep_vol_ctl);
902 if (!knew)
903 return -ENOMEM;
904 knew->private_value =
905 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
906 }
907 return 0;
908 }
909
910 #ifdef CONFIG_SND_HDA_INPUT_BEEP
911 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
912
913 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
914 struct snd_ctl_elem_value *ucontrol)
915 {
916 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
917 ucontrol->value.integer.value[0] = codec->beep->enabled;
918 return 0;
919 }
920
921 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
922 struct snd_ctl_elem_value *ucontrol)
923 {
924 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
925 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
926 }
927
928 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
929 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
930 .name = "Beep Playback Switch",
931 .info = stac_dig_beep_switch_info,
932 .get = stac_dig_beep_switch_get,
933 .put = stac_dig_beep_switch_put,
934 };
935
936 static int stac_beep_switch_ctl(struct hda_codec *codec)
937 {
938 struct sigmatel_spec *spec = codec->spec;
939
940 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
941 return -ENOMEM;
942 return 0;
943 }
944 #endif
945
946 /*
947 * SPDIF-out mux controls
948 */
949
950 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
951 struct snd_ctl_elem_info *uinfo)
952 {
953 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
954 struct sigmatel_spec *spec = codec->spec;
955 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
956 }
957
958 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960 {
961 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
962 struct sigmatel_spec *spec = codec->spec;
963 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
964
965 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
966 return 0;
967 }
968
969 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
970 struct snd_ctl_elem_value *ucontrol)
971 {
972 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
973 struct sigmatel_spec *spec = codec->spec;
974 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
975
976 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
977 spec->gen.autocfg.dig_out_pins[smux_idx],
978 &spec->cur_smux[smux_idx]);
979 }
980
981 static struct snd_kcontrol_new stac_smux_mixer = {
982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
983 .name = "IEC958 Playback Source",
984 /* count set later */
985 .info = stac_smux_enum_info,
986 .get = stac_smux_enum_get,
987 .put = stac_smux_enum_put,
988 };
989
990 static const char * const stac_spdif_labels[] = {
991 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
992 };
993
994 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
995 {
996 struct sigmatel_spec *spec = codec->spec;
997 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
998 const char * const *labels = spec->spdif_labels;
999 struct snd_kcontrol_new *kctl;
1000 int i, num_cons;
1001
1002 if (cfg->dig_outs < 1)
1003 return 0;
1004
1005 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
1006 if (num_cons <= 1)
1007 return 0;
1008
1009 if (!labels)
1010 labels = stac_spdif_labels;
1011 for (i = 0; i < num_cons; i++) {
1012 if (snd_BUG_ON(!labels[i]))
1013 return -EINVAL;
1014 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
1015 }
1016
1017 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1018 if (!kctl)
1019 return -ENOMEM;
1020 kctl->count = cfg->dig_outs;
1021
1022 return 0;
1023 }
1024
1025 /*
1026 */
1027
1028 static const struct hda_verb stac9200_core_init[] = {
1029 /* set dac0mux for dac converter */
1030 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1031 {}
1032 };
1033
1034 static const struct hda_verb stac9200_eapd_init[] = {
1035 /* set dac0mux for dac converter */
1036 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1037 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1038 {}
1039 };
1040
1041 static const struct hda_verb dell_eq_core_init[] = {
1042 /* set master volume to max value without distortion
1043 * and direct control */
1044 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1045 {}
1046 };
1047
1048 static const struct hda_verb stac92hd73xx_core_init[] = {
1049 /* set master volume and direct control */
1050 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1051 {}
1052 };
1053
1054 static const struct hda_verb stac92hd83xxx_core_init[] = {
1055 /* power state controls amps */
1056 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1057 {}
1058 };
1059
1060 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1061 { 0x22, 0x785, 0x43 },
1062 { 0x22, 0x782, 0xe0 },
1063 { 0x22, 0x795, 0x00 },
1064 {}
1065 };
1066
1067 static const struct hda_verb stac92hd71bxx_core_init[] = {
1068 /* set master volume and direct control */
1069 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1070 {}
1071 };
1072
1073 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1074 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1075 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1076 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1077 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1078 {}
1079 };
1080
1081 static const struct hda_verb stac925x_core_init[] = {
1082 /* set dac0mux for dac converter */
1083 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1084 /* mute the master volume */
1085 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1086 {}
1087 };
1088
1089 static const struct hda_verb stac922x_core_init[] = {
1090 /* set master volume and direct control */
1091 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1092 {}
1093 };
1094
1095 static const struct hda_verb d965_core_init[] = {
1096 /* unmute node 0x1b */
1097 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1098 /* select node 0x03 as DAC */
1099 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1100 {}
1101 };
1102
1103 static const struct hda_verb dell_3st_core_init[] = {
1104 /* don't set delta bit */
1105 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1106 /* unmute node 0x1b */
1107 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1108 /* select node 0x03 as DAC */
1109 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1110 {}
1111 };
1112
1113 static const struct hda_verb stac927x_core_init[] = {
1114 /* set master volume and direct control */
1115 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1116 /* enable analog pc beep path */
1117 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1118 {}
1119 };
1120
1121 static const struct hda_verb stac927x_volknob_core_init[] = {
1122 /* don't set delta bit */
1123 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1124 /* enable analog pc beep path */
1125 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1126 {}
1127 };
1128
1129 static const struct hda_verb stac9205_core_init[] = {
1130 /* set master volume and direct control */
1131 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1132 /* enable analog pc beep path */
1133 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1134 {}
1135 };
1136
1137 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1138 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1139
1140 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1141 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1142
1143 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1144 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1145
1146 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1147 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1148
1149 static const struct snd_kcontrol_new stac9205_loopback =
1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1151
1152 static const struct snd_kcontrol_new stac927x_loopback =
1153 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1154
1155 static const struct hda_pintbl ref9200_pin_configs[] = {
1156 { 0x08, 0x01c47010 },
1157 { 0x09, 0x01447010 },
1158 { 0x0d, 0x0221401f },
1159 { 0x0e, 0x01114010 },
1160 { 0x0f, 0x02a19020 },
1161 { 0x10, 0x01a19021 },
1162 { 0x11, 0x90100140 },
1163 { 0x12, 0x01813122 },
1164 {}
1165 };
1166
1167 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1168 { 0x08, 0x400000fe },
1169 { 0x09, 0x404500f4 },
1170 { 0x0d, 0x400100f0 },
1171 { 0x0e, 0x90110010 },
1172 { 0x0f, 0x400100f1 },
1173 { 0x10, 0x02a1902e },
1174 { 0x11, 0x500000f2 },
1175 { 0x12, 0x500000f3 },
1176 {}
1177 };
1178
1179 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1180 { 0x08, 0x400000fe },
1181 { 0x09, 0x404500f4 },
1182 { 0x0d, 0x400100f0 },
1183 { 0x0e, 0x90110010 },
1184 { 0x0f, 0x400100f1 },
1185 { 0x10, 0x02a1902e },
1186 { 0x11, 0x500000f2 },
1187 { 0x12, 0x500000f3 },
1188 {}
1189 };
1190
1191 /*
1192 STAC 9200 pin configs for
1193 102801A8
1194 102801DE
1195 102801E8
1196 */
1197 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1198 { 0x08, 0x400001f0 },
1199 { 0x09, 0x400001f1 },
1200 { 0x0d, 0x02214030 },
1201 { 0x0e, 0x01014010 },
1202 { 0x0f, 0x02a19020 },
1203 { 0x10, 0x01a19021 },
1204 { 0x11, 0x90100140 },
1205 { 0x12, 0x01813122 },
1206 {}
1207 };
1208
1209 /*
1210 STAC 9200 pin configs for
1211 102801C0
1212 102801C1
1213 */
1214 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1215 { 0x08, 0x400001f0 },
1216 { 0x09, 0x400001f1 },
1217 { 0x0d, 0x0221401f },
1218 { 0x0e, 0x01014010 },
1219 { 0x0f, 0x01813020 },
1220 { 0x10, 0x02a19021 },
1221 { 0x11, 0x90100140 },
1222 { 0x12, 0x400001f2 },
1223 {}
1224 };
1225
1226 /*
1227 STAC 9200 pin configs for
1228 102801C4 (Dell Dimension E310)
1229 102801C5
1230 102801C7
1231 102801D9
1232 102801DA
1233 102801E3
1234 */
1235 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1236 { 0x08, 0x400001f0 },
1237 { 0x09, 0x400001f1 },
1238 { 0x0d, 0x0221401f },
1239 { 0x0e, 0x01014010 },
1240 { 0x0f, 0x01813020 },
1241 { 0x10, 0x01a19021 },
1242 { 0x11, 0x90100140 },
1243 { 0x12, 0x400001f2 },
1244 {}
1245 };
1246
1247
1248 /*
1249 STAC 9200-32 pin configs for
1250 102801B5 (Dell Inspiron 630m)
1251 102801D8 (Dell Inspiron 640m)
1252 */
1253 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1254 { 0x08, 0x40c003fa },
1255 { 0x09, 0x03441340 },
1256 { 0x0d, 0x0321121f },
1257 { 0x0e, 0x90170310 },
1258 { 0x0f, 0x408003fb },
1259 { 0x10, 0x03a11020 },
1260 { 0x11, 0x401003fc },
1261 { 0x12, 0x403003fd },
1262 {}
1263 };
1264
1265 /*
1266 STAC 9200-32 pin configs for
1267 102801C2 (Dell Latitude D620)
1268 102801C8
1269 102801CC (Dell Latitude D820)
1270 102801D4
1271 102801D6
1272 */
1273 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1274 { 0x08, 0x40c003fa },
1275 { 0x09, 0x0144131f },
1276 { 0x0d, 0x0321121f },
1277 { 0x0e, 0x90170310 },
1278 { 0x0f, 0x90a70321 },
1279 { 0x10, 0x03a11020 },
1280 { 0x11, 0x401003fb },
1281 { 0x12, 0x40f000fc },
1282 {}
1283 };
1284
1285 /*
1286 STAC 9200-32 pin configs for
1287 102801CE (Dell XPS M1710)
1288 102801CF (Dell Precision M90)
1289 */
1290 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1291 { 0x08, 0x40c003fa },
1292 { 0x09, 0x01441340 },
1293 { 0x0d, 0x0421421f },
1294 { 0x0e, 0x90170310 },
1295 { 0x0f, 0x408003fb },
1296 { 0x10, 0x04a1102e },
1297 { 0x11, 0x90170311 },
1298 { 0x12, 0x403003fc },
1299 {}
1300 };
1301
1302 /*
1303 STAC 9200-32 pin configs for
1304 102801C9
1305 102801CA
1306 102801CB (Dell Latitude 120L)
1307 102801D3
1308 */
1309 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1310 { 0x08, 0x40c003fa },
1311 { 0x09, 0x404003fb },
1312 { 0x0d, 0x0321121f },
1313 { 0x0e, 0x90170310 },
1314 { 0x0f, 0x408003fc },
1315 { 0x10, 0x03a11020 },
1316 { 0x11, 0x401003fd },
1317 { 0x12, 0x403003fe },
1318 {}
1319 };
1320
1321 /*
1322 STAC 9200-32 pin configs for
1323 102801BD (Dell Inspiron E1505n)
1324 102801EE
1325 102801EF
1326 */
1327 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1328 { 0x08, 0x40c003fa },
1329 { 0x09, 0x01441340 },
1330 { 0x0d, 0x0421121f },
1331 { 0x0e, 0x90170310 },
1332 { 0x0f, 0x408003fb },
1333 { 0x10, 0x04a11020 },
1334 { 0x11, 0x401003fc },
1335 { 0x12, 0x403003fd },
1336 {}
1337 };
1338
1339 /*
1340 STAC 9200-32 pin configs for
1341 102801F5 (Dell Inspiron 1501)
1342 102801F6
1343 */
1344 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1345 { 0x08, 0x40c003fa },
1346 { 0x09, 0x404003fb },
1347 { 0x0d, 0x0421121f },
1348 { 0x0e, 0x90170310 },
1349 { 0x0f, 0x408003fc },
1350 { 0x10, 0x04a11020 },
1351 { 0x11, 0x401003fd },
1352 { 0x12, 0x403003fe },
1353 {}
1354 };
1355
1356 /*
1357 STAC 9200-32
1358 102801CD (Dell Inspiron E1705/9400)
1359 */
1360 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1361 { 0x08, 0x40c003fa },
1362 { 0x09, 0x01441340 },
1363 { 0x0d, 0x0421121f },
1364 { 0x0e, 0x90170310 },
1365 { 0x0f, 0x90170310 },
1366 { 0x10, 0x04a11020 },
1367 { 0x11, 0x90170310 },
1368 { 0x12, 0x40f003fc },
1369 {}
1370 };
1371
1372 static const struct hda_pintbl oqo9200_pin_configs[] = {
1373 { 0x08, 0x40c000f0 },
1374 { 0x09, 0x404000f1 },
1375 { 0x0d, 0x0221121f },
1376 { 0x0e, 0x02211210 },
1377 { 0x0f, 0x90170111 },
1378 { 0x10, 0x90a70120 },
1379 { 0x11, 0x400000f2 },
1380 { 0x12, 0x400000f3 },
1381 {}
1382 };
1383
1384
1385 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1386 const struct hda_fixup *fix, int action)
1387 {
1388 struct sigmatel_spec *spec = codec->spec;
1389
1390 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1391 spec->gpio_mask = spec->gpio_dir = 0x09;
1392 spec->gpio_data = 0x00;
1393 /* CF-74 has no headphone detection, and the driver should *NOT*
1394 * do detection and HP/speaker toggle because the hardware does it.
1395 */
1396 spec->gen.suppress_auto_mute = 1;
1397 }
1398 }
1399
1400
1401 static const struct hda_fixup stac9200_fixups[] = {
1402 [STAC_REF] = {
1403 .type = HDA_FIXUP_PINS,
1404 .v.pins = ref9200_pin_configs,
1405 },
1406 [STAC_9200_OQO] = {
1407 .type = HDA_FIXUP_PINS,
1408 .v.pins = oqo9200_pin_configs,
1409 .chained = true,
1410 .chain_id = STAC_9200_EAPD_INIT,
1411 },
1412 [STAC_9200_DELL_D21] = {
1413 .type = HDA_FIXUP_PINS,
1414 .v.pins = dell9200_d21_pin_configs,
1415 },
1416 [STAC_9200_DELL_D22] = {
1417 .type = HDA_FIXUP_PINS,
1418 .v.pins = dell9200_d22_pin_configs,
1419 },
1420 [STAC_9200_DELL_D23] = {
1421 .type = HDA_FIXUP_PINS,
1422 .v.pins = dell9200_d23_pin_configs,
1423 },
1424 [STAC_9200_DELL_M21] = {
1425 .type = HDA_FIXUP_PINS,
1426 .v.pins = dell9200_m21_pin_configs,
1427 },
1428 [STAC_9200_DELL_M22] = {
1429 .type = HDA_FIXUP_PINS,
1430 .v.pins = dell9200_m22_pin_configs,
1431 },
1432 [STAC_9200_DELL_M23] = {
1433 .type = HDA_FIXUP_PINS,
1434 .v.pins = dell9200_m23_pin_configs,
1435 },
1436 [STAC_9200_DELL_M24] = {
1437 .type = HDA_FIXUP_PINS,
1438 .v.pins = dell9200_m24_pin_configs,
1439 },
1440 [STAC_9200_DELL_M25] = {
1441 .type = HDA_FIXUP_PINS,
1442 .v.pins = dell9200_m25_pin_configs,
1443 },
1444 [STAC_9200_DELL_M26] = {
1445 .type = HDA_FIXUP_PINS,
1446 .v.pins = dell9200_m26_pin_configs,
1447 },
1448 [STAC_9200_DELL_M27] = {
1449 .type = HDA_FIXUP_PINS,
1450 .v.pins = dell9200_m27_pin_configs,
1451 },
1452 [STAC_9200_M4] = {
1453 .type = HDA_FIXUP_PINS,
1454 .v.pins = gateway9200_m4_pin_configs,
1455 .chained = true,
1456 .chain_id = STAC_9200_EAPD_INIT,
1457 },
1458 [STAC_9200_M4_2] = {
1459 .type = HDA_FIXUP_PINS,
1460 .v.pins = gateway9200_m4_2_pin_configs,
1461 .chained = true,
1462 .chain_id = STAC_9200_EAPD_INIT,
1463 },
1464 [STAC_9200_PANASONIC] = {
1465 .type = HDA_FIXUP_FUNC,
1466 .v.func = stac9200_fixup_panasonic,
1467 },
1468 [STAC_9200_EAPD_INIT] = {
1469 .type = HDA_FIXUP_VERBS,
1470 .v.verbs = (const struct hda_verb[]) {
1471 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1472 {}
1473 },
1474 },
1475 };
1476
1477 static const struct hda_model_fixup stac9200_models[] = {
1478 { .id = STAC_REF, .name = "ref" },
1479 { .id = STAC_9200_OQO, .name = "oqo" },
1480 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1481 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1482 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1483 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1484 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1485 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1486 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1487 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1488 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1489 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1490 { .id = STAC_9200_M4, .name = "gateway-m4" },
1491 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1492 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1493 {}
1494 };
1495
1496 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1497 /* SigmaTel reference board */
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1499 "DFI LanParty", STAC_REF),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1501 "DFI LanParty", STAC_REF),
1502 /* Dell laptops have BIOS problem */
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1504 "unknown Dell", STAC_9200_DELL_D21),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1506 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1508 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1510 "unknown Dell", STAC_9200_DELL_D22),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1512 "unknown Dell", STAC_9200_DELL_D22),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1514 "Dell Latitude D620", STAC_9200_DELL_M22),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1516 "unknown Dell", STAC_9200_DELL_D23),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1518 "unknown Dell", STAC_9200_DELL_D23),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1520 "unknown Dell", STAC_9200_DELL_M22),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1522 "unknown Dell", STAC_9200_DELL_M24),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1524 "unknown Dell", STAC_9200_DELL_M24),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1526 "Dell Latitude 120L", STAC_9200_DELL_M24),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1528 "Dell Latitude D820", STAC_9200_DELL_M22),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1530 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1532 "Dell XPS M1710", STAC_9200_DELL_M23),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1534 "Dell Precision M90", STAC_9200_DELL_M23),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1536 "unknown Dell", STAC_9200_DELL_M22),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1538 "unknown Dell", STAC_9200_DELL_M22),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1540 "unknown Dell", STAC_9200_DELL_M22),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1542 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1544 "unknown Dell", STAC_9200_DELL_D23),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1546 "unknown Dell", STAC_9200_DELL_D23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1548 "unknown Dell", STAC_9200_DELL_D21),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1550 "unknown Dell", STAC_9200_DELL_D23),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1552 "unknown Dell", STAC_9200_DELL_D21),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1554 "unknown Dell", STAC_9200_DELL_M25),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1556 "unknown Dell", STAC_9200_DELL_M25),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1558 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1560 "unknown Dell", STAC_9200_DELL_M26),
1561 /* Panasonic */
1562 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1563 /* Gateway machines needs EAPD to be set on resume */
1564 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1565 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1566 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1567 /* OQO Mobile */
1568 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1569 {} /* terminator */
1570 };
1571
1572 static const struct hda_pintbl ref925x_pin_configs[] = {
1573 { 0x07, 0x40c003f0 },
1574 { 0x08, 0x424503f2 },
1575 { 0x0a, 0x01813022 },
1576 { 0x0b, 0x02a19021 },
1577 { 0x0c, 0x90a70320 },
1578 { 0x0d, 0x02214210 },
1579 { 0x10, 0x01019020 },
1580 { 0x11, 0x9033032e },
1581 {}
1582 };
1583
1584 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1585 { 0x07, 0x40c003f4 },
1586 { 0x08, 0x424503f2 },
1587 { 0x0a, 0x400000f3 },
1588 { 0x0b, 0x02a19020 },
1589 { 0x0c, 0x40a000f0 },
1590 { 0x0d, 0x90100210 },
1591 { 0x10, 0x400003f1 },
1592 { 0x11, 0x9033032e },
1593 {}
1594 };
1595
1596 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1597 { 0x07, 0x40c003f4 },
1598 { 0x08, 0x424503f2 },
1599 { 0x0a, 0x400000f3 },
1600 { 0x0b, 0x02a19020 },
1601 { 0x0c, 0x40a000f0 },
1602 { 0x0d, 0x90100210 },
1603 { 0x10, 0x400003f1 },
1604 { 0x11, 0x9033032e },
1605 {}
1606 };
1607
1608 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1609 { 0x07, 0x40c003f4 },
1610 { 0x08, 0x424503f2 },
1611 { 0x0a, 0x400000f3 },
1612 { 0x0b, 0x02a19020 },
1613 { 0x0c, 0x40a000f0 },
1614 { 0x0d, 0x90100210 },
1615 { 0x10, 0x400003f1 },
1616 { 0x11, 0x9033032e },
1617 {}
1618 };
1619
1620 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1621 { 0x07, 0x40c003f4 },
1622 { 0x08, 0x424503f2 },
1623 { 0x0a, 0x400000f3 },
1624 { 0x0b, 0x02a19020 },
1625 { 0x0c, 0x40a000f0 },
1626 { 0x0d, 0x90100210 },
1627 { 0x10, 0x400003f1 },
1628 { 0x11, 0x9033032e },
1629 {}
1630 };
1631
1632 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1633 { 0x07, 0x40c003f4 },
1634 { 0x08, 0x424503f2 },
1635 { 0x0a, 0x400000f3 },
1636 { 0x0b, 0x02a19020 },
1637 { 0x0c, 0x40a000f0 },
1638 { 0x0d, 0x90100210 },
1639 { 0x10, 0x400003f1 },
1640 { 0x11, 0x503303f3 },
1641 {}
1642 };
1643
1644 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1645 { 0x07, 0x40c003f4 },
1646 { 0x08, 0x424503f2 },
1647 { 0x0a, 0x400000f3 },
1648 { 0x0b, 0x02a19020 },
1649 { 0x0c, 0x40a000f0 },
1650 { 0x0d, 0x90100210 },
1651 { 0x10, 0x400003f1 },
1652 { 0x11, 0x9033032e },
1653 {}
1654 };
1655
1656 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1657 { 0x07, 0x40c003f4 },
1658 { 0x08, 0x424503f2 },
1659 { 0x0a, 0x400000f3 },
1660 { 0x0b, 0x02a19020 },
1661 { 0x0c, 0x40a000f0 },
1662 { 0x0d, 0x90100210 },
1663 { 0x10, 0x400003f1 },
1664 { 0x11, 0x90330320 },
1665 {}
1666 };
1667
1668 static const struct hda_fixup stac925x_fixups[] = {
1669 [STAC_REF] = {
1670 .type = HDA_FIXUP_PINS,
1671 .v.pins = ref925x_pin_configs,
1672 },
1673 [STAC_M1] = {
1674 .type = HDA_FIXUP_PINS,
1675 .v.pins = stac925xM1_pin_configs,
1676 },
1677 [STAC_M1_2] = {
1678 .type = HDA_FIXUP_PINS,
1679 .v.pins = stac925xM1_2_pin_configs,
1680 },
1681 [STAC_M2] = {
1682 .type = HDA_FIXUP_PINS,
1683 .v.pins = stac925xM2_pin_configs,
1684 },
1685 [STAC_M2_2] = {
1686 .type = HDA_FIXUP_PINS,
1687 .v.pins = stac925xM2_2_pin_configs,
1688 },
1689 [STAC_M3] = {
1690 .type = HDA_FIXUP_PINS,
1691 .v.pins = stac925xM3_pin_configs,
1692 },
1693 [STAC_M5] = {
1694 .type = HDA_FIXUP_PINS,
1695 .v.pins = stac925xM5_pin_configs,
1696 },
1697 [STAC_M6] = {
1698 .type = HDA_FIXUP_PINS,
1699 .v.pins = stac925xM6_pin_configs,
1700 },
1701 };
1702
1703 static const struct hda_model_fixup stac925x_models[] = {
1704 { .id = STAC_REF, .name = "ref" },
1705 { .id = STAC_M1, .name = "m1" },
1706 { .id = STAC_M1_2, .name = "m1-2" },
1707 { .id = STAC_M2, .name = "m2" },
1708 { .id = STAC_M2_2, .name = "m2-2" },
1709 { .id = STAC_M3, .name = "m3" },
1710 { .id = STAC_M5, .name = "m5" },
1711 { .id = STAC_M6, .name = "m6" },
1712 {}
1713 };
1714
1715 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1716 /* SigmaTel reference board */
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1719 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1720
1721 /* Default table for unknown ID */
1722 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1723
1724 /* gateway machines are checked via codec ssid */
1725 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1726 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1727 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1728 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1729 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1730 /* Not sure about the brand name for those */
1731 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1732 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1733 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1734 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1735 {} /* terminator */
1736 };
1737
1738 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1739 { 0x0a, 0x02214030 },
1740 { 0x0b, 0x02a19040 },
1741 { 0x0c, 0x01a19020 },
1742 { 0x0d, 0x02214030 },
1743 { 0x0e, 0x0181302e },
1744 { 0x0f, 0x01014010 },
1745 { 0x10, 0x01014020 },
1746 { 0x11, 0x01014030 },
1747 { 0x12, 0x02319040 },
1748 { 0x13, 0x90a000f0 },
1749 { 0x14, 0x90a000f0 },
1750 { 0x22, 0x01452050 },
1751 { 0x23, 0x01452050 },
1752 {}
1753 };
1754
1755 static const struct hda_pintbl dell_m6_pin_configs[] = {
1756 { 0x0a, 0x0321101f },
1757 { 0x0b, 0x4f00000f },
1758 { 0x0c, 0x4f0000f0 },
1759 { 0x0d, 0x90170110 },
1760 { 0x0e, 0x03a11020 },
1761 { 0x0f, 0x0321101f },
1762 { 0x10, 0x4f0000f0 },
1763 { 0x11, 0x4f0000f0 },
1764 { 0x12, 0x4f0000f0 },
1765 { 0x13, 0x90a60160 },
1766 { 0x14, 0x4f0000f0 },
1767 { 0x22, 0x4f0000f0 },
1768 { 0x23, 0x4f0000f0 },
1769 {}
1770 };
1771
1772 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1773 { 0x0a, 0x0321101f },
1774 { 0x0b, 0x0321101f },
1775 { 0x0c, 0x03a11020 },
1776 { 0x0d, 0x03014020 },
1777 { 0x0e, 0x90170110 },
1778 { 0x0f, 0x4f0000f0 },
1779 { 0x10, 0x4f0000f0 },
1780 { 0x11, 0x4f0000f0 },
1781 { 0x12, 0x4f0000f0 },
1782 { 0x13, 0x90a60160 },
1783 { 0x14, 0x4f0000f0 },
1784 { 0x22, 0x4f0000f0 },
1785 { 0x23, 0x904601b0 },
1786 {}
1787 };
1788
1789 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1790 { 0x0a, 0x02214230 },
1791 { 0x0b, 0x02A19240 },
1792 { 0x0c, 0x01013214 },
1793 { 0x0d, 0x01014210 },
1794 { 0x0e, 0x01A19250 },
1795 { 0x0f, 0x01011212 },
1796 { 0x10, 0x01016211 },
1797 {}
1798 };
1799
1800 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1801 { 0x0a, 0x02214030 },
1802 { 0x0b, 0x02A19010 },
1803 {}
1804 };
1805
1806 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1807 const struct hda_fixup *fix, int action)
1808 {
1809 struct sigmatel_spec *spec = codec->spec;
1810
1811 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1812 return;
1813
1814 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1815 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1816 }
1817
1818 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1819 {
1820 struct sigmatel_spec *spec = codec->spec;
1821
1822 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1823 spec->eapd_switch = 0;
1824 }
1825
1826 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1827 const struct hda_fixup *fix, int action)
1828 {
1829 struct sigmatel_spec *spec = codec->spec;
1830
1831 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1832 return;
1833
1834 stac92hd73xx_fixup_dell(codec);
1835 snd_hda_add_verbs(codec, dell_eq_core_init);
1836 spec->volknob_init = 1;
1837 }
1838
1839 /* Analog Mics */
1840 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1841 const struct hda_fixup *fix, int action)
1842 {
1843 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1844 return;
1845
1846 stac92hd73xx_fixup_dell(codec);
1847 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1848 }
1849
1850 /* Digital Mics */
1851 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1852 const struct hda_fixup *fix, int action)
1853 {
1854 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1855 return;
1856
1857 stac92hd73xx_fixup_dell(codec);
1858 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1859 }
1860
1861 /* Both */
1862 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1863 const struct hda_fixup *fix, int action)
1864 {
1865 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1866 return;
1867
1868 stac92hd73xx_fixup_dell(codec);
1869 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1870 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1871 }
1872
1873 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1874 const struct hda_fixup *fix, int action)
1875 {
1876 struct sigmatel_spec *spec = codec->spec;
1877
1878 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1879 return;
1880
1881 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1882 spec->eapd_switch = 0;
1883 }
1884
1885 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1886 const struct hda_fixup *fix, int action)
1887 {
1888 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1889 codec->no_jack_detect = 1;
1890 }
1891
1892 static const struct hda_fixup stac92hd73xx_fixups[] = {
1893 [STAC_92HD73XX_REF] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_ref,
1896 },
1897 [STAC_DELL_M6_AMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1900 },
1901 [STAC_DELL_M6_DMIC] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1904 },
1905 [STAC_DELL_M6_BOTH] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_m6_both,
1908 },
1909 [STAC_DELL_EQ] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_dell_eq,
1912 },
1913 [STAC_ALIENWARE_M17X] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_fixup_alienware_m17x,
1916 },
1917 [STAC_92HD73XX_INTEL] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = intel_dg45id_pin_configs,
1920 },
1921 [STAC_92HD73XX_NO_JD] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_no_jd,
1924 },
1925 [STAC_92HD89XX_HP_FRONT_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1928 }
1929 };
1930
1931 static const struct hda_model_fixup stac92hd73xx_models[] = {
1932 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1933 { .id = STAC_92HD73XX_REF, .name = "ref" },
1934 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1935 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1936 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1937 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1938 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1939 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1940 {}
1941 };
1942
1943 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1944 /* SigmaTel reference board */
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1946 "DFI LanParty", STAC_92HD73XX_REF),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1948 "DFI LanParty", STAC_92HD73XX_REF),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1950 "Intel DG45ID", STAC_92HD73XX_INTEL),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1952 "Intel DG45FC", STAC_92HD73XX_INTEL),
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1954 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1956 "unknown Dell", STAC_DELL_M6_DMIC),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1958 "unknown Dell", STAC_DELL_M6_BOTH),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1960 "unknown Dell", STAC_DELL_M6_BOTH),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1962 "unknown Dell", STAC_DELL_M6_AMIC),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1964 "unknown Dell", STAC_DELL_M6_AMIC),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1966 "unknown Dell", STAC_DELL_M6_DMIC),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1968 "unknown Dell", STAC_DELL_M6_DMIC),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1970 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1972 "Dell Studio 17", STAC_DELL_M6_DMIC),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1974 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1976 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1978 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1980 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1981 /* codec SSID matching */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1983 "Alienware M17x", STAC_ALIENWARE_M17X),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1985 "Alienware M17x", STAC_ALIENWARE_M17X),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1987 "Alienware M17x R3", STAC_DELL_EQ),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1989 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
1990 {} /* terminator */
1991 };
1992
1993 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1994 { 0x0a, 0x02214030 },
1995 { 0x0b, 0x02211010 },
1996 { 0x0c, 0x02a19020 },
1997 { 0x0d, 0x02170130 },
1998 { 0x0e, 0x01014050 },
1999 { 0x0f, 0x01819040 },
2000 { 0x10, 0x01014020 },
2001 { 0x11, 0x90a3014e },
2002 { 0x1f, 0x01451160 },
2003 { 0x20, 0x98560170 },
2004 {}
2005 };
2006
2007 static const struct hda_pintbl dell_s14_pin_configs[] = {
2008 { 0x0a, 0x0221403f },
2009 { 0x0b, 0x0221101f },
2010 { 0x0c, 0x02a19020 },
2011 { 0x0d, 0x90170110 },
2012 { 0x0e, 0x40f000f0 },
2013 { 0x0f, 0x40f000f0 },
2014 { 0x10, 0x40f000f0 },
2015 { 0x11, 0x90a60160 },
2016 { 0x1f, 0x40f000f0 },
2017 { 0x20, 0x40f000f0 },
2018 {}
2019 };
2020
2021 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2022 { 0x0a, 0x02a11020 },
2023 { 0x0b, 0x0221101f },
2024 { 0x0c, 0x400000f0 },
2025 { 0x0d, 0x90170110 },
2026 { 0x0e, 0x400000f1 },
2027 { 0x0f, 0x400000f2 },
2028 { 0x10, 0x400000f3 },
2029 { 0x11, 0x90a60160 },
2030 { 0x1f, 0x400000f4 },
2031 { 0x20, 0x400000f5 },
2032 {}
2033 };
2034
2035 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2036 { 0x0a, 0x03a12050 },
2037 { 0x0b, 0x0321201f },
2038 { 0x0c, 0x40f000f0 },
2039 { 0x0d, 0x90170110 },
2040 { 0x0e, 0x40f000f0 },
2041 { 0x0f, 0x40f000f0 },
2042 { 0x10, 0x90170110 },
2043 { 0x11, 0xd5a30140 },
2044 { 0x1f, 0x40f000f0 },
2045 { 0x20, 0x40f000f0 },
2046 {}
2047 };
2048
2049 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2050 { 0x0a, 0x01813050 },
2051 { 0x0b, 0x0421201f },
2052 { 0x0c, 0x04a1205e },
2053 { 0x0d, 0x96130310 },
2054 { 0x0e, 0x96130310 },
2055 { 0x0f, 0x0101401f },
2056 { 0x10, 0x1111611f },
2057 { 0x11, 0xd5a30130 },
2058 {}
2059 };
2060
2061 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2062 { 0x0a, 0x40f000f0 },
2063 { 0x0b, 0x0221101f },
2064 { 0x0c, 0x02a11020 },
2065 { 0x0d, 0x92170110 },
2066 { 0x0e, 0x40f000f0 },
2067 { 0x0f, 0x92170110 },
2068 { 0x10, 0x40f000f0 },
2069 { 0x11, 0xd5a30130 },
2070 { 0x1f, 0x40f000f0 },
2071 { 0x20, 0x40f000f0 },
2072 {}
2073 };
2074
2075 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2076 const struct hda_fixup *fix, int action)
2077 {
2078 struct sigmatel_spec *spec = codec->spec;
2079
2080 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2081 return;
2082
2083 if (hp_bnb2011_with_dock(codec)) {
2084 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2085 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2086 }
2087
2088 if (find_mute_led_cfg(codec, spec->default_polarity))
2089 snd_printd("mute LED gpio %d polarity %d\n",
2090 spec->gpio_led,
2091 spec->gpio_led_polarity);
2092 }
2093
2094 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2095 const struct hda_fixup *fix, int action)
2096 {
2097 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2098 return;
2099
2100 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2101 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2102 }
2103
2104 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2105 const struct hda_fixup *fix, int action)
2106 {
2107 struct sigmatel_spec *spec = codec->spec;
2108
2109 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2110 spec->default_polarity = 0;
2111 }
2112
2113 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2114 const struct hda_fixup *fix, int action)
2115 {
2116 struct sigmatel_spec *spec = codec->spec;
2117
2118 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2119 spec->default_polarity = 1;
2120 }
2121
2122 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2123 const struct hda_fixup *fix, int action)
2124 {
2125 struct sigmatel_spec *spec = codec->spec;
2126
2127 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2128 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2129 /* resetting controller clears GPIO, so we need to keep on */
2130 codec->bus->power_keep_link_on = 1;
2131 }
2132 }
2133
2134 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2135 const struct hda_fixup *fix, int action)
2136 {
2137 struct sigmatel_spec *spec = codec->spec;
2138
2139 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2140 spec->gpio_led = 0x10; /* GPIO4 */
2141 spec->default_polarity = 0;
2142 }
2143 }
2144
2145 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2146 const struct hda_fixup *fix, int action)
2147 {
2148 struct sigmatel_spec *spec = codec->spec;
2149
2150 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2151 spec->headset_jack = 1;
2152 }
2153
2154 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2155 /* 44.1KHz base */
2156 { 0x22, 0x7A6, 0x3E },
2157 { 0x22, 0x7A7, 0x68 },
2158 { 0x22, 0x7A8, 0x17 },
2159 { 0x22, 0x7A9, 0x3E },
2160 { 0x22, 0x7AA, 0x68 },
2161 { 0x22, 0x7AB, 0x17 },
2162 { 0x22, 0x7AC, 0x00 },
2163 { 0x22, 0x7AD, 0x80 },
2164 { 0x22, 0x7A6, 0x83 },
2165 { 0x22, 0x7A7, 0x2F },
2166 { 0x22, 0x7A8, 0xD1 },
2167 { 0x22, 0x7A9, 0x83 },
2168 { 0x22, 0x7AA, 0x2F },
2169 { 0x22, 0x7AB, 0xD1 },
2170 { 0x22, 0x7AC, 0x01 },
2171 { 0x22, 0x7AD, 0x80 },
2172 { 0x22, 0x7A6, 0x3E },
2173 { 0x22, 0x7A7, 0x68 },
2174 { 0x22, 0x7A8, 0x17 },
2175 { 0x22, 0x7A9, 0x3E },
2176 { 0x22, 0x7AA, 0x68 },
2177 { 0x22, 0x7AB, 0x17 },
2178 { 0x22, 0x7AC, 0x02 },
2179 { 0x22, 0x7AD, 0x80 },
2180 { 0x22, 0x7A6, 0x7C },
2181 { 0x22, 0x7A7, 0xC6 },
2182 { 0x22, 0x7A8, 0x0C },
2183 { 0x22, 0x7A9, 0x7C },
2184 { 0x22, 0x7AA, 0xC6 },
2185 { 0x22, 0x7AB, 0x0C },
2186 { 0x22, 0x7AC, 0x03 },
2187 { 0x22, 0x7AD, 0x80 },
2188 { 0x22, 0x7A6, 0xC3 },
2189 { 0x22, 0x7A7, 0x25 },
2190 { 0x22, 0x7A8, 0xAF },
2191 { 0x22, 0x7A9, 0xC3 },
2192 { 0x22, 0x7AA, 0x25 },
2193 { 0x22, 0x7AB, 0xAF },
2194 { 0x22, 0x7AC, 0x04 },
2195 { 0x22, 0x7AD, 0x80 },
2196 { 0x22, 0x7A6, 0x3E },
2197 { 0x22, 0x7A7, 0x85 },
2198 { 0x22, 0x7A8, 0x73 },
2199 { 0x22, 0x7A9, 0x3E },
2200 { 0x22, 0x7AA, 0x85 },
2201 { 0x22, 0x7AB, 0x73 },
2202 { 0x22, 0x7AC, 0x05 },
2203 { 0x22, 0x7AD, 0x80 },
2204 { 0x22, 0x7A6, 0x85 },
2205 { 0x22, 0x7A7, 0x39 },
2206 { 0x22, 0x7A8, 0xC7 },
2207 { 0x22, 0x7A9, 0x85 },
2208 { 0x22, 0x7AA, 0x39 },
2209 { 0x22, 0x7AB, 0xC7 },
2210 { 0x22, 0x7AC, 0x06 },
2211 { 0x22, 0x7AD, 0x80 },
2212 { 0x22, 0x7A6, 0x3C },
2213 { 0x22, 0x7A7, 0x90 },
2214 { 0x22, 0x7A8, 0xB0 },
2215 { 0x22, 0x7A9, 0x3C },
2216 { 0x22, 0x7AA, 0x90 },
2217 { 0x22, 0x7AB, 0xB0 },
2218 { 0x22, 0x7AC, 0x07 },
2219 { 0x22, 0x7AD, 0x80 },
2220 { 0x22, 0x7A6, 0x7A },
2221 { 0x22, 0x7A7, 0xC6 },
2222 { 0x22, 0x7A8, 0x39 },
2223 { 0x22, 0x7A9, 0x7A },
2224 { 0x22, 0x7AA, 0xC6 },
2225 { 0x22, 0x7AB, 0x39 },
2226 { 0x22, 0x7AC, 0x08 },
2227 { 0x22, 0x7AD, 0x80 },
2228 { 0x22, 0x7A6, 0xC4 },
2229 { 0x22, 0x7A7, 0xE9 },
2230 { 0x22, 0x7A8, 0xDC },
2231 { 0x22, 0x7A9, 0xC4 },
2232 { 0x22, 0x7AA, 0xE9 },
2233 { 0x22, 0x7AB, 0xDC },
2234 { 0x22, 0x7AC, 0x09 },
2235 { 0x22, 0x7AD, 0x80 },
2236 { 0x22, 0x7A6, 0x3D },
2237 { 0x22, 0x7A7, 0xE1 },
2238 { 0x22, 0x7A8, 0x0D },
2239 { 0x22, 0x7A9, 0x3D },
2240 { 0x22, 0x7AA, 0xE1 },
2241 { 0x22, 0x7AB, 0x0D },
2242 { 0x22, 0x7AC, 0x0A },
2243 { 0x22, 0x7AD, 0x80 },
2244 { 0x22, 0x7A6, 0x89 },
2245 { 0x22, 0x7A7, 0xB6 },
2246 { 0x22, 0x7A8, 0xEB },
2247 { 0x22, 0x7A9, 0x89 },
2248 { 0x22, 0x7AA, 0xB6 },
2249 { 0x22, 0x7AB, 0xEB },
2250 { 0x22, 0x7AC, 0x0B },
2251 { 0x22, 0x7AD, 0x80 },
2252 { 0x22, 0x7A6, 0x39 },
2253 { 0x22, 0x7A7, 0x9D },
2254 { 0x22, 0x7A8, 0xFE },
2255 { 0x22, 0x7A9, 0x39 },
2256 { 0x22, 0x7AA, 0x9D },
2257 { 0x22, 0x7AB, 0xFE },
2258 { 0x22, 0x7AC, 0x0C },
2259 { 0x22, 0x7AD, 0x80 },
2260 { 0x22, 0x7A6, 0x76 },
2261 { 0x22, 0x7A7, 0x49 },
2262 { 0x22, 0x7A8, 0x15 },
2263 { 0x22, 0x7A9, 0x76 },
2264 { 0x22, 0x7AA, 0x49 },
2265 { 0x22, 0x7AB, 0x15 },
2266 { 0x22, 0x7AC, 0x0D },
2267 { 0x22, 0x7AD, 0x80 },
2268 { 0x22, 0x7A6, 0xC8 },
2269 { 0x22, 0x7A7, 0x80 },
2270 { 0x22, 0x7A8, 0xF5 },
2271 { 0x22, 0x7A9, 0xC8 },
2272 { 0x22, 0x7AA, 0x80 },
2273 { 0x22, 0x7AB, 0xF5 },
2274 { 0x22, 0x7AC, 0x0E },
2275 { 0x22, 0x7AD, 0x80 },
2276 { 0x22, 0x7A6, 0x40 },
2277 { 0x22, 0x7A7, 0x00 },
2278 { 0x22, 0x7A8, 0x00 },
2279 { 0x22, 0x7A9, 0x40 },
2280 { 0x22, 0x7AA, 0x00 },
2281 { 0x22, 0x7AB, 0x00 },
2282 { 0x22, 0x7AC, 0x0F },
2283 { 0x22, 0x7AD, 0x80 },
2284 { 0x22, 0x7A6, 0x90 },
2285 { 0x22, 0x7A7, 0x68 },
2286 { 0x22, 0x7A8, 0xF1 },
2287 { 0x22, 0x7A9, 0x90 },
2288 { 0x22, 0x7AA, 0x68 },
2289 { 0x22, 0x7AB, 0xF1 },
2290 { 0x22, 0x7AC, 0x10 },
2291 { 0x22, 0x7AD, 0x80 },
2292 { 0x22, 0x7A6, 0x34 },
2293 { 0x22, 0x7A7, 0x47 },
2294 { 0x22, 0x7A8, 0x6C },
2295 { 0x22, 0x7A9, 0x34 },
2296 { 0x22, 0x7AA, 0x47 },
2297 { 0x22, 0x7AB, 0x6C },
2298 { 0x22, 0x7AC, 0x11 },
2299 { 0x22, 0x7AD, 0x80 },
2300 { 0x22, 0x7A6, 0x6F },
2301 { 0x22, 0x7A7, 0x97 },
2302 { 0x22, 0x7A8, 0x0F },
2303 { 0x22, 0x7A9, 0x6F },
2304 { 0x22, 0x7AA, 0x97 },
2305 { 0x22, 0x7AB, 0x0F },
2306 { 0x22, 0x7AC, 0x12 },
2307 { 0x22, 0x7AD, 0x80 },
2308 { 0x22, 0x7A6, 0xCB },
2309 { 0x22, 0x7A7, 0xB8 },
2310 { 0x22, 0x7A8, 0x94 },
2311 { 0x22, 0x7A9, 0xCB },
2312 { 0x22, 0x7AA, 0xB8 },
2313 { 0x22, 0x7AB, 0x94 },
2314 { 0x22, 0x7AC, 0x13 },
2315 { 0x22, 0x7AD, 0x80 },
2316 { 0x22, 0x7A6, 0x40 },
2317 { 0x22, 0x7A7, 0x00 },
2318 { 0x22, 0x7A8, 0x00 },
2319 { 0x22, 0x7A9, 0x40 },
2320 { 0x22, 0x7AA, 0x00 },
2321 { 0x22, 0x7AB, 0x00 },
2322 { 0x22, 0x7AC, 0x14 },
2323 { 0x22, 0x7AD, 0x80 },
2324 { 0x22, 0x7A6, 0x95 },
2325 { 0x22, 0x7A7, 0x76 },
2326 { 0x22, 0x7A8, 0x5B },
2327 { 0x22, 0x7A9, 0x95 },
2328 { 0x22, 0x7AA, 0x76 },
2329 { 0x22, 0x7AB, 0x5B },
2330 { 0x22, 0x7AC, 0x15 },
2331 { 0x22, 0x7AD, 0x80 },
2332 { 0x22, 0x7A6, 0x31 },
2333 { 0x22, 0x7A7, 0xAC },
2334 { 0x22, 0x7A8, 0x31 },
2335 { 0x22, 0x7A9, 0x31 },
2336 { 0x22, 0x7AA, 0xAC },
2337 { 0x22, 0x7AB, 0x31 },
2338 { 0x22, 0x7AC, 0x16 },
2339 { 0x22, 0x7AD, 0x80 },
2340 { 0x22, 0x7A6, 0x6A },
2341 { 0x22, 0x7A7, 0x89 },
2342 { 0x22, 0x7A8, 0xA5 },
2343 { 0x22, 0x7A9, 0x6A },
2344 { 0x22, 0x7AA, 0x89 },
2345 { 0x22, 0x7AB, 0xA5 },
2346 { 0x22, 0x7AC, 0x17 },
2347 { 0x22, 0x7AD, 0x80 },
2348 { 0x22, 0x7A6, 0xCE },
2349 { 0x22, 0x7A7, 0x53 },
2350 { 0x22, 0x7A8, 0xCF },
2351 { 0x22, 0x7A9, 0xCE },
2352 { 0x22, 0x7AA, 0x53 },
2353 { 0x22, 0x7AB, 0xCF },
2354 { 0x22, 0x7AC, 0x18 },
2355 { 0x22, 0x7AD, 0x80 },
2356 { 0x22, 0x7A6, 0x40 },
2357 { 0x22, 0x7A7, 0x00 },
2358 { 0x22, 0x7A8, 0x00 },
2359 { 0x22, 0x7A9, 0x40 },
2360 { 0x22, 0x7AA, 0x00 },
2361 { 0x22, 0x7AB, 0x00 },
2362 { 0x22, 0x7AC, 0x19 },
2363 { 0x22, 0x7AD, 0x80 },
2364 /* 48KHz base */
2365 { 0x22, 0x7A6, 0x3E },
2366 { 0x22, 0x7A7, 0x88 },
2367 { 0x22, 0x7A8, 0xDC },
2368 { 0x22, 0x7A9, 0x3E },
2369 { 0x22, 0x7AA, 0x88 },
2370 { 0x22, 0x7AB, 0xDC },
2371 { 0x22, 0x7AC, 0x1A },
2372 { 0x22, 0x7AD, 0x80 },
2373 { 0x22, 0x7A6, 0x82 },
2374 { 0x22, 0x7A7, 0xEE },
2375 { 0x22, 0x7A8, 0x46 },
2376 { 0x22, 0x7A9, 0x82 },
2377 { 0x22, 0x7AA, 0xEE },
2378 { 0x22, 0x7AB, 0x46 },
2379 { 0x22, 0x7AC, 0x1B },
2380 { 0x22, 0x7AD, 0x80 },
2381 { 0x22, 0x7A6, 0x3E },
2382 { 0x22, 0x7A7, 0x88 },
2383 { 0x22, 0x7A8, 0xDC },
2384 { 0x22, 0x7A9, 0x3E },
2385 { 0x22, 0x7AA, 0x88 },
2386 { 0x22, 0x7AB, 0xDC },
2387 { 0x22, 0x7AC, 0x1C },
2388 { 0x22, 0x7AD, 0x80 },
2389 { 0x22, 0x7A6, 0x7D },
2390 { 0x22, 0x7A7, 0x09 },
2391 { 0x22, 0x7A8, 0x28 },
2392 { 0x22, 0x7A9, 0x7D },
2393 { 0x22, 0x7AA, 0x09 },
2394 { 0x22, 0x7AB, 0x28 },
2395 { 0x22, 0x7AC, 0x1D },
2396 { 0x22, 0x7AD, 0x80 },
2397 { 0x22, 0x7A6, 0xC2 },
2398 { 0x22, 0x7A7, 0xE5 },
2399 { 0x22, 0x7A8, 0xB4 },
2400 { 0x22, 0x7A9, 0xC2 },
2401 { 0x22, 0x7AA, 0xE5 },
2402 { 0x22, 0x7AB, 0xB4 },
2403 { 0x22, 0x7AC, 0x1E },
2404 { 0x22, 0x7AD, 0x80 },
2405 { 0x22, 0x7A6, 0x3E },
2406 { 0x22, 0x7A7, 0xA3 },
2407 { 0x22, 0x7A8, 0x1F },
2408 { 0x22, 0x7A9, 0x3E },
2409 { 0x22, 0x7AA, 0xA3 },
2410 { 0x22, 0x7AB, 0x1F },
2411 { 0x22, 0x7AC, 0x1F },
2412 { 0x22, 0x7AD, 0x80 },
2413 { 0x22, 0x7A6, 0x84 },
2414 { 0x22, 0x7A7, 0xCA },
2415 { 0x22, 0x7A8, 0xF1 },
2416 { 0x22, 0x7A9, 0x84 },
2417 { 0x22, 0x7AA, 0xCA },
2418 { 0x22, 0x7AB, 0xF1 },
2419 { 0x22, 0x7AC, 0x20 },
2420 { 0x22, 0x7AD, 0x80 },
2421 { 0x22, 0x7A6, 0x3C },
2422 { 0x22, 0x7A7, 0xD5 },
2423 { 0x22, 0x7A8, 0x9C },
2424 { 0x22, 0x7A9, 0x3C },
2425 { 0x22, 0x7AA, 0xD5 },
2426 { 0x22, 0x7AB, 0x9C },
2427 { 0x22, 0x7AC, 0x21 },
2428 { 0x22, 0x7AD, 0x80 },
2429 { 0x22, 0x7A6, 0x7B },
2430 { 0x22, 0x7A7, 0x35 },
2431 { 0x22, 0x7A8, 0x0F },
2432 { 0x22, 0x7A9, 0x7B },
2433 { 0x22, 0x7AA, 0x35 },
2434 { 0x22, 0x7AB, 0x0F },
2435 { 0x22, 0x7AC, 0x22 },
2436 { 0x22, 0x7AD, 0x80 },
2437 { 0x22, 0x7A6, 0xC4 },
2438 { 0x22, 0x7A7, 0x87 },
2439 { 0x22, 0x7A8, 0x45 },
2440 { 0x22, 0x7A9, 0xC4 },
2441 { 0x22, 0x7AA, 0x87 },
2442 { 0x22, 0x7AB, 0x45 },
2443 { 0x22, 0x7AC, 0x23 },
2444 { 0x22, 0x7AD, 0x80 },
2445 { 0x22, 0x7A6, 0x3E },
2446 { 0x22, 0x7A7, 0x0A },
2447 { 0x22, 0x7A8, 0x78 },
2448 { 0x22, 0x7A9, 0x3E },
2449 { 0x22, 0x7AA, 0x0A },
2450 { 0x22, 0x7AB, 0x78 },
2451 { 0x22, 0x7AC, 0x24 },
2452 { 0x22, 0x7AD, 0x80 },
2453 { 0x22, 0x7A6, 0x88 },
2454 { 0x22, 0x7A7, 0xE2 },
2455 { 0x22, 0x7A8, 0x05 },
2456 { 0x22, 0x7A9, 0x88 },
2457 { 0x22, 0x7AA, 0xE2 },
2458 { 0x22, 0x7AB, 0x05 },
2459 { 0x22, 0x7AC, 0x25 },
2460 { 0x22, 0x7AD, 0x80 },
2461 { 0x22, 0x7A6, 0x3A },
2462 { 0x22, 0x7A7, 0x1A },
2463 { 0x22, 0x7A8, 0xA3 },
2464 { 0x22, 0x7A9, 0x3A },
2465 { 0x22, 0x7AA, 0x1A },
2466 { 0x22, 0x7AB, 0xA3 },
2467 { 0x22, 0x7AC, 0x26 },
2468 { 0x22, 0x7AD, 0x80 },
2469 { 0x22, 0x7A6, 0x77 },
2470 { 0x22, 0x7A7, 0x1D },
2471 { 0x22, 0x7A8, 0xFB },
2472 { 0x22, 0x7A9, 0x77 },
2473 { 0x22, 0x7AA, 0x1D },
2474 { 0x22, 0x7AB, 0xFB },
2475 { 0x22, 0x7AC, 0x27 },
2476 { 0x22, 0x7AD, 0x80 },
2477 { 0x22, 0x7A6, 0xC7 },
2478 { 0x22, 0x7A7, 0xDA },
2479 { 0x22, 0x7A8, 0xE5 },
2480 { 0x22, 0x7A9, 0xC7 },
2481 { 0x22, 0x7AA, 0xDA },
2482 { 0x22, 0x7AB, 0xE5 },
2483 { 0x22, 0x7AC, 0x28 },
2484 { 0x22, 0x7AD, 0x80 },
2485 { 0x22, 0x7A6, 0x40 },
2486 { 0x22, 0x7A7, 0x00 },
2487 { 0x22, 0x7A8, 0x00 },
2488 { 0x22, 0x7A9, 0x40 },
2489 { 0x22, 0x7AA, 0x00 },
2490 { 0x22, 0x7AB, 0x00 },
2491 { 0x22, 0x7AC, 0x29 },
2492 { 0x22, 0x7AD, 0x80 },
2493 { 0x22, 0x7A6, 0x8E },
2494 { 0x22, 0x7A7, 0xD7 },
2495 { 0x22, 0x7A8, 0x22 },
2496 { 0x22, 0x7A9, 0x8E },
2497 { 0x22, 0x7AA, 0xD7 },
2498 { 0x22, 0x7AB, 0x22 },
2499 { 0x22, 0x7AC, 0x2A },
2500 { 0x22, 0x7AD, 0x80 },
2501 { 0x22, 0x7A6, 0x35 },
2502 { 0x22, 0x7A7, 0x26 },
2503 { 0x22, 0x7A8, 0xC6 },
2504 { 0x22, 0x7A9, 0x35 },
2505 { 0x22, 0x7AA, 0x26 },
2506 { 0x22, 0x7AB, 0xC6 },
2507 { 0x22, 0x7AC, 0x2B },
2508 { 0x22, 0x7AD, 0x80 },
2509 { 0x22, 0x7A6, 0x71 },
2510 { 0x22, 0x7A7, 0x28 },
2511 { 0x22, 0x7A8, 0xDE },
2512 { 0x22, 0x7A9, 0x71 },
2513 { 0x22, 0x7AA, 0x28 },
2514 { 0x22, 0x7AB, 0xDE },
2515 { 0x22, 0x7AC, 0x2C },
2516 { 0x22, 0x7AD, 0x80 },
2517 { 0x22, 0x7A6, 0xCA },
2518 { 0x22, 0x7A7, 0xD9 },
2519 { 0x22, 0x7A8, 0x3A },
2520 { 0x22, 0x7A9, 0xCA },
2521 { 0x22, 0x7AA, 0xD9 },
2522 { 0x22, 0x7AB, 0x3A },
2523 { 0x22, 0x7AC, 0x2D },
2524 { 0x22, 0x7AD, 0x80 },
2525 { 0x22, 0x7A6, 0x40 },
2526 { 0x22, 0x7A7, 0x00 },
2527 { 0x22, 0x7A8, 0x00 },
2528 { 0x22, 0x7A9, 0x40 },
2529 { 0x22, 0x7AA, 0x00 },
2530 { 0x22, 0x7AB, 0x00 },
2531 { 0x22, 0x7AC, 0x2E },
2532 { 0x22, 0x7AD, 0x80 },
2533 { 0x22, 0x7A6, 0x93 },
2534 { 0x22, 0x7A7, 0x5E },
2535 { 0x22, 0x7A8, 0xD8 },
2536 { 0x22, 0x7A9, 0x93 },
2537 { 0x22, 0x7AA, 0x5E },
2538 { 0x22, 0x7AB, 0xD8 },
2539 { 0x22, 0x7AC, 0x2F },
2540 { 0x22, 0x7AD, 0x80 },
2541 { 0x22, 0x7A6, 0x32 },
2542 { 0x22, 0x7A7, 0xB7 },
2543 { 0x22, 0x7A8, 0xB1 },
2544 { 0x22, 0x7A9, 0x32 },
2545 { 0x22, 0x7AA, 0xB7 },
2546 { 0x22, 0x7AB, 0xB1 },
2547 { 0x22, 0x7AC, 0x30 },
2548 { 0x22, 0x7AD, 0x80 },
2549 { 0x22, 0x7A6, 0x6C },
2550 { 0x22, 0x7A7, 0xA1 },
2551 { 0x22, 0x7A8, 0x28 },
2552 { 0x22, 0x7A9, 0x6C },
2553 { 0x22, 0x7AA, 0xA1 },
2554 { 0x22, 0x7AB, 0x28 },
2555 { 0x22, 0x7AC, 0x31 },
2556 { 0x22, 0x7AD, 0x80 },
2557 { 0x22, 0x7A6, 0xCD },
2558 { 0x22, 0x7A7, 0x48 },
2559 { 0x22, 0x7A8, 0x4F },
2560 { 0x22, 0x7A9, 0xCD },
2561 { 0x22, 0x7AA, 0x48 },
2562 { 0x22, 0x7AB, 0x4F },
2563 { 0x22, 0x7AC, 0x32 },
2564 { 0x22, 0x7AD, 0x80 },
2565 { 0x22, 0x7A6, 0x40 },
2566 { 0x22, 0x7A7, 0x00 },
2567 { 0x22, 0x7A8, 0x00 },
2568 { 0x22, 0x7A9, 0x40 },
2569 { 0x22, 0x7AA, 0x00 },
2570 { 0x22, 0x7AB, 0x00 },
2571 { 0x22, 0x7AC, 0x33 },
2572 { 0x22, 0x7AD, 0x80 },
2573 /* common */
2574 { 0x22, 0x782, 0xC1 },
2575 { 0x22, 0x771, 0x2C },
2576 { 0x22, 0x772, 0x2C },
2577 { 0x22, 0x788, 0x04 },
2578 { 0x01, 0x7B0, 0x08 },
2579 {}
2580 };
2581
2582 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2583 [STAC_92HD83XXX_REF] = {
2584 .type = HDA_FIXUP_PINS,
2585 .v.pins = ref92hd83xxx_pin_configs,
2586 },
2587 [STAC_92HD83XXX_PWR_REF] = {
2588 .type = HDA_FIXUP_PINS,
2589 .v.pins = ref92hd83xxx_pin_configs,
2590 },
2591 [STAC_DELL_S14] = {
2592 .type = HDA_FIXUP_PINS,
2593 .v.pins = dell_s14_pin_configs,
2594 },
2595 [STAC_DELL_VOSTRO_3500] = {
2596 .type = HDA_FIXUP_PINS,
2597 .v.pins = dell_vostro_3500_pin_configs,
2598 },
2599 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2600 .type = HDA_FIXUP_PINS,
2601 .v.pins = hp_cNB11_intquad_pin_configs,
2602 .chained = true,
2603 .chain_id = STAC_92HD83XXX_HP,
2604 },
2605 [STAC_92HD83XXX_HP] = {
2606 .type = HDA_FIXUP_FUNC,
2607 .v.func = stac92hd83xxx_fixup_hp,
2608 },
2609 [STAC_HP_DV7_4000] = {
2610 .type = HDA_FIXUP_PINS,
2611 .v.pins = hp_dv7_4000_pin_configs,
2612 .chained = true,
2613 .chain_id = STAC_92HD83XXX_HP,
2614 },
2615 [STAC_HP_ZEPHYR] = {
2616 .type = HDA_FIXUP_FUNC,
2617 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2618 .chained = true,
2619 .chain_id = STAC_92HD83XXX_HP,
2620 },
2621 [STAC_92HD83XXX_HP_LED] = {
2622 .type = HDA_FIXUP_FUNC,
2623 .v.func = stac92hd83xxx_fixup_hp_led,
2624 .chained = true,
2625 .chain_id = STAC_92HD83XXX_HP,
2626 },
2627 [STAC_92HD83XXX_HP_INV_LED] = {
2628 .type = HDA_FIXUP_FUNC,
2629 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2630 .chained = true,
2631 .chain_id = STAC_92HD83XXX_HP,
2632 },
2633 [STAC_92HD83XXX_HP_MIC_LED] = {
2634 .type = HDA_FIXUP_FUNC,
2635 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2636 .chained = true,
2637 .chain_id = STAC_92HD83XXX_HP,
2638 },
2639 [STAC_HP_LED_GPIO10] = {
2640 .type = HDA_FIXUP_FUNC,
2641 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2642 .chained = true,
2643 .chain_id = STAC_92HD83XXX_HP,
2644 },
2645 [STAC_92HD83XXX_HEADSET_JACK] = {
2646 .type = HDA_FIXUP_FUNC,
2647 .v.func = stac92hd83xxx_fixup_headset_jack,
2648 },
2649 [STAC_HP_ENVY_BASS] = {
2650 .type = HDA_FIXUP_PINS,
2651 .v.pins = (const struct hda_pintbl[]) {
2652 { 0x0f, 0x90170111 },
2653 {}
2654 },
2655 },
2656 [STAC_HP_BNB13_EQ] = {
2657 .type = HDA_FIXUP_VERBS,
2658 .v.verbs = hp_bnb13_eq_verbs,
2659 .chained = true,
2660 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2661 },
2662 };
2663
2664 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2665 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2666 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2667 { .id = STAC_DELL_S14, .name = "dell-s14" },
2668 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2669 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2670 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2671 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2672 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2673 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2674 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2675 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2676 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2677 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2678 {}
2679 };
2680
2681 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2682 /* SigmaTel reference board */
2683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2684 "DFI LanParty", STAC_92HD83XXX_REF),
2685 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2686 "DFI LanParty", STAC_92HD83XXX_REF),
2687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2688 "unknown Dell", STAC_DELL_S14),
2689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2690 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2692 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2694 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2696 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2698 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2700 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2702 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2704 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2706 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2708 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2709 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2710 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2711 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2712 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2713 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2714 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2715 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2716 "HP Pavilion dv7", STAC_HP_DV7_4000),
2717 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2718 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2719 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2720 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2722 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2724 "HP Folio 13", STAC_HP_LED_GPIO10),
2725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2726 "HP Folio", STAC_HP_BNB13_EQ),
2727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2728 "HP bNB13", STAC_HP_BNB13_EQ),
2729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2730 "HP bNB13", STAC_HP_BNB13_EQ),
2731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2732 "HP bNB13", STAC_HP_BNB13_EQ),
2733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2734 "HP bNB13", STAC_HP_BNB13_EQ),
2735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2736 "HP bNB13", STAC_HP_BNB13_EQ),
2737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2738 "HP bNB13", STAC_HP_BNB13_EQ),
2739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2740 "HP bNB13", STAC_HP_BNB13_EQ),
2741 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2742 "HP bNB13", STAC_HP_BNB13_EQ),
2743 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2744 "HP bNB13", STAC_HP_BNB13_EQ),
2745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2746 "HP bNB13", STAC_HP_BNB13_EQ),
2747 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2748 "HP bNB13", STAC_HP_BNB13_EQ),
2749 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2750 "HP bNB13", STAC_HP_BNB13_EQ),
2751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2752 "HP bNB13", STAC_HP_BNB13_EQ),
2753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2754 "HP bNB13", STAC_HP_BNB13_EQ),
2755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2756 "HP bNB13", STAC_HP_BNB13_EQ),
2757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2758 "HP bNB13", STAC_HP_BNB13_EQ),
2759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2760 "HP bNB13", STAC_HP_BNB13_EQ),
2761 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2762 "HP bNB13", STAC_HP_BNB13_EQ),
2763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2764 "HP bNB13", STAC_HP_BNB13_EQ),
2765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2766 "HP bNB13", STAC_HP_BNB13_EQ),
2767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2768 "HP bNB13", STAC_HP_BNB13_EQ),
2769 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2770 "HP bNB13", STAC_HP_BNB13_EQ),
2771 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2772 "HP bNB13", STAC_HP_BNB13_EQ),
2773 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2774 "HP bNB13", STAC_HP_BNB13_EQ),
2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2776 "HP bNB13", STAC_HP_BNB13_EQ),
2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2778 "HP bNB13", STAC_HP_BNB13_EQ),
2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2780 "HP bNB13", STAC_HP_BNB13_EQ),
2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2782 "HP bNB13", STAC_HP_BNB13_EQ),
2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2784 "HP bNB13", STAC_HP_BNB13_EQ),
2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2786 "HP bNB13", STAC_HP_BNB13_EQ),
2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2788 "HP bNB13", STAC_HP_BNB13_EQ),
2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2790 "HP bNB13", STAC_HP_BNB13_EQ),
2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2792 "HP bNB13", STAC_HP_BNB13_EQ),
2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2794 "HP bNB13", STAC_HP_BNB13_EQ),
2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2796 "HP bNB13", STAC_HP_BNB13_EQ),
2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2798 "HP bNB13", STAC_HP_BNB13_EQ),
2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2800 "HP bNB13", STAC_HP_BNB13_EQ),
2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2802 "HP bNB13", STAC_HP_BNB13_EQ),
2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2804 "HP bNB13", STAC_HP_BNB13_EQ),
2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2806 "HP bNB13", STAC_HP_BNB13_EQ),
2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2808 "HP bNB13", STAC_HP_BNB13_EQ),
2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2810 "HP bNB13", STAC_HP_BNB13_EQ),
2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2812 "HP bNB13", STAC_HP_BNB13_EQ),
2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2814 "HP bNB13", STAC_HP_BNB13_EQ),
2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2816 "HP bNB13", STAC_HP_BNB13_EQ),
2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2818 "HP bNB13", STAC_HP_BNB13_EQ),
2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2820 "HP bNB13", STAC_HP_BNB13_EQ),
2821 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2822 "HP", STAC_92HD83XXX_HP_MIC_LED),
2823 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2824 "HP", STAC_92HD83XXX_HP_MIC_LED),
2825 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2826 "HP", STAC_92HD83XXX_HP_MIC_LED),
2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2828 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2830 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2832 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2834 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2836 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2838 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2839 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2840 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2841 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2842 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2843 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2844 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2846 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2848 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2850 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2852 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2854 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2856 "HP", STAC_HP_ZEPHYR),
2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2858 "HP Mini", STAC_92HD83XXX_HP_LED),
2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2860 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2862 "HP Mini", STAC_92HD83XXX_HP_LED),
2863 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2864 {} /* terminator */
2865 };
2866
2867 /* HP dv7 bass switch - GPIO5 */
2868 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2869 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2870 struct snd_ctl_elem_value *ucontrol)
2871 {
2872 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2873 struct sigmatel_spec *spec = codec->spec;
2874 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2875 return 0;
2876 }
2877
2878 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2879 struct snd_ctl_elem_value *ucontrol)
2880 {
2881 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2882 struct sigmatel_spec *spec = codec->spec;
2883 unsigned int gpio_data;
2884
2885 gpio_data = (spec->gpio_data & ~0x20) |
2886 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2887 if (gpio_data == spec->gpio_data)
2888 return 0;
2889 spec->gpio_data = gpio_data;
2890 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2891 return 1;
2892 }
2893
2894 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2895 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2896 .info = stac_hp_bass_gpio_info,
2897 .get = stac_hp_bass_gpio_get,
2898 .put = stac_hp_bass_gpio_put,
2899 };
2900
2901 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2902 {
2903 struct sigmatel_spec *spec = codec->spec;
2904
2905 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2906 &stac_hp_bass_sw_ctrl))
2907 return -ENOMEM;
2908
2909 spec->gpio_mask |= 0x20;
2910 spec->gpio_dir |= 0x20;
2911 spec->gpio_data |= 0x20;
2912 return 0;
2913 }
2914
2915 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2916 { 0x0a, 0x02214030 },
2917 { 0x0b, 0x02a19040 },
2918 { 0x0c, 0x01a19020 },
2919 { 0x0d, 0x01014010 },
2920 { 0x0e, 0x0181302e },
2921 { 0x0f, 0x01014010 },
2922 { 0x14, 0x01019020 },
2923 { 0x18, 0x90a000f0 },
2924 { 0x19, 0x90a000f0 },
2925 { 0x1e, 0x01452050 },
2926 { 0x1f, 0x01452050 },
2927 {}
2928 };
2929
2930 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2931 { 0x0a, 0x0421101f },
2932 { 0x0b, 0x04a11221 },
2933 { 0x0c, 0x40f000f0 },
2934 { 0x0d, 0x90170110 },
2935 { 0x0e, 0x23a1902e },
2936 { 0x0f, 0x23014250 },
2937 { 0x14, 0x40f000f0 },
2938 { 0x18, 0x90a000f0 },
2939 { 0x19, 0x40f000f0 },
2940 { 0x1e, 0x4f0000f0 },
2941 { 0x1f, 0x4f0000f0 },
2942 {}
2943 };
2944
2945 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2946 { 0x0a, 0x0421101f },
2947 { 0x0b, 0x04a11221 },
2948 { 0x0c, 0x90a70330 },
2949 { 0x0d, 0x90170110 },
2950 { 0x0e, 0x23a1902e },
2951 { 0x0f, 0x23014250 },
2952 { 0x14, 0x40f000f0 },
2953 { 0x18, 0x40f000f0 },
2954 { 0x19, 0x40f000f0 },
2955 { 0x1e, 0x044413b0 },
2956 { 0x1f, 0x044413b0 },
2957 {}
2958 };
2959
2960 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2961 { 0x0a, 0x0421101f },
2962 { 0x0b, 0x04a11221 },
2963 { 0x0c, 0x90a70330 },
2964 { 0x0d, 0x90170110 },
2965 { 0x0e, 0x40f000f0 },
2966 { 0x0f, 0x40f000f0 },
2967 { 0x14, 0x40f000f0 },
2968 { 0x18, 0x90a000f0 },
2969 { 0x19, 0x40f000f0 },
2970 { 0x1e, 0x044413b0 },
2971 { 0x1f, 0x044413b0 },
2972 {}
2973 };
2974
2975 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2976 const struct hda_fixup *fix, int action)
2977 {
2978 struct sigmatel_spec *spec = codec->spec;
2979
2980 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2981 return;
2982
2983 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2984 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2985 }
2986
2987 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2988 const struct hda_fixup *fix, int action)
2989 {
2990 struct sigmatel_spec *spec = codec->spec;
2991 struct hda_jack_tbl *jack;
2992
2993 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2994 return;
2995
2996 /* Enable VREF power saving on GPIO1 detect */
2997 snd_hda_codec_write_cache(codec, codec->afg, 0,
2998 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
2999 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3000 STAC_VREF_EVENT,
3001 stac_vref_event);
3002 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3003 if (jack)
3004 jack->private_data = 0x02;
3005
3006 spec->gpio_mask |= 0x02;
3007
3008 /* enable internal microphone */
3009 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3010 }
3011
3012 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3013 const struct hda_fixup *fix, int action)
3014 {
3015 struct sigmatel_spec *spec = codec->spec;
3016
3017 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3018 return;
3019 spec->gpio_led = 0x01;
3020 }
3021
3022 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3023 const struct hda_fixup *fix, int action)
3024 {
3025 unsigned int cap;
3026
3027 switch (action) {
3028 case HDA_FIXUP_ACT_PRE_PROBE:
3029 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3030 break;
3031
3032 case HDA_FIXUP_ACT_PROBE:
3033 /* enable bass on HP dv7 */
3034 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3035 cap &= AC_GPIO_IO_COUNT;
3036 if (cap >= 6)
3037 stac_add_hp_bass_switch(codec);
3038 break;
3039 }
3040 }
3041
3042 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3043 const struct hda_fixup *fix, int action)
3044 {
3045 struct sigmatel_spec *spec = codec->spec;
3046
3047 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3048 return;
3049 spec->gpio_led = 0x08;
3050 }
3051
3052
3053 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3054 const struct hda_fixup *fix, int action)
3055 {
3056 struct sigmatel_spec *spec = codec->spec;
3057
3058 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3059 return;
3060
3061 if (hp_blike_system(codec->subsystem_id)) {
3062 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
3063 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3064 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
3065 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
3066 /* It was changed in the BIOS to just satisfy MS DTM.
3067 * Lets turn it back into slaved HP
3068 */
3069 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
3070 | (AC_JACK_HP_OUT <<
3071 AC_DEFCFG_DEVICE_SHIFT);
3072 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
3073 | AC_DEFCFG_SEQUENCE)))
3074 | 0x1f;
3075 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
3076 }
3077 }
3078
3079 if (find_mute_led_cfg(codec, 1))
3080 snd_printd("mute LED gpio %d polarity %d\n",
3081 spec->gpio_led,
3082 spec->gpio_led_polarity);
3083
3084 }
3085
3086 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3087 [STAC_92HD71BXX_REF] = {
3088 .type = HDA_FIXUP_FUNC,
3089 .v.func = stac92hd71bxx_fixup_ref,
3090 },
3091 [STAC_DELL_M4_1] = {
3092 .type = HDA_FIXUP_PINS,
3093 .v.pins = dell_m4_1_pin_configs,
3094 },
3095 [STAC_DELL_M4_2] = {
3096 .type = HDA_FIXUP_PINS,
3097 .v.pins = dell_m4_2_pin_configs,
3098 },
3099 [STAC_DELL_M4_3] = {
3100 .type = HDA_FIXUP_PINS,
3101 .v.pins = dell_m4_3_pin_configs,
3102 },
3103 [STAC_HP_M4] = {
3104 .type = HDA_FIXUP_FUNC,
3105 .v.func = stac92hd71bxx_fixup_hp_m4,
3106 .chained = true,
3107 .chain_id = STAC_92HD71BXX_HP,
3108 },
3109 [STAC_HP_DV4] = {
3110 .type = HDA_FIXUP_FUNC,
3111 .v.func = stac92hd71bxx_fixup_hp_dv4,
3112 .chained = true,
3113 .chain_id = STAC_HP_DV5,
3114 },
3115 [STAC_HP_DV5] = {
3116 .type = HDA_FIXUP_FUNC,
3117 .v.func = stac92hd71bxx_fixup_hp_dv5,
3118 .chained = true,
3119 .chain_id = STAC_92HD71BXX_HP,
3120 },
3121 [STAC_HP_HDX] = {
3122 .type = HDA_FIXUP_FUNC,
3123 .v.func = stac92hd71bxx_fixup_hp_hdx,
3124 .chained = true,
3125 .chain_id = STAC_92HD71BXX_HP,
3126 },
3127 [STAC_92HD71BXX_HP] = {
3128 .type = HDA_FIXUP_FUNC,
3129 .v.func = stac92hd71bxx_fixup_hp,
3130 },
3131 };
3132
3133 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3134 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3135 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3136 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3137 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3138 { .id = STAC_HP_M4, .name = "hp-m4" },
3139 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3140 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3141 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3142 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3143 {}
3144 };
3145
3146 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3147 /* SigmaTel reference board */
3148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3149 "DFI LanParty", STAC_92HD71BXX_REF),
3150 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3151 "DFI LanParty", STAC_92HD71BXX_REF),
3152 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3153 "HP", STAC_HP_DV5),
3154 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3155 "HP", STAC_HP_DV5),
3156 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3157 "HP dv4-7", STAC_HP_DV4),
3158 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3159 "HP dv4-7", STAC_HP_DV5),
3160 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3161 "HP HDX", STAC_HP_HDX), /* HDX18 */
3162 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3163 "HP mini 1000", STAC_HP_M4),
3164 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3165 "HP HDX", STAC_HP_HDX), /* HDX16 */
3166 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3167 "HP dv6", STAC_HP_DV5),
3168 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3169 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3170 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3171 "HP DV6", STAC_HP_DV5),
3172 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3173 "HP", STAC_HP_DV5),
3174 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3176 "unknown Dell", STAC_DELL_M4_1),
3177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3178 "unknown Dell", STAC_DELL_M4_1),
3179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3180 "unknown Dell", STAC_DELL_M4_1),
3181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3182 "unknown Dell", STAC_DELL_M4_1),
3183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3184 "unknown Dell", STAC_DELL_M4_1),
3185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3186 "unknown Dell", STAC_DELL_M4_1),
3187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3188 "unknown Dell", STAC_DELL_M4_1),
3189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3190 "unknown Dell", STAC_DELL_M4_2),
3191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3192 "unknown Dell", STAC_DELL_M4_2),
3193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3194 "unknown Dell", STAC_DELL_M4_2),
3195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3196 "unknown Dell", STAC_DELL_M4_2),
3197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3198 "unknown Dell", STAC_DELL_M4_3),
3199 {} /* terminator */
3200 };
3201
3202 static const struct hda_pintbl ref922x_pin_configs[] = {
3203 { 0x0a, 0x01014010 },
3204 { 0x0b, 0x01016011 },
3205 { 0x0c, 0x01012012 },
3206 { 0x0d, 0x0221401f },
3207 { 0x0e, 0x01813122 },
3208 { 0x0f, 0x01011014 },
3209 { 0x10, 0x01441030 },
3210 { 0x11, 0x01c41030 },
3211 { 0x15, 0x40000100 },
3212 { 0x1b, 0x40000100 },
3213 {}
3214 };
3215
3216 /*
3217 STAC 922X pin configs for
3218 102801A7
3219 102801AB
3220 102801A9
3221 102801D1
3222 102801D2
3223 */
3224 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3225 { 0x0a, 0x02214030 },
3226 { 0x0b, 0x01a19021 },
3227 { 0x0c, 0x01111012 },
3228 { 0x0d, 0x01114010 },
3229 { 0x0e, 0x02a19020 },
3230 { 0x0f, 0x01117011 },
3231 { 0x10, 0x400001f0 },
3232 { 0x11, 0x400001f1 },
3233 { 0x15, 0x01813122 },
3234 { 0x1b, 0x400001f2 },
3235 {}
3236 };
3237
3238 /*
3239 STAC 922X pin configs for
3240 102801AC
3241 102801D0
3242 */
3243 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3244 { 0x0a, 0x02214030 },
3245 { 0x0b, 0x01a19021 },
3246 { 0x0c, 0x01111012 },
3247 { 0x0d, 0x01114010 },
3248 { 0x0e, 0x02a19020 },
3249 { 0x0f, 0x01117011 },
3250 { 0x10, 0x01451140 },
3251 { 0x11, 0x400001f0 },
3252 { 0x15, 0x01813122 },
3253 { 0x1b, 0x400001f1 },
3254 {}
3255 };
3256
3257 /*
3258 STAC 922X pin configs for
3259 102801BF
3260 */
3261 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3262 { 0x0a, 0x0321101f },
3263 { 0x0b, 0x01112024 },
3264 { 0x0c, 0x01111222 },
3265 { 0x0d, 0x91174220 },
3266 { 0x0e, 0x03a11050 },
3267 { 0x0f, 0x01116221 },
3268 { 0x10, 0x90a70330 },
3269 { 0x11, 0x01452340 },
3270 { 0x15, 0x40C003f1 },
3271 { 0x1b, 0x405003f0 },
3272 {}
3273 };
3274
3275 /*
3276 STAC 9221 A1 pin configs for
3277 102801D7 (Dell XPS M1210)
3278 */
3279 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3280 { 0x0a, 0x02211211 },
3281 { 0x0b, 0x408103ff },
3282 { 0x0c, 0x02a1123e },
3283 { 0x0d, 0x90100310 },
3284 { 0x0e, 0x408003f1 },
3285 { 0x0f, 0x0221121f },
3286 { 0x10, 0x03451340 },
3287 { 0x11, 0x40c003f2 },
3288 { 0x15, 0x508003f3 },
3289 { 0x1b, 0x405003f4 },
3290 {}
3291 };
3292
3293 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3294 { 0x0a, 0x0221401f },
3295 { 0x0b, 0x01a19022 },
3296 { 0x0c, 0x01813021 },
3297 { 0x0d, 0x01014010 },
3298 { 0x0e, 0x40000100 },
3299 { 0x0f, 0x40000100 },
3300 { 0x10, 0x40000100 },
3301 { 0x11, 0x40000100 },
3302 { 0x15, 0x02a19120 },
3303 { 0x1b, 0x40000100 },
3304 {}
3305 };
3306
3307 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3308 { 0x0a, 0x0221401f },
3309 { 0x0b, 0x01011012 },
3310 { 0x0c, 0x01813024 },
3311 { 0x0d, 0x01014010 },
3312 { 0x0e, 0x01a19021 },
3313 { 0x0f, 0x01016011 },
3314 { 0x10, 0x01452130 },
3315 { 0x11, 0x40000100 },
3316 { 0x15, 0x02a19320 },
3317 { 0x1b, 0x40000100 },
3318 {}
3319 };
3320
3321 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3322 { 0x0a, 0x0121e21f },
3323 { 0x0b, 0x400000ff },
3324 { 0x0c, 0x9017e110 },
3325 { 0x0d, 0x400000fd },
3326 { 0x0e, 0x400000fe },
3327 { 0x0f, 0x0181e020 },
3328 { 0x10, 0x1145e030 },
3329 { 0x11, 0x11c5e240 },
3330 { 0x15, 0x400000fc },
3331 { 0x1b, 0x400000fb },
3332 {}
3333 };
3334
3335 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3336 { 0x0a, 0x0121e21f },
3337 { 0x0b, 0x90a7012e },
3338 { 0x0c, 0x9017e110 },
3339 { 0x0d, 0x400000fd },
3340 { 0x0e, 0x400000fe },
3341 { 0x0f, 0x0181e020 },
3342 { 0x10, 0x1145e230 },
3343 { 0x11, 0x500000fa },
3344 { 0x15, 0x400000fc },
3345 { 0x1b, 0x400000fb },
3346 {}
3347 };
3348
3349 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3350 { 0x0a, 0x0121e21f },
3351 { 0x0b, 0x90a7012e },
3352 { 0x0c, 0x9017e110 },
3353 { 0x0d, 0x400000fd },
3354 { 0x0e, 0x400000fe },
3355 { 0x0f, 0x0181e020 },
3356 { 0x10, 0x1145e230 },
3357 { 0x11, 0x11c5e240 },
3358 { 0x15, 0x400000fc },
3359 { 0x1b, 0x400000fb },
3360 {}
3361 };
3362
3363 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3364 { 0x0a, 0x0321e21f },
3365 { 0x0b, 0x03a1e02e },
3366 { 0x0c, 0x9017e110 },
3367 { 0x0d, 0x9017e11f },
3368 { 0x0e, 0x400000fe },
3369 { 0x0f, 0x0381e020 },
3370 { 0x10, 0x1345e230 },
3371 { 0x11, 0x13c5e240 },
3372 { 0x15, 0x400000fc },
3373 { 0x1b, 0x400000fb },
3374 {}
3375 };
3376
3377 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3378 { 0x0a, 0x0321e21f },
3379 { 0x0b, 0x03a1e02e },
3380 { 0x0c, 0x9017e110 },
3381 { 0x0d, 0x9017e11f },
3382 { 0x0e, 0x400000fe },
3383 { 0x0f, 0x0381e020 },
3384 { 0x10, 0x1345e230 },
3385 { 0x11, 0x13c5e240 },
3386 { 0x15, 0x400000fc },
3387 { 0x1b, 0x400000fb },
3388 {}
3389 };
3390
3391 static const struct hda_pintbl ecs202_pin_configs[] = {
3392 { 0x0a, 0x0221401f },
3393 { 0x0b, 0x02a19020 },
3394 { 0x0c, 0x01a19020 },
3395 { 0x0d, 0x01114010 },
3396 { 0x0e, 0x408000f0 },
3397 { 0x0f, 0x01813022 },
3398 { 0x10, 0x074510a0 },
3399 { 0x11, 0x40c400f1 },
3400 { 0x15, 0x9037012e },
3401 { 0x1b, 0x40e000f2 },
3402 {}
3403 };
3404
3405 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3406 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3407 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3408 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3409 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3410 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3411 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3412 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3413 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3414 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3415 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3416 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3417 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3418 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3419 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3420 {}
3421 };
3422
3423 static const struct hda_fixup stac922x_fixups[];
3424
3425 /* remap the fixup from codec SSID and apply it */
3426 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3427 const struct hda_fixup *fix,
3428 int action)
3429 {
3430 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3431 return;
3432 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3433 stac922x_fixups);
3434 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
3435 snd_hda_apply_fixup(codec, action);
3436 }
3437
3438 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3439 const struct hda_fixup *fix,
3440 int action)
3441 {
3442 struct sigmatel_spec *spec = codec->spec;
3443
3444 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3445 spec->gpio_mask = spec->gpio_dir = 0x03;
3446 spec->gpio_data = 0x03;
3447 }
3448 }
3449
3450 static const struct hda_fixup stac922x_fixups[] = {
3451 [STAC_D945_REF] = {
3452 .type = HDA_FIXUP_PINS,
3453 .v.pins = ref922x_pin_configs,
3454 },
3455 [STAC_D945GTP3] = {
3456 .type = HDA_FIXUP_PINS,
3457 .v.pins = d945gtp3_pin_configs,
3458 },
3459 [STAC_D945GTP5] = {
3460 .type = HDA_FIXUP_PINS,
3461 .v.pins = d945gtp5_pin_configs,
3462 },
3463 [STAC_INTEL_MAC_AUTO] = {
3464 .type = HDA_FIXUP_FUNC,
3465 .v.func = stac922x_fixup_intel_mac_auto,
3466 },
3467 [STAC_INTEL_MAC_V1] = {
3468 .type = HDA_FIXUP_PINS,
3469 .v.pins = intel_mac_v1_pin_configs,
3470 .chained = true,
3471 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3472 },
3473 [STAC_INTEL_MAC_V2] = {
3474 .type = HDA_FIXUP_PINS,
3475 .v.pins = intel_mac_v2_pin_configs,
3476 .chained = true,
3477 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3478 },
3479 [STAC_INTEL_MAC_V3] = {
3480 .type = HDA_FIXUP_PINS,
3481 .v.pins = intel_mac_v3_pin_configs,
3482 .chained = true,
3483 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3484 },
3485 [STAC_INTEL_MAC_V4] = {
3486 .type = HDA_FIXUP_PINS,
3487 .v.pins = intel_mac_v4_pin_configs,
3488 .chained = true,
3489 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3490 },
3491 [STAC_INTEL_MAC_V5] = {
3492 .type = HDA_FIXUP_PINS,
3493 .v.pins = intel_mac_v5_pin_configs,
3494 .chained = true,
3495 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3496 },
3497 [STAC_922X_INTEL_MAC_GPIO] = {
3498 .type = HDA_FIXUP_FUNC,
3499 .v.func = stac922x_fixup_intel_mac_gpio,
3500 },
3501 [STAC_ECS_202] = {
3502 .type = HDA_FIXUP_PINS,
3503 .v.pins = ecs202_pin_configs,
3504 },
3505 [STAC_922X_DELL_D81] = {
3506 .type = HDA_FIXUP_PINS,
3507 .v.pins = dell_922x_d81_pin_configs,
3508 },
3509 [STAC_922X_DELL_D82] = {
3510 .type = HDA_FIXUP_PINS,
3511 .v.pins = dell_922x_d82_pin_configs,
3512 },
3513 [STAC_922X_DELL_M81] = {
3514 .type = HDA_FIXUP_PINS,
3515 .v.pins = dell_922x_m81_pin_configs,
3516 },
3517 [STAC_922X_DELL_M82] = {
3518 .type = HDA_FIXUP_PINS,
3519 .v.pins = dell_922x_m82_pin_configs,
3520 },
3521 };
3522
3523 static const struct hda_model_fixup stac922x_models[] = {
3524 { .id = STAC_D945_REF, .name = "ref" },
3525 { .id = STAC_D945GTP5, .name = "5stack" },
3526 { .id = STAC_D945GTP3, .name = "3stack" },
3527 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3528 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3529 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3530 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3531 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3532 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3533 { .id = STAC_ECS_202, .name = "ecs202" },
3534 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3535 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3536 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3537 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3538 /* for backward compatibility */
3539 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3540 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3541 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3542 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3543 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3544 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3545 {}
3546 };
3547
3548 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3549 /* SigmaTel reference board */
3550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3551 "DFI LanParty", STAC_D945_REF),
3552 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3553 "DFI LanParty", STAC_D945_REF),
3554 /* Intel 945G based systems */
3555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3556 "Intel D945G", STAC_D945GTP3),
3557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3558 "Intel D945G", STAC_D945GTP3),
3559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3560 "Intel D945G", STAC_D945GTP3),
3561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3562 "Intel D945G", STAC_D945GTP3),
3563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3564 "Intel D945G", STAC_D945GTP3),
3565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3566 "Intel D945G", STAC_D945GTP3),
3567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3568 "Intel D945G", STAC_D945GTP3),
3569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3570 "Intel D945G", STAC_D945GTP3),
3571 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3572 "Intel D945G", STAC_D945GTP3),
3573 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3574 "Intel D945G", STAC_D945GTP3),
3575 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3576 "Intel D945G", STAC_D945GTP3),
3577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3578 "Intel D945G", STAC_D945GTP3),
3579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3580 "Intel D945G", STAC_D945GTP3),
3581 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3582 "Intel D945G", STAC_D945GTP3),
3583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3584 "Intel D945G", STAC_D945GTP3),
3585 /* Intel D945G 5-stack systems */
3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3587 "Intel D945G", STAC_D945GTP5),
3588 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3589 "Intel D945G", STAC_D945GTP5),
3590 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3591 "Intel D945G", STAC_D945GTP5),
3592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3593 "Intel D945G", STAC_D945GTP5),
3594 /* Intel 945P based systems */
3595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3596 "Intel D945P", STAC_D945GTP3),
3597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3598 "Intel D945P", STAC_D945GTP3),
3599 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3600 "Intel D945P", STAC_D945GTP3),
3601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3602 "Intel D945P", STAC_D945GTP3),
3603 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3604 "Intel D945P", STAC_D945GTP3),
3605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3606 "Intel D945P", STAC_D945GTP5),
3607 /* other intel */
3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3609 "Intel D945", STAC_D945_REF),
3610 /* other systems */
3611
3612 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3613 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3614
3615 /* Dell systems */
3616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3617 "unknown Dell", STAC_922X_DELL_D81),
3618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3619 "unknown Dell", STAC_922X_DELL_D81),
3620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3621 "unknown Dell", STAC_922X_DELL_D81),
3622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3623 "unknown Dell", STAC_922X_DELL_D82),
3624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3625 "unknown Dell", STAC_922X_DELL_M81),
3626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3627 "unknown Dell", STAC_922X_DELL_D82),
3628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3629 "unknown Dell", STAC_922X_DELL_D81),
3630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3631 "unknown Dell", STAC_922X_DELL_D81),
3632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3633 "Dell XPS M1210", STAC_922X_DELL_M82),
3634 /* ECS/PC Chips boards */
3635 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3636 "ECS/PC chips", STAC_ECS_202),
3637 {} /* terminator */
3638 };
3639
3640 static const struct hda_pintbl ref927x_pin_configs[] = {
3641 { 0x0a, 0x02214020 },
3642 { 0x0b, 0x02a19080 },
3643 { 0x0c, 0x0181304e },
3644 { 0x0d, 0x01014010 },
3645 { 0x0e, 0x01a19040 },
3646 { 0x0f, 0x01011012 },
3647 { 0x10, 0x01016011 },
3648 { 0x11, 0x0101201f },
3649 { 0x12, 0x183301f0 },
3650 { 0x13, 0x18a001f0 },
3651 { 0x14, 0x18a001f0 },
3652 { 0x21, 0x01442070 },
3653 { 0x22, 0x01c42190 },
3654 { 0x23, 0x40000100 },
3655 {}
3656 };
3657
3658 static const struct hda_pintbl d965_3st_pin_configs[] = {
3659 { 0x0a, 0x0221401f },
3660 { 0x0b, 0x02a19120 },
3661 { 0x0c, 0x40000100 },
3662 { 0x0d, 0x01014011 },
3663 { 0x0e, 0x01a19021 },
3664 { 0x0f, 0x01813024 },
3665 { 0x10, 0x40000100 },
3666 { 0x11, 0x40000100 },
3667 { 0x12, 0x40000100 },
3668 { 0x13, 0x40000100 },
3669 { 0x14, 0x40000100 },
3670 { 0x21, 0x40000100 },
3671 { 0x22, 0x40000100 },
3672 { 0x23, 0x40000100 },
3673 {}
3674 };
3675
3676 static const struct hda_pintbl d965_5st_pin_configs[] = {
3677 { 0x0a, 0x02214020 },
3678 { 0x0b, 0x02a19080 },
3679 { 0x0c, 0x0181304e },
3680 { 0x0d, 0x01014010 },
3681 { 0x0e, 0x01a19040 },
3682 { 0x0f, 0x01011012 },
3683 { 0x10, 0x01016011 },
3684 { 0x11, 0x40000100 },
3685 { 0x12, 0x40000100 },
3686 { 0x13, 0x40000100 },
3687 { 0x14, 0x40000100 },
3688 { 0x21, 0x01442070 },
3689 { 0x22, 0x40000100 },
3690 { 0x23, 0x40000100 },
3691 {}
3692 };
3693
3694 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3695 { 0x0a, 0x40000100 },
3696 { 0x0b, 0x40000100 },
3697 { 0x0c, 0x0181304e },
3698 { 0x0d, 0x01014010 },
3699 { 0x0e, 0x01a19040 },
3700 { 0x0f, 0x01011012 },
3701 { 0x10, 0x01016011 },
3702 { 0x11, 0x40000100 },
3703 { 0x12, 0x40000100 },
3704 { 0x13, 0x40000100 },
3705 { 0x14, 0x40000100 },
3706 { 0x21, 0x01442070 },
3707 { 0x22, 0x40000100 },
3708 { 0x23, 0x40000100 },
3709 {}
3710 };
3711
3712 static const struct hda_pintbl dell_3st_pin_configs[] = {
3713 { 0x0a, 0x02211230 },
3714 { 0x0b, 0x02a11220 },
3715 { 0x0c, 0x01a19040 },
3716 { 0x0d, 0x01114210 },
3717 { 0x0e, 0x01111212 },
3718 { 0x0f, 0x01116211 },
3719 { 0x10, 0x01813050 },
3720 { 0x11, 0x01112214 },
3721 { 0x12, 0x403003fa },
3722 { 0x13, 0x90a60040 },
3723 { 0x14, 0x90a60040 },
3724 { 0x21, 0x404003fb },
3725 { 0x22, 0x40c003fc },
3726 { 0x23, 0x40000100 },
3727 {}
3728 };
3729
3730 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3731 const struct hda_fixup *fix, int action)
3732 {
3733 /* no jack detecion for ref-no-jd model */
3734 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3735 codec->no_jack_detect = 1;
3736 }
3737
3738 static void stac927x_fixup_ref(struct hda_codec *codec,
3739 const struct hda_fixup *fix, int action)
3740 {
3741 struct sigmatel_spec *spec = codec->spec;
3742
3743 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3744 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3745 spec->eapd_mask = spec->gpio_mask = 0;
3746 spec->gpio_dir = spec->gpio_data = 0;
3747 }
3748 }
3749
3750 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3751 const struct hda_fixup *fix, int action)
3752 {
3753 struct sigmatel_spec *spec = codec->spec;
3754
3755 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3756 return;
3757
3758 if (codec->subsystem_id != 0x1028022f) {
3759 /* GPIO2 High = Enable EAPD */
3760 spec->eapd_mask = spec->gpio_mask = 0x04;
3761 spec->gpio_dir = spec->gpio_data = 0x04;
3762 }
3763
3764 snd_hda_add_verbs(codec, dell_3st_core_init);
3765 spec->volknob_init = 1;
3766 }
3767
3768 static void stac927x_fixup_volknob(struct hda_codec *codec,
3769 const struct hda_fixup *fix, int action)
3770 {
3771 struct sigmatel_spec *spec = codec->spec;
3772
3773 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3774 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3775 spec->volknob_init = 1;
3776 }
3777 }
3778
3779 static const struct hda_fixup stac927x_fixups[] = {
3780 [STAC_D965_REF_NO_JD] = {
3781 .type = HDA_FIXUP_FUNC,
3782 .v.func = stac927x_fixup_ref_no_jd,
3783 .chained = true,
3784 .chain_id = STAC_D965_REF,
3785 },
3786 [STAC_D965_REF] = {
3787 .type = HDA_FIXUP_FUNC,
3788 .v.func = stac927x_fixup_ref,
3789 },
3790 [STAC_D965_3ST] = {
3791 .type = HDA_FIXUP_PINS,
3792 .v.pins = d965_3st_pin_configs,
3793 .chained = true,
3794 .chain_id = STAC_D965_VERBS,
3795 },
3796 [STAC_D965_5ST] = {
3797 .type = HDA_FIXUP_PINS,
3798 .v.pins = d965_5st_pin_configs,
3799 .chained = true,
3800 .chain_id = STAC_D965_VERBS,
3801 },
3802 [STAC_D965_VERBS] = {
3803 .type = HDA_FIXUP_VERBS,
3804 .v.verbs = d965_core_init,
3805 },
3806 [STAC_D965_5ST_NO_FP] = {
3807 .type = HDA_FIXUP_PINS,
3808 .v.pins = d965_5st_no_fp_pin_configs,
3809 },
3810 [STAC_DELL_3ST] = {
3811 .type = HDA_FIXUP_PINS,
3812 .v.pins = dell_3st_pin_configs,
3813 .chained = true,
3814 .chain_id = STAC_927X_DELL_DMIC,
3815 },
3816 [STAC_DELL_BIOS] = {
3817 .type = HDA_FIXUP_PINS,
3818 .v.pins = (const struct hda_pintbl[]) {
3819 /* correct the front output jack as a hp out */
3820 { 0x0f, 0x0221101f },
3821 /* correct the front input jack as a mic */
3822 { 0x0e, 0x02a79130 },
3823 {}
3824 },
3825 .chained = true,
3826 .chain_id = STAC_927X_DELL_DMIC,
3827 },
3828 [STAC_DELL_BIOS_AMIC] = {
3829 .type = HDA_FIXUP_PINS,
3830 .v.pins = (const struct hda_pintbl[]) {
3831 /* configure the analog microphone on some laptops */
3832 { 0x0c, 0x90a79130 },
3833 {}
3834 },
3835 .chained = true,
3836 .chain_id = STAC_DELL_BIOS,
3837 },
3838 [STAC_DELL_BIOS_SPDIF] = {
3839 .type = HDA_FIXUP_PINS,
3840 .v.pins = (const struct hda_pintbl[]) {
3841 /* correct the device field to SPDIF out */
3842 { 0x21, 0x01442070 },
3843 {}
3844 },
3845 .chained = true,
3846 .chain_id = STAC_DELL_BIOS,
3847 },
3848 [STAC_927X_DELL_DMIC] = {
3849 .type = HDA_FIXUP_FUNC,
3850 .v.func = stac927x_fixup_dell_dmic,
3851 },
3852 [STAC_927X_VOLKNOB] = {
3853 .type = HDA_FIXUP_FUNC,
3854 .v.func = stac927x_fixup_volknob,
3855 },
3856 };
3857
3858 static const struct hda_model_fixup stac927x_models[] = {
3859 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3860 { .id = STAC_D965_REF, .name = "ref" },
3861 { .id = STAC_D965_3ST, .name = "3stack" },
3862 { .id = STAC_D965_5ST, .name = "5stack" },
3863 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3864 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3865 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3866 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3867 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3868 {}
3869 };
3870
3871 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3872 /* SigmaTel reference board */
3873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3874 "DFI LanParty", STAC_D965_REF),
3875 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3876 "DFI LanParty", STAC_D965_REF),
3877 /* Intel 946 based systems */
3878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3880 /* 965 based 3 stack systems */
3881 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3882 "Intel D965", STAC_D965_3ST),
3883 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3884 "Intel D965", STAC_D965_3ST),
3885 /* Dell 3 stack systems */
3886 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3887 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3888 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3889 /* Dell 3 stack systems with verb table in BIOS */
3890 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3891 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3892 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3898 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3899 /* 965 based 5 stack systems */
3900 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3901 "Intel D965", STAC_D965_5ST),
3902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3903 "Intel D965", STAC_D965_5ST),
3904 /* volume-knob fixes */
3905 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3906 {} /* terminator */
3907 };
3908
3909 static const struct hda_pintbl ref9205_pin_configs[] = {
3910 { 0x0a, 0x40000100 },
3911 { 0x0b, 0x40000100 },
3912 { 0x0c, 0x01016011 },
3913 { 0x0d, 0x01014010 },
3914 { 0x0e, 0x01813122 },
3915 { 0x0f, 0x01a19021 },
3916 { 0x14, 0x01019020 },
3917 { 0x16, 0x40000100 },
3918 { 0x17, 0x90a000f0 },
3919 { 0x18, 0x90a000f0 },
3920 { 0x21, 0x01441030 },
3921 { 0x22, 0x01c41030 },
3922 {}
3923 };
3924
3925 /*
3926 STAC 9205 pin configs for
3927 102801F1
3928 102801F2
3929 102801FC
3930 102801FD
3931 10280204
3932 1028021F
3933 10280228 (Dell Vostro 1500)
3934 10280229 (Dell Vostro 1700)
3935 */
3936 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3937 { 0x0a, 0x0321101F },
3938 { 0x0b, 0x03A11020 },
3939 { 0x0c, 0x400003FA },
3940 { 0x0d, 0x90170310 },
3941 { 0x0e, 0x400003FB },
3942 { 0x0f, 0x400003FC },
3943 { 0x14, 0x400003FD },
3944 { 0x16, 0x40F000F9 },
3945 { 0x17, 0x90A60330 },
3946 { 0x18, 0x400003FF },
3947 { 0x21, 0x0144131F },
3948 { 0x22, 0x40C003FE },
3949 {}
3950 };
3951
3952 /*
3953 STAC 9205 pin configs for
3954 102801F9
3955 102801FA
3956 102801FE
3957 102801FF (Dell Precision M4300)
3958 10280206
3959 10280200
3960 10280201
3961 */
3962 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3963 { 0x0a, 0x0321101f },
3964 { 0x0b, 0x03a11020 },
3965 { 0x0c, 0x90a70330 },
3966 { 0x0d, 0x90170310 },
3967 { 0x0e, 0x400000fe },
3968 { 0x0f, 0x400000ff },
3969 { 0x14, 0x400000fd },
3970 { 0x16, 0x40f000f9 },
3971 { 0x17, 0x400000fa },
3972 { 0x18, 0x400000fc },
3973 { 0x21, 0x0144131f },
3974 { 0x22, 0x40c003f8 },
3975 /* Enable SPDIF in/out */
3976 { 0x1f, 0x01441030 },
3977 { 0x20, 0x1c410030 },
3978 {}
3979 };
3980
3981 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3982 { 0x0a, 0x0421101f },
3983 { 0x0b, 0x04a11020 },
3984 { 0x0c, 0x400003fa },
3985 { 0x0d, 0x90170310 },
3986 { 0x0e, 0x400003fb },
3987 { 0x0f, 0x400003fc },
3988 { 0x14, 0x400003fd },
3989 { 0x16, 0x400003f9 },
3990 { 0x17, 0x90a60330 },
3991 { 0x18, 0x400003ff },
3992 { 0x21, 0x01441340 },
3993 { 0x22, 0x40c003fe },
3994 {}
3995 };
3996
3997 static void stac9205_fixup_ref(struct hda_codec *codec,
3998 const struct hda_fixup *fix, int action)
3999 {
4000 struct sigmatel_spec *spec = codec->spec;
4001
4002 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4003 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4004 /* SPDIF-In enabled */
4005 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4006 }
4007 }
4008
4009 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4010 const struct hda_fixup *fix, int action)
4011 {
4012 struct sigmatel_spec *spec = codec->spec;
4013 struct hda_jack_tbl *jack;
4014
4015 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4016 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4017
4018 /* Enable unsol response for GPIO4/Dock HP connection */
4019 snd_hda_codec_write_cache(codec, codec->afg, 0,
4020 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4021 snd_hda_jack_detect_enable_callback(codec, codec->afg,
4022 STAC_VREF_EVENT,
4023 stac_vref_event);
4024 jack = snd_hda_jack_tbl_get(codec, codec->afg);
4025 if (jack)
4026 jack->private_data = 0x01;
4027
4028 spec->gpio_dir = 0x0b;
4029 spec->eapd_mask = 0x01;
4030 spec->gpio_mask = 0x1b;
4031 spec->gpio_mute = 0x10;
4032 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4033 * GPIO3 Low = DRM
4034 */
4035 spec->gpio_data = 0x01;
4036 }
4037 }
4038
4039 static void stac9205_fixup_eapd(struct hda_codec *codec,
4040 const struct hda_fixup *fix, int action)
4041 {
4042 struct sigmatel_spec *spec = codec->spec;
4043
4044 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4045 spec->eapd_switch = 0;
4046 }
4047
4048 static const struct hda_fixup stac9205_fixups[] = {
4049 [STAC_9205_REF] = {
4050 .type = HDA_FIXUP_FUNC,
4051 .v.func = stac9205_fixup_ref,
4052 },
4053 [STAC_9205_DELL_M42] = {
4054 .type = HDA_FIXUP_PINS,
4055 .v.pins = dell_9205_m42_pin_configs,
4056 },
4057 [STAC_9205_DELL_M43] = {
4058 .type = HDA_FIXUP_FUNC,
4059 .v.func = stac9205_fixup_dell_m43,
4060 },
4061 [STAC_9205_DELL_M44] = {
4062 .type = HDA_FIXUP_PINS,
4063 .v.pins = dell_9205_m44_pin_configs,
4064 },
4065 [STAC_9205_EAPD] = {
4066 .type = HDA_FIXUP_FUNC,
4067 .v.func = stac9205_fixup_eapd,
4068 },
4069 {}
4070 };
4071
4072 static const struct hda_model_fixup stac9205_models[] = {
4073 { .id = STAC_9205_REF, .name = "ref" },
4074 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4075 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4076 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4077 { .id = STAC_9205_EAPD, .name = "eapd" },
4078 {}
4079 };
4080
4081 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4082 /* SigmaTel reference board */
4083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4084 "DFI LanParty", STAC_9205_REF),
4085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4086 "SigmaTel", STAC_9205_REF),
4087 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4088 "DFI LanParty", STAC_9205_REF),
4089 /* Dell */
4090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4091 "unknown Dell", STAC_9205_DELL_M42),
4092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4093 "unknown Dell", STAC_9205_DELL_M42),
4094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4095 "Dell Precision", STAC_9205_DELL_M43),
4096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4097 "Dell Precision", STAC_9205_DELL_M43),
4098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4099 "Dell Precision", STAC_9205_DELL_M43),
4100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4101 "unknown Dell", STAC_9205_DELL_M42),
4102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4103 "unknown Dell", STAC_9205_DELL_M42),
4104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4105 "Dell Precision", STAC_9205_DELL_M43),
4106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4107 "Dell Precision M4300", STAC_9205_DELL_M43),
4108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4109 "unknown Dell", STAC_9205_DELL_M42),
4110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4111 "Dell Precision", STAC_9205_DELL_M43),
4112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4113 "Dell Precision", STAC_9205_DELL_M43),
4114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4115 "Dell Precision", STAC_9205_DELL_M43),
4116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4117 "Dell Inspiron", STAC_9205_DELL_M44),
4118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4119 "Dell Vostro 1500", STAC_9205_DELL_M42),
4120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4121 "Dell Vostro 1700", STAC_9205_DELL_M42),
4122 /* Gateway */
4123 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4124 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4125 {} /* terminator */
4126 };
4127
4128 static int stac_parse_auto_config(struct hda_codec *codec)
4129 {
4130 struct sigmatel_spec *spec = codec->spec;
4131 int err;
4132 int flags = 0;
4133
4134 if (spec->headset_jack)
4135 flags |= HDA_PINCFG_HEADSET_MIC;
4136
4137 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4138 if (err < 0)
4139 return err;
4140
4141 /* add hooks */
4142 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4143 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4144
4145 spec->gen.automute_hook = stac_update_outputs;
4146 spec->gen.hp_automute_hook = stac_hp_automute;
4147 spec->gen.line_automute_hook = stac_line_automute;
4148 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
4149
4150 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4151 if (err < 0)
4152 return err;
4153
4154 /* minimum value is actually mute */
4155 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
4156
4157 /* setup analog beep controls */
4158 if (spec->anabeep_nid > 0) {
4159 err = stac_auto_create_beep_ctls(codec,
4160 spec->anabeep_nid);
4161 if (err < 0)
4162 return err;
4163 }
4164
4165 /* setup digital beep controls and input device */
4166 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4167 if (spec->gen.beep_nid) {
4168 hda_nid_t nid = spec->gen.beep_nid;
4169 unsigned int caps;
4170
4171 err = stac_auto_create_beep_ctls(codec, nid);
4172 if (err < 0)
4173 return err;
4174 if (codec->beep) {
4175 /* IDT/STAC codecs have linear beep tone parameter */
4176 codec->beep->linear_tone = spec->linear_tone_beep;
4177 /* if no beep switch is available, make its own one */
4178 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4179 if (!(caps & AC_AMPCAP_MUTE)) {
4180 err = stac_beep_switch_ctl(codec);
4181 if (err < 0)
4182 return err;
4183 }
4184 }
4185 }
4186 #endif
4187
4188 if (spec->gpio_led)
4189 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4190
4191 if (spec->aloopback_ctl &&
4192 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4193 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4194 return -ENOMEM;
4195 }
4196
4197 if (spec->have_spdif_mux) {
4198 err = stac_create_spdif_mux_ctls(codec);
4199 if (err < 0)
4200 return err;
4201 }
4202
4203 stac_init_power_map(codec);
4204
4205 return 0;
4206 }
4207
4208
4209 static int stac_init(struct hda_codec *codec)
4210 {
4211 struct sigmatel_spec *spec = codec->spec;
4212 int i;
4213
4214 /* override some hints */
4215 stac_store_hints(codec);
4216
4217 /* set up GPIO */
4218 /* turn on EAPD statically when spec->eapd_switch isn't set.
4219 * otherwise, unsol event will turn it on/off dynamically
4220 */
4221 if (!spec->eapd_switch)
4222 spec->gpio_data |= spec->eapd_mask;
4223 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4224
4225 snd_hda_gen_init(codec);
4226
4227 /* sync the power-map */
4228 if (spec->num_pwrs)
4229 snd_hda_codec_write(codec, codec->afg, 0,
4230 AC_VERB_IDT_SET_POWER_MAP,
4231 spec->power_map_bits);
4232
4233 /* power down inactive ADCs */
4234 if (spec->powerdown_adcs) {
4235 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4236 if (spec->active_adcs & (1 << i))
4237 continue;
4238 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4239 AC_VERB_SET_POWER_STATE,
4240 AC_PWRST_D3);
4241 }
4242 }
4243
4244 return 0;
4245 }
4246
4247 static void stac_shutup(struct hda_codec *codec)
4248 {
4249 struct sigmatel_spec *spec = codec->spec;
4250
4251 snd_hda_shutup_pins(codec);
4252
4253 if (spec->eapd_mask)
4254 stac_gpio_set(codec, spec->gpio_mask,
4255 spec->gpio_dir, spec->gpio_data &
4256 ~spec->eapd_mask);
4257 }
4258
4259 #define stac_free snd_hda_gen_free
4260
4261 #ifdef CONFIG_PROC_FS
4262 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4263 struct hda_codec *codec, hda_nid_t nid)
4264 {
4265 if (nid == codec->afg)
4266 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4267 snd_hda_codec_read(codec, nid, 0,
4268 AC_VERB_IDT_GET_POWER_MAP, 0));
4269 }
4270
4271 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4272 struct hda_codec *codec,
4273 unsigned int verb)
4274 {
4275 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4276 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4277 }
4278
4279 /* stac92hd71bxx, stac92hd73xx */
4280 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4281 struct hda_codec *codec, hda_nid_t nid)
4282 {
4283 stac92hd_proc_hook(buffer, codec, nid);
4284 if (nid == codec->afg)
4285 analog_loop_proc_hook(buffer, codec, 0xfa0);
4286 }
4287
4288 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4289 struct hda_codec *codec, hda_nid_t nid)
4290 {
4291 if (nid == codec->afg)
4292 analog_loop_proc_hook(buffer, codec, 0xfe0);
4293 }
4294
4295 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4296 struct hda_codec *codec, hda_nid_t nid)
4297 {
4298 if (nid == codec->afg)
4299 analog_loop_proc_hook(buffer, codec, 0xfeb);
4300 }
4301 #else
4302 #define stac92hd_proc_hook NULL
4303 #define stac92hd7x_proc_hook NULL
4304 #define stac9205_proc_hook NULL
4305 #define stac927x_proc_hook NULL
4306 #endif
4307
4308 #ifdef CONFIG_PM
4309 static int stac_suspend(struct hda_codec *codec)
4310 {
4311 stac_shutup(codec);
4312 return 0;
4313 }
4314 #else
4315 #define stac_suspend NULL
4316 #endif /* CONFIG_PM */
4317
4318 static const struct hda_codec_ops stac_patch_ops = {
4319 .build_controls = snd_hda_gen_build_controls,
4320 .build_pcms = snd_hda_gen_build_pcms,
4321 .init = stac_init,
4322 .free = stac_free,
4323 .unsol_event = snd_hda_jack_unsol_event,
4324 #ifdef CONFIG_PM
4325 .suspend = stac_suspend,
4326 #endif
4327 .reboot_notify = stac_shutup,
4328 };
4329
4330 static int alloc_stac_spec(struct hda_codec *codec)
4331 {
4332 struct sigmatel_spec *spec;
4333
4334 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4335 if (!spec)
4336 return -ENOMEM;
4337 snd_hda_gen_spec_init(&spec->gen);
4338 codec->spec = spec;
4339 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4340 return 0;
4341 }
4342
4343 static int patch_stac9200(struct hda_codec *codec)
4344 {
4345 struct sigmatel_spec *spec;
4346 int err;
4347
4348 err = alloc_stac_spec(codec);
4349 if (err < 0)
4350 return err;
4351
4352 spec = codec->spec;
4353 spec->linear_tone_beep = 1;
4354 spec->gen.own_eapd_ctl = 1;
4355
4356 codec->patch_ops = stac_patch_ops;
4357 codec->power_filter = snd_hda_codec_eapd_power_filter;
4358
4359 snd_hda_add_verbs(codec, stac9200_eapd_init);
4360
4361 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4362 stac9200_fixups);
4363 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4364
4365 err = stac_parse_auto_config(codec);
4366 if (err < 0) {
4367 stac_free(codec);
4368 return err;
4369 }
4370
4371 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4372
4373 return 0;
4374 }
4375
4376 static int patch_stac925x(struct hda_codec *codec)
4377 {
4378 struct sigmatel_spec *spec;
4379 int err;
4380
4381 err = alloc_stac_spec(codec);
4382 if (err < 0)
4383 return err;
4384
4385 spec = codec->spec;
4386 spec->linear_tone_beep = 1;
4387 spec->gen.own_eapd_ctl = 1;
4388
4389 codec->patch_ops = stac_patch_ops;
4390
4391 snd_hda_add_verbs(codec, stac925x_core_init);
4392
4393 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4394 stac925x_fixups);
4395 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4396
4397 err = stac_parse_auto_config(codec);
4398 if (err < 0) {
4399 stac_free(codec);
4400 return err;
4401 }
4402
4403 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4404
4405 return 0;
4406 }
4407
4408 static int patch_stac92hd73xx(struct hda_codec *codec)
4409 {
4410 struct sigmatel_spec *spec;
4411 int err;
4412 int num_dacs;
4413
4414 err = alloc_stac_spec(codec);
4415 if (err < 0)
4416 return err;
4417
4418 spec = codec->spec;
4419 spec->linear_tone_beep = 0;
4420 spec->gen.mixer_nid = 0x1d;
4421 spec->have_spdif_mux = 1;
4422
4423 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4424 if (num_dacs < 3 || num_dacs > 5) {
4425 printk(KERN_WARNING "hda_codec: Could not determine "
4426 "number of channels defaulting to DAC count\n");
4427 num_dacs = 5;
4428 }
4429
4430 switch (num_dacs) {
4431 case 0x3: /* 6 Channel */
4432 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4433 break;
4434 case 0x4: /* 8 Channel */
4435 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4436 break;
4437 case 0x5: /* 10 Channel */
4438 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4439 break;
4440 }
4441
4442 spec->aloopback_mask = 0x01;
4443 spec->aloopback_shift = 8;
4444
4445 spec->gen.beep_nid = 0x1c; /* digital beep */
4446
4447 /* GPIO0 High = Enable EAPD */
4448 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4449 spec->gpio_data = 0x01;
4450
4451 spec->eapd_switch = 1;
4452
4453 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4454 spec->pwr_nids = stac92hd73xx_pwr_nids;
4455
4456 spec->gen.own_eapd_ctl = 1;
4457 spec->gen.power_down_unused = 1;
4458
4459 codec->patch_ops = stac_patch_ops;
4460
4461 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4462 stac92hd73xx_fixups);
4463 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4464
4465 if (!spec->volknob_init)
4466 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4467
4468 err = stac_parse_auto_config(codec);
4469 if (err < 0) {
4470 stac_free(codec);
4471 return err;
4472 }
4473
4474 /* Don't GPIO-mute speakers if there are no internal speakers, because
4475 * the GPIO might be necessary for Headphone
4476 */
4477 if (spec->eapd_switch && !has_builtin_speaker(codec))
4478 spec->eapd_switch = 0;
4479
4480 codec->proc_widget_hook = stac92hd7x_proc_hook;
4481
4482 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4483
4484 return 0;
4485 }
4486
4487 static void stac_setup_gpio(struct hda_codec *codec)
4488 {
4489 struct sigmatel_spec *spec = codec->spec;
4490
4491 spec->gpio_mask |= spec->eapd_mask;
4492 if (spec->gpio_led) {
4493 if (!spec->vref_mute_led_nid) {
4494 spec->gpio_mask |= spec->gpio_led;
4495 spec->gpio_dir |= spec->gpio_led;
4496 spec->gpio_data |= spec->gpio_led;
4497 } else {
4498 codec->power_filter = stac_vref_led_power_filter;
4499 }
4500 }
4501
4502 if (spec->mic_mute_led_gpio) {
4503 spec->gpio_mask |= spec->mic_mute_led_gpio;
4504 spec->gpio_dir |= spec->mic_mute_led_gpio;
4505 spec->mic_enabled = 0;
4506 spec->gpio_data |= spec->mic_mute_led_gpio;
4507
4508 spec->gen.cap_sync_hook = stac_capture_led_hook;
4509 }
4510 }
4511
4512 static int patch_stac92hd83xxx(struct hda_codec *codec)
4513 {
4514 struct sigmatel_spec *spec;
4515 int err;
4516
4517 err = alloc_stac_spec(codec);
4518 if (err < 0)
4519 return err;
4520
4521 codec->epss = 0; /* longer delay needed for D3 */
4522
4523 spec = codec->spec;
4524 spec->linear_tone_beep = 0;
4525 spec->gen.own_eapd_ctl = 1;
4526 spec->gen.power_down_unused = 1;
4527 spec->gen.mixer_nid = 0x1b;
4528
4529 spec->gen.beep_nid = 0x21; /* digital beep */
4530 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4531 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4532 spec->default_polarity = -1; /* no default cfg */
4533
4534 codec->patch_ops = stac_patch_ops;
4535
4536 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4537
4538 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4539 stac92hd83xxx_fixups);
4540 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4541
4542 stac_setup_gpio(codec);
4543
4544 err = stac_parse_auto_config(codec);
4545 if (err < 0) {
4546 stac_free(codec);
4547 return err;
4548 }
4549
4550 codec->proc_widget_hook = stac92hd_proc_hook;
4551
4552 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4553
4554 return 0;
4555 }
4556
4557 static const hda_nid_t stac92hd95_pwr_nids[] = {
4558 0x0a, 0x0b, 0x0c, 0x0d
4559 };
4560
4561 static int patch_stac92hd95(struct hda_codec *codec)
4562 {
4563 struct sigmatel_spec *spec;
4564 int err;
4565
4566 err = alloc_stac_spec(codec);
4567 if (err < 0)
4568 return err;
4569
4570 codec->epss = 0; /* longer delay needed for D3 */
4571
4572 spec = codec->spec;
4573 spec->linear_tone_beep = 0;
4574 spec->gen.own_eapd_ctl = 1;
4575 spec->gen.power_down_unused = 1;
4576
4577 spec->gen.beep_nid = 0x19; /* digital beep */
4578 spec->pwr_nids = stac92hd95_pwr_nids;
4579 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4580 spec->default_polarity = -1; /* no default cfg */
4581
4582 codec->patch_ops = stac_patch_ops;
4583
4584 err = stac_parse_auto_config(codec);
4585 if (err < 0) {
4586 stac_free(codec);
4587 return err;
4588 }
4589
4590 codec->proc_widget_hook = stac92hd_proc_hook;
4591
4592 return 0;
4593 }
4594
4595 static int patch_stac92hd71bxx(struct hda_codec *codec)
4596 {
4597 struct sigmatel_spec *spec;
4598 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4599 int err;
4600
4601 err = alloc_stac_spec(codec);
4602 if (err < 0)
4603 return err;
4604
4605 spec = codec->spec;
4606 spec->linear_tone_beep = 0;
4607 spec->gen.own_eapd_ctl = 1;
4608 spec->gen.power_down_unused = 1;
4609 spec->gen.mixer_nid = 0x17;
4610 spec->have_spdif_mux = 1;
4611
4612 codec->patch_ops = stac_patch_ops;
4613
4614 /* GPIO0 = EAPD */
4615 spec->gpio_mask = 0x01;
4616 spec->gpio_dir = 0x01;
4617 spec->gpio_data = 0x01;
4618
4619 switch (codec->vendor_id) {
4620 case 0x111d76b6: /* 4 Port without Analog Mixer */
4621 case 0x111d76b7:
4622 unmute_init++;
4623 break;
4624 case 0x111d7608: /* 5 Port with Analog Mixer */
4625 if ((codec->revision_id & 0xf) == 0 ||
4626 (codec->revision_id & 0xf) == 1)
4627 spec->stream_delay = 40; /* 40 milliseconds */
4628
4629 /* disable VSW */
4630 unmute_init++;
4631 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4632 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4633 break;
4634 case 0x111d7603: /* 6 Port with Analog Mixer */
4635 if ((codec->revision_id & 0xf) == 1)
4636 spec->stream_delay = 40; /* 40 milliseconds */
4637
4638 break;
4639 }
4640
4641 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4642 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4643
4644 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4645 snd_hda_sequence_write_cache(codec, unmute_init);
4646
4647 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4648 spec->aloopback_mask = 0x50;
4649 spec->aloopback_shift = 0;
4650
4651 spec->powerdown_adcs = 1;
4652 spec->gen.beep_nid = 0x26; /* digital beep */
4653 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4654 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4655
4656 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4657 stac92hd71bxx_fixups);
4658 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4659
4660 stac_setup_gpio(codec);
4661
4662 err = stac_parse_auto_config(codec);
4663 if (err < 0) {
4664 stac_free(codec);
4665 return err;
4666 }
4667
4668 codec->proc_widget_hook = stac92hd7x_proc_hook;
4669
4670 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4671
4672 return 0;
4673 }
4674
4675 static int patch_stac922x(struct hda_codec *codec)
4676 {
4677 struct sigmatel_spec *spec;
4678 int err;
4679
4680 err = alloc_stac_spec(codec);
4681 if (err < 0)
4682 return err;
4683
4684 spec = codec->spec;
4685 spec->linear_tone_beep = 1;
4686 spec->gen.own_eapd_ctl = 1;
4687
4688 codec->patch_ops = stac_patch_ops;
4689
4690 snd_hda_add_verbs(codec, stac922x_core_init);
4691
4692 /* Fix Mux capture level; max to 2 */
4693 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4694 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4695 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4696 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4697 (0 << AC_AMPCAP_MUTE_SHIFT));
4698
4699 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4700 stac922x_fixups);
4701 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4702
4703 err = stac_parse_auto_config(codec);
4704 if (err < 0) {
4705 stac_free(codec);
4706 return err;
4707 }
4708
4709 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4710
4711 return 0;
4712 }
4713
4714 static const char * const stac927x_spdif_labels[] = {
4715 "Digital Playback", "ADAT", "Analog Mux 1",
4716 "Analog Mux 2", "Analog Mux 3", NULL
4717 };
4718
4719 static int patch_stac927x(struct hda_codec *codec)
4720 {
4721 struct sigmatel_spec *spec;
4722 int err;
4723
4724 err = alloc_stac_spec(codec);
4725 if (err < 0)
4726 return err;
4727
4728 spec = codec->spec;
4729 spec->linear_tone_beep = 1;
4730 spec->gen.own_eapd_ctl = 1;
4731 spec->have_spdif_mux = 1;
4732 spec->spdif_labels = stac927x_spdif_labels;
4733
4734 spec->gen.beep_nid = 0x23; /* digital beep */
4735
4736 /* GPIO0 High = Enable EAPD */
4737 spec->eapd_mask = spec->gpio_mask = 0x01;
4738 spec->gpio_dir = spec->gpio_data = 0x01;
4739
4740 spec->aloopback_ctl = &stac927x_loopback;
4741 spec->aloopback_mask = 0x40;
4742 spec->aloopback_shift = 0;
4743 spec->eapd_switch = 1;
4744
4745 codec->patch_ops = stac_patch_ops;
4746
4747 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4748 stac927x_fixups);
4749 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4750
4751 if (!spec->volknob_init)
4752 snd_hda_add_verbs(codec, stac927x_core_init);
4753
4754 err = stac_parse_auto_config(codec);
4755 if (err < 0) {
4756 stac_free(codec);
4757 return err;
4758 }
4759
4760 codec->proc_widget_hook = stac927x_proc_hook;
4761
4762 /*
4763 * !!FIXME!!
4764 * The STAC927x seem to require fairly long delays for certain
4765 * command sequences. With too short delays (even if the answer
4766 * is set to RIRB properly), it results in the silence output
4767 * on some hardwares like Dell.
4768 *
4769 * The below flag enables the longer delay (see get_response
4770 * in hda_intel.c).
4771 */
4772 codec->bus->needs_damn_long_delay = 1;
4773
4774 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4775
4776 return 0;
4777 }
4778
4779 static int patch_stac9205(struct hda_codec *codec)
4780 {
4781 struct sigmatel_spec *spec;
4782 int err;
4783
4784 err = alloc_stac_spec(codec);
4785 if (err < 0)
4786 return err;
4787
4788 spec = codec->spec;
4789 spec->linear_tone_beep = 1;
4790 spec->gen.own_eapd_ctl = 1;
4791 spec->have_spdif_mux = 1;
4792
4793 spec->gen.beep_nid = 0x23; /* digital beep */
4794
4795 snd_hda_add_verbs(codec, stac9205_core_init);
4796 spec->aloopback_ctl = &stac9205_loopback;
4797
4798 spec->aloopback_mask = 0x40;
4799 spec->aloopback_shift = 0;
4800
4801 /* GPIO0 High = EAPD */
4802 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4803 spec->gpio_data = 0x01;
4804
4805 /* Turn on/off EAPD per HP plugging */
4806 spec->eapd_switch = 1;
4807
4808 codec->patch_ops = stac_patch_ops;
4809
4810 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4811 stac9205_fixups);
4812 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4813
4814 err = stac_parse_auto_config(codec);
4815 if (err < 0) {
4816 stac_free(codec);
4817 return err;
4818 }
4819
4820 codec->proc_widget_hook = stac9205_proc_hook;
4821
4822 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4823
4824 return 0;
4825 }
4826
4827 /*
4828 * STAC9872 hack
4829 */
4830
4831 static const struct hda_verb stac9872_core_init[] = {
4832 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4833 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4834 {}
4835 };
4836
4837 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4838 { 0x0a, 0x03211020 },
4839 { 0x0b, 0x411111f0 },
4840 { 0x0c, 0x411111f0 },
4841 { 0x0d, 0x03a15030 },
4842 { 0x0e, 0x411111f0 },
4843 { 0x0f, 0x90170110 },
4844 { 0x11, 0x411111f0 },
4845 { 0x13, 0x411111f0 },
4846 { 0x14, 0x90a7013e },
4847 {}
4848 };
4849
4850 static const struct hda_model_fixup stac9872_models[] = {
4851 { .id = STAC_9872_VAIO, .name = "vaio" },
4852 {}
4853 };
4854
4855 static const struct hda_fixup stac9872_fixups[] = {
4856 [STAC_9872_VAIO] = {
4857 .type = HDA_FIXUP_PINS,
4858 .v.pins = stac9872_vaio_pin_configs,
4859 },
4860 };
4861
4862 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4863 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4864 "Sony VAIO F/S", STAC_9872_VAIO),
4865 {} /* terminator */
4866 };
4867
4868 static int patch_stac9872(struct hda_codec *codec)
4869 {
4870 struct sigmatel_spec *spec;
4871 int err;
4872
4873 err = alloc_stac_spec(codec);
4874 if (err < 0)
4875 return err;
4876
4877 spec = codec->spec;
4878 spec->linear_tone_beep = 1;
4879 spec->gen.own_eapd_ctl = 1;
4880
4881 codec->patch_ops = stac_patch_ops;
4882
4883 snd_hda_add_verbs(codec, stac9872_core_init);
4884
4885 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4886 stac9872_fixups);
4887 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4888
4889 err = stac_parse_auto_config(codec);
4890 if (err < 0) {
4891 stac_free(codec);
4892 return -EINVAL;
4893 }
4894
4895 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4896
4897 return 0;
4898 }
4899
4900
4901 /*
4902 * patch entries
4903 */
4904 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4905 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4906 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4907 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4908 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4909 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4910 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4911 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4912 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4913 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4914 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4915 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4916 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4917 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4918 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4919 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4920 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4921 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4922 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4923 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4924 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4925 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4926 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4927 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4928 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4929 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4930 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4931 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4932 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4933 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4934 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4935 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4936 /* The following does not take into account .id=0x83847661 when subsys =
4937 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4938 * currently not fully supported.
4939 */
4940 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4941 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4942 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4943 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4944 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4945 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4946 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4947 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4948 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4949 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4950 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4951 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4952 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4953 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4954 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4955 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4956 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4957 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4958 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4959 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4960 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4961 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4962 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4963 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4964 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4965 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4966 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4967 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
4968 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4969 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4970 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4971 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4972 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4973 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4974 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4975 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4976 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4977 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4978 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4979 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4980 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4981 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4982 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4983 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4984 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4985 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4986 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4987 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4988 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4989 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4990 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4991 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4992 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4993 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4994 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4995 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4996 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4997 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4998 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4999 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
5000 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
5001 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
5002 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
5003 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
5004 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
5005 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
5006 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
5007 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
5008 {} /* terminator */
5009 };
5010
5011 MODULE_ALIAS("snd-hda-codec-id:8384*");
5012 MODULE_ALIAS("snd-hda-codec-id:111d*");
5013
5014 MODULE_LICENSE("GPL");
5015 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5016
5017 static struct hda_codec_preset_list sigmatel_list = {
5018 .preset = snd_hda_preset_sigmatel,
5019 .owner = THIS_MODULE,
5020 };
5021
5022 static int __init patch_sigmatel_init(void)
5023 {
5024 return snd_hda_add_codec_preset(&sigmatel_list);
5025 }
5026
5027 static void __exit patch_sigmatel_exit(void)
5028 {
5029 snd_hda_delete_codec_preset(&sigmatel_list);
5030 }
5031
5032 module_init(patch_sigmatel_init)
5033 module_exit(patch_sigmatel_exit)
Linux with added FPC-III support