1 /*!*****************************************************************************
3 *! Implements an interface for i2c compatible eeproms to run under Linux.
4 *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
5 *! Johan.Adolfsson@axis.com
8 *! 8k or not is detected (the assumes 2k or 16k)
9 *! 2k or 16k detected using test reads and writes.
11 *!------------------------------------------------------------------------
16 *! Aug 28 1999 Edgar Iglesias Initial Version
17 *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
18 *! Sep 03 1999 Edgar Iglesias Updated probe.
19 *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
22 *! (c) 1999 Axis Communications AB, Lund, Sweden
23 *!*****************************************************************************/
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/smp_lock.h>
32 #include <linux/wait.h>
33 #include <asm/uaccess.h>
38 /* If we should use adaptive timing or not: */
39 /* #define EEPROM_ADAPTIVE_TIMING */
41 #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
42 #define EEPROM_MINOR_NR 0
44 /* Empirical sane initial value of the delay, the value will be adapted to
45 * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
47 #define INITIAL_WRITEDELAY_US 4000
48 #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
50 /* This one defines how many times to try when eeprom fails. */
51 #define EEPROM_RETRIES 10
53 #define EEPROM_2KB (2 * 1024)
54 /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
55 #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
56 #define EEPROM_16KB (16 * 1024)
58 #define i2c_delay(x) udelay(x)
61 * This structure describes the attached eeprom chip.
62 * The values are probed for.
68 unsigned long sequential_write_pagesize
;
69 unsigned char select_cmd
;
70 unsigned long usec_delay_writecycles
; /* Min time between write cycles
71 (up to 10ms for some models) */
72 unsigned long usec_delay_step
; /* For adaptive algorithm */
73 int adapt_state
; /* 1 = To high , 0 = Even, -1 = To low */
75 /* this one is to keep the read/write operations atomic */
76 wait_queue_head_t wait_q
;
78 int retry_cnt_addr
; /* Used to keep track of number of retries for
79 adaptive timing adjustments */
83 static int eeprom_open(struct inode
* inode
, struct file
* file
);
84 static loff_t
eeprom_lseek(struct file
* file
, loff_t offset
, int orig
);
85 static ssize_t
eeprom_read(struct file
* file
, char * buf
, size_t count
,
87 static ssize_t
eeprom_write(struct file
* file
, const char * buf
, size_t count
,
89 static int eeprom_close(struct inode
* inode
, struct file
* file
);
91 static int eeprom_address(unsigned long addr
);
92 static int read_from_eeprom(char * buf
, int count
);
93 static int eeprom_write_buf(loff_t addr
, const char * buf
, int count
);
94 static int eeprom_read_buf(loff_t addr
, char * buf
, int count
);
96 static void eeprom_disable_write_protect(void);
99 static const char eeprom_name
[] = "eeprom";
101 /* chip description */
102 static struct eeprom_type eeprom
;
104 /* This is the exported file-operations structure for this device. */
105 const struct file_operations eeprom_fops
=
107 .llseek
= eeprom_lseek
,
109 .write
= eeprom_write
,
111 .release
= eeprom_close
114 /* eeprom init call. Probes for different eeprom models. */
116 int __init
eeprom_init(void)
118 init_waitqueue_head(&eeprom
.wait_q
);
121 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
122 #define EETEXT "Found"
124 #define EETEXT "Assuming"
126 if (register_chrdev(EEPROM_MAJOR_NR
, eeprom_name
, &eeprom_fops
))
128 printk(KERN_INFO
"%s: unable to get major %d for eeprom device\n",
129 eeprom_name
, EEPROM_MAJOR_NR
);
133 printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
136 * Note: Most of this probing method was taken from the printserver (5470e)
137 * codebase. It did not contain a way of finding the 16kB chips
138 * (M24128 or variants). The method used here might not work
139 * for all models. If you encounter problems the easiest way
140 * is probably to define your model within #ifdef's, and hard-
145 eeprom
.usec_delay_writecycles
= INITIAL_WRITEDELAY_US
;
146 eeprom
.usec_delay_step
= 128;
147 eeprom
.adapt_state
= 0;
149 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
156 unsigned char buf_2k_start
[16];
158 /* Im not sure this will work... :) */
159 /* assume 2kB, if failure go for 16kB */
160 /* Test with 16kB settings.. */
161 /* If it's a 2kB EEPROM and we address it outside it's range
162 * it will mirror the address space:
163 * 1. We read two locations (that are mirrored),
164 * if the content differs * it's a 16kB EEPROM.
165 * 2. if it doesn't differ - write different value to one of the locations,
166 * check the other - if content still is the same it's a 2k EEPROM,
167 * restore original data.
170 #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
174 eeprom
.size
= EEPROM_2KB
;
175 eeprom
.select_cmd
= 0xA0;
176 eeprom
.sequential_write_pagesize
= 16;
177 if( eeprom_read_buf( 0, buf_2k_start
, 16 ) == 16 )
179 D(printk("2k start: '%16.16s'\n", buf_2k_start
));
183 printk(KERN_INFO
"%s: Failed to read in 2k mode!\n", eeprom_name
);
187 eeprom
.size
= EEPROM_16KB
;
188 eeprom
.select_cmd
= 0xA0;
189 eeprom
.sequential_write_pagesize
= 64;
192 unsigned char loc1
[4], loc2
[4], tmp
[4];
193 if( eeprom_read_buf(LOC2
, loc2
, 4) == 4)
195 if( eeprom_read_buf(LOC1
, loc1
, 4) == 4)
197 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
198 LOC1
, loc1
, LOC2
, loc2
));
200 if (memcmp(loc1
, loc2
, 4) != 0 )
203 printk(KERN_INFO
"%s: 16k detected in step 1\n", eeprom_name
);
204 eeprom
.size
= EEPROM_16KB
;
210 /* Do step 2 check */
213 if (eeprom_write_buf(LOC1
, loc1
, 1) == 1)
215 /* If 2k EEPROM this write will actually write 10 bytes
218 D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
219 LOC1
, loc1
, LOC2
, loc2
));
220 if( eeprom_read_buf(LOC1
, tmp
, 4) == 4)
222 D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
224 if (memcmp(loc1
, tmp
, 4) != 0 )
226 printk(KERN_INFO
"%s: read and write differs! Not 16kB\n",
230 if (eeprom_write_buf(LOC1
, loc1
, 1) == 1)
236 printk(KERN_INFO
"%s: Restore 2k failed during probe,"
237 " EEPROM might be corrupt!\n", eeprom_name
);
241 /* Go to 2k mode and write original data */
242 eeprom
.size
= EEPROM_2KB
;
243 eeprom
.select_cmd
= 0xA0;
244 eeprom
.sequential_write_pagesize
= 16;
245 if( eeprom_write_buf(0, buf_2k_start
, 16) == 16)
250 printk(KERN_INFO
"%s: Failed to write back 2k start!\n",
254 eeprom
.size
= EEPROM_2KB
;
260 if( eeprom_read_buf(LOC2
, loc2
, 1) == 1)
262 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
263 LOC1
, loc1
, LOC2
, loc2
));
264 if (memcmp(loc1
, loc2
, 4) == 0 )
266 /* Data the same, must be mirrored -> 2k */
268 printk(KERN_INFO
"%s: 2k detected in step 2\n", eeprom_name
);
270 if (eeprom_write_buf(LOC1
, loc1
, 1) == 1)
276 printk(KERN_INFO
"%s: Restore 2k failed during probe,"
277 " EEPROM might be corrupt!\n", eeprom_name
);
281 eeprom
.size
= EEPROM_2KB
;
285 printk(KERN_INFO
"%s: 16k detected in step 2\n",
288 /* Data differs, assume 16k */
290 if (eeprom_write_buf(LOC1
, loc1
, 1) == 1)
296 printk(KERN_INFO
"%s: Restore 16k failed during probe,"
297 " EEPROM might be corrupt!\n", eeprom_name
);
300 eeprom
.size
= EEPROM_16KB
;
309 printk(KERN_INFO
"%s: Probing failed!, using 2KB!\n", eeprom_name
);
310 eeprom
.size
= EEPROM_2KB
;
321 eeprom
.size
= EEPROM_2KB
;
329 eeprom
.size
= EEPROM_2KB
;
335 eeprom
.size
= EEPROM_8KB
;
340 #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
341 eeprom
.size
= EEPROM_16KB
;
342 #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
343 eeprom
.size
= EEPROM_8KB
;
344 #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
345 eeprom
.size
= EEPROM_2KB
;
351 printk("%s: " EETEXT
" i2c compatible 2kB eeprom.\n", eeprom_name
);
352 eeprom
.sequential_write_pagesize
= 16;
353 eeprom
.select_cmd
= 0xA0;
356 printk("%s: " EETEXT
" i2c compatible 8kB eeprom.\n", eeprom_name
);
357 eeprom
.sequential_write_pagesize
= 16;
358 eeprom
.select_cmd
= 0x80;
361 printk("%s: " EETEXT
" i2c compatible 16kB eeprom.\n", eeprom_name
);
362 eeprom
.sequential_write_pagesize
= 64;
363 eeprom
.select_cmd
= 0xA0;
367 printk("%s: Did not find a supported eeprom\n", eeprom_name
);
373 eeprom_disable_write_protect();
378 /* Opens the device. */
379 static int eeprom_open(struct inode
* inode
, struct file
* file
)
382 if(iminor(inode
) != EEPROM_MINOR_NR
)
384 if(imajor(inode
) != EEPROM_MAJOR_NR
)
387 if( eeprom
.size
> 0 )
393 /* No EEprom found */
397 /* Changes the current file position. */
399 static loff_t
eeprom_lseek(struct file
* file
, loff_t offset
, int orig
)
402 * orig 0: position from begning of eeprom
403 * orig 1: relative from current position
404 * orig 2: position from last eeprom address
410 file
->f_pos
= offset
;
413 file
->f_pos
+= offset
;
416 file
->f_pos
= eeprom
.size
- offset
;
422 /* truncate position */
429 if (file
->f_pos
>= eeprom
.size
)
431 file
->f_pos
= eeprom
.size
- 1;
435 return ( file
->f_pos
);
438 /* Reads data from eeprom. */
440 static int eeprom_read_buf(loff_t addr
, char * buf
, int count
)
445 return eeprom_read(&f
, buf
, count
, &addr
);
450 /* Reads data from eeprom. */
452 static ssize_t
eeprom_read(struct file
* file
, char * buf
, size_t count
, loff_t
*off
)
455 unsigned long p
= file
->f_pos
;
459 if(p
>= eeprom
.size
) /* Address i 0 - (size-1) */
464 wait_event_interruptible(eeprom
.wait_q
, !eeprom
.busy
);
465 if (signal_pending(current
))
470 page
= (unsigned char) (p
>> 8);
472 if(!eeprom_address(p
))
474 printk(KERN_INFO
"%s: Read failed to address the eeprom: "
475 "0x%08X (%i) page: %i\n", eeprom_name
, (int)p
, (int)p
, page
);
478 /* don't forget to wake them up */
480 wake_up_interruptible(&eeprom
.wait_q
);
484 if( (p
+ count
) > eeprom
.size
)
487 count
= eeprom
.size
- p
;
490 /* stop dummy write op and initiate the read op */
493 /* special case for small eeproms */
494 if(eeprom
.size
< EEPROM_16KB
)
496 i2c_outbyte( eeprom
.select_cmd
| 1 | (page
<< 1) );
499 /* go on with the actual read */
500 read
= read_from_eeprom( buf
, count
);
508 wake_up_interruptible(&eeprom
.wait_q
);
512 /* Writes data to eeprom. */
514 static int eeprom_write_buf(loff_t addr
, const char * buf
, int count
)
520 return eeprom_write(&f
, buf
, count
, &addr
);
524 /* Writes data to eeprom. */
526 static ssize_t
eeprom_write(struct file
* file
, const char * buf
, size_t count
,
529 int i
, written
, restart
=1;
532 if (!access_ok(VERIFY_READ
, buf
, count
))
537 wait_event_interruptible(eeprom
.wait_q
, !eeprom
.busy
);
538 /* bail out if we get interrupted */
539 if (signal_pending(current
))
542 for(i
= 0; (i
< EEPROM_RETRIES
) && (restart
> 0); i
++)
549 while( (written
< count
) && (p
< eeprom
.size
))
551 /* address the eeprom */
552 if(!eeprom_address(p
))
554 printk(KERN_INFO
"%s: Write failed to address the eeprom: "
555 "0x%08X (%i) \n", eeprom_name
, (int)p
, (int)p
);
558 /* don't forget to wake them up */
560 wake_up_interruptible(&eeprom
.wait_q
);
563 #ifdef EEPROM_ADAPTIVE_TIMING
564 /* Adaptive algorithm to adjust timing */
565 if (eeprom
.retry_cnt_addr
> 0)
568 D(printk(">D=%i d=%i\n",
569 eeprom
.usec_delay_writecycles
, eeprom
.usec_delay_step
));
571 if (eeprom
.usec_delay_step
< 4)
573 eeprom
.usec_delay_step
++;
574 eeprom
.usec_delay_writecycles
+= eeprom
.usec_delay_step
;
579 if (eeprom
.adapt_state
> 0)
582 eeprom
.usec_delay_step
*= 2;
583 if (eeprom
.usec_delay_step
> 2)
585 eeprom
.usec_delay_step
--;
587 eeprom
.usec_delay_writecycles
+= eeprom
.usec_delay_step
;
589 else if (eeprom
.adapt_state
< 0)
591 /* To High before (toggle dir) */
592 eeprom
.usec_delay_writecycles
+= eeprom
.usec_delay_step
;
593 if (eeprom
.usec_delay_step
> 1)
595 eeprom
.usec_delay_step
/= 2;
596 eeprom
.usec_delay_step
--;
601 eeprom
.adapt_state
= 1;
605 /* To High (or good) now */
606 D(printk("<D=%i d=%i\n",
607 eeprom
.usec_delay_writecycles
, eeprom
.usec_delay_step
));
609 if (eeprom
.adapt_state
< 0)
612 if (eeprom
.usec_delay_step
> 1)
614 eeprom
.usec_delay_step
*= 2;
615 eeprom
.usec_delay_step
--;
617 if (eeprom
.usec_delay_writecycles
> eeprom
.usec_delay_step
)
619 eeprom
.usec_delay_writecycles
-= eeprom
.usec_delay_step
;
623 else if (eeprom
.adapt_state
> 0)
625 /* To Low before (toggle dir) */
626 if (eeprom
.usec_delay_writecycles
> eeprom
.usec_delay_step
)
628 eeprom
.usec_delay_writecycles
-= eeprom
.usec_delay_step
;
630 if (eeprom
.usec_delay_step
> 1)
632 eeprom
.usec_delay_step
/= 2;
633 eeprom
.usec_delay_step
--;
636 eeprom
.adapt_state
= -1;
639 if (eeprom
.adapt_state
> -100)
641 eeprom
.adapt_state
--;
645 /* Restart adaption */
646 D(printk("#Restart\n"));
647 eeprom
.usec_delay_step
++;
650 #endif /* EEPROM_ADAPTIVE_TIMING */
651 /* write until we hit a page boundary or count */
654 i2c_outbyte(buf
[written
]);
658 printk(KERN_INFO
"%s: write error, retrying. %d\n", eeprom_name
, i
);
664 } while( written
< count
&& ( p
% eeprom
.sequential_write_pagesize
));
666 /* end write cycle */
668 i2c_delay(eeprom
.usec_delay_writecycles
);
673 wake_up_interruptible(&eeprom
.wait_q
);
674 if (written
== 0 && file
->f_pos
>= eeprom
.size
){
677 file
->f_pos
+= written
;
681 /* Closes the device. */
683 static int eeprom_close(struct inode
* inode
, struct file
* file
)
685 /* do nothing for now */
689 /* Sets the current address of the eeprom. */
691 static int eeprom_address(unsigned long addr
)
694 unsigned char page
, offset
;
696 page
= (unsigned char) (addr
>> 8);
697 offset
= (unsigned char) addr
;
699 for(i
= 0; i
< EEPROM_RETRIES
; i
++)
701 /* start a dummy write for addressing */
704 if(eeprom
.size
== EEPROM_16KB
)
706 i2c_outbyte( eeprom
.select_cmd
);
712 i2c_outbyte( eeprom
.select_cmd
| (page
<< 1) );
718 /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
719 i2c_delay(MAX_WRITEDELAY_US
/ EEPROM_RETRIES
* i
);
720 /* The chip needs up to 10 ms from write stop to next start */
738 eeprom
.retry_cnt_addr
= i
;
739 D(printk("%i\n", eeprom
.retry_cnt_addr
));
740 if(eeprom
.retry_cnt_addr
== EEPROM_RETRIES
)
748 /* Reads from current address. */
750 static int read_from_eeprom(char * buf
, int count
)
754 for(i
= 0; i
< EEPROM_RETRIES
; i
++)
756 if(eeprom
.size
== EEPROM_16KB
)
758 i2c_outbyte( eeprom
.select_cmd
| 1 );
767 if(i
== EEPROM_RETRIES
)
769 printk(KERN_INFO
"%s: failed to read from eeprom\n", eeprom_name
);
775 while( (read
< count
))
777 if (put_user(i2c_inbyte(), &buf
[read
++]))
785 * make sure we don't ack last byte or you will get very strange
794 /* stop the operation */
800 /* Disables write protection if applicable. */
803 #define ax_printf printk
804 static void eeprom_disable_write_protect(void)
806 /* Disable write protect */
807 if (eeprom
.size
== EEPROM_8KB
)
809 /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
814 DBP_SAVE(ax_printf("Get ack returns false\n"));
819 DBP_SAVE(ax_printf("Get ack returns false 2\n"));
824 DBP_SAVE(ax_printf("Get ack returns false 3\n"));
830 /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
835 DBP_SAVE(ax_printf("Get ack returns false 55\n"));
840 DBP_SAVE(ax_printf("Get ack returns false 52\n"));
845 DBP_SAVE(ax_printf("Get ack returns false 53\n"));
849 /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
854 DBP_SAVE(ax_printf("Get ack returns false 56\n"));
859 DBP_SAVE(ax_printf("Get ack returns false 57\n"));
864 DBP_SAVE(ax_printf("Get ack returns false 58\n"));
868 /* Write protect disabled */
872 module_init(eeprom_init
);