1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
26 - const: allwinner,sun6i-a31s-tcon
27 - const: allwinner,sun7i-a20-tcon
28 - const: allwinner,sun8i-a23-tcon
29 - const: allwinner,sun8i-a33-tcon
30 - const: allwinner,sun8i-a83t-tcon-lcd
31 - const: allwinner,sun8i-a83t-tcon-tv
32 - const: allwinner,sun8i-r40-tcon-tv
33 - const: allwinner,sun8i-v3s-tcon
34 - const: allwinner,sun9i-a80-tcon-lcd
35 - const: allwinner,sun9i-a80-tcon-tv
39 - allwinner,sun7i-a20-tcon0
40 - allwinner,sun7i-a20-tcon1
41 - const: allwinner,sun7i-a20-tcon
45 - allwinner,sun50i-a64-tcon-lcd
46 - const: allwinner,sun8i-a83t-tcon-lcd
50 - allwinner,sun8i-h3-tcon-tv
51 - allwinner,sun50i-a64-tcon-tv
52 - const: allwinner,sun8i-a83t-tcon-tv
56 - allwinner,sun50i-h6-tcon-tv
57 - const: allwinner,sun8i-r40-tcon-tv
75 Name of the LCD pixel clock created.
76 $ref: /schemas/types.yaml#/definitions/string-array
85 - description: TCON Reset Line
88 - description: TCON Reset Line
89 - description: TCON LVDS Reset Line
92 - description: TCON Reset Line
93 - description: TCON eDP Reset Line
96 - description: TCON Reset Line
97 - description: TCON eDP Reset Line
98 - description: TCON LVDS Reset Line
120 A ports node with endpoint definitions as defined in
121 Documentation/devicetree/bindings/media/video-interfaces.txt.
133 Input endpoints of the controller.
138 Output endpoints of the controller.
141 "^endpoint(@[0-9])$":
145 allwinner,tcon-channel:
146 $ref: /schemas/types.yaml#/definitions/uint32
148 TCON can have 1 or 2 channels, usually with the
149 first channel being used for the panels interfaces
150 (RGB, LVDS, etc.), and the second being used for the
151 outputs that require another controller (TV Encoder,
154 If that property is present, specifies the TCON
155 channel the endpoint is associated to. If that
156 property is not present, the endpoint number will be
157 used as the channel number.
159 unevaluatedProperties: true
167 additionalProperties: false
178 additionalProperties: false
186 - allwinner,sun4i-a10-tcon
187 - allwinner,sun5i-a13-tcon
188 - allwinner,sun7i-a20-tcon
206 - allwinner,sun6i-a31-tcon
207 - allwinner,sun6i-a31s-tcon
226 - allwinner,sun8i-a23-tcon
227 - allwinner,sun8i-a33-tcon
245 - allwinner,sun8i-a83t-tcon-lcd
246 - allwinner,sun8i-v3s-tcon
247 - allwinner,sun9i-a80-tcon-lcd
264 - allwinner,sun8i-a83t-tcon-tv
265 - allwinner,sun8i-r40-tcon-tv
266 - allwinner,sun9i-a80-tcon-tv
283 - allwinner,sun5i-a13-tcon
284 - allwinner,sun6i-a31-tcon
285 - allwinner,sun6i-a31s-tcon
286 - allwinner,sun7i-a20-tcon
287 - allwinner,sun8i-a23-tcon
288 - allwinner,sun8i-a33-tcon
289 - allwinner,sun8i-v3s-tcon
290 - allwinner,sun9i-a80-tcon-lcd
291 - allwinner,sun4i-a10-tcon
292 - allwinner,sun8i-a83t-tcon-lcd
304 - allwinner,sun6i-a31-tcon
305 - allwinner,sun6i-a31s-tcon
306 - allwinner,sun8i-a23-tcon
307 - allwinner,sun8i-a33-tcon
308 - allwinner,sun8i-a83t-tcon-lcd
325 - allwinner,sun9i-a80-tcon-lcd
343 - allwinner,sun9i-a80-tcon-tv
360 - allwinner,sun4i-a10-tcon
361 - allwinner,sun5i-a13-tcon
362 - allwinner,sun6i-a31-tcon
363 - allwinner,sun6i-a31s-tcon
364 - allwinner,sun7i-a20-tcon
365 - allwinner,sun8i-a23-tcon
366 - allwinner,sun8i-a33-tcon
374 #include <dt-bindings/dma/sun4i-a10.h>
377 * This comes from the clock/sun4i-a10-ccu.h and
378 * reset/sun4i-a10-ccu.h headers, but we can't include them since
379 * it would trigger a bunch of warnings for redefinitions of
380 * symbols with the other example.
383 #define CLK_AHB_LCD0 56
384 #define CLK_TCON0_CH0 149
385 #define CLK_TCON0_CH1 155
388 lcd-controller@1c0c000 {
389 compatible = "allwinner,sun4i-a10-tcon";
390 reg = <0x01c0c000 0x1000>;
392 resets = <&ccu RST_TCON0>;
394 clocks = <&ccu CLK_AHB_LCD0>,
395 <&ccu CLK_TCON0_CH0>,
396 <&ccu CLK_TCON0_CH1>;
400 clock-output-names = "tcon0-pixel-clock";
402 dmas = <&dma SUN4I_DMA_DEDICATED 14>;
405 #address-cells = <1>;
409 #address-cells = <1>;
415 remote-endpoint = <&be0_out_tcon0>;
420 remote-endpoint = <&be1_out_tcon0>;
425 #address-cells = <1>;
431 remote-endpoint = <&hdmi_in_tcon0>;
432 allwinner,tcon-channel = <1>;
444 #include <dt-bindings/interrupt-controller/arm-gic.h>
447 * This comes from the clock/sun6i-a31-ccu.h and
448 * reset/sun6i-a31-ccu.h headers, but we can't include them since
449 * it would trigger a bunch of warnings for redefinitions of
450 * symbols with the other example.
453 #define CLK_PLL_MIPI 15
454 #define CLK_AHB1_LCD0 47
455 #define CLK_LCD0_CH0 127
456 #define CLK_LCD0_CH1 129
457 #define RST_AHB1_LCD0 27
458 #define RST_AHB1_LVDS 41
460 lcd-controller@1c0c000 {
461 compatible = "allwinner,sun6i-a31-tcon";
462 reg = <0x01c0c000 0x1000>;
463 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
465 resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
466 reset-names = "lcd", "lvds";
467 clocks = <&ccu CLK_AHB1_LCD0>,
475 clock-output-names = "tcon0-pixel-clock";
479 #address-cells = <1>;
483 #address-cells = <1>;
489 remote-endpoint = <&drc0_out_tcon0>;
494 remote-endpoint = <&drc1_out_tcon0>;
499 #address-cells = <1>;
505 remote-endpoint = <&hdmi_in_tcon0>;
506 allwinner,tcon-channel = <1>;
520 #include <dt-bindings/interrupt-controller/arm-gic.h>
523 * This comes from the clock/sun9i-a80-ccu.h and
524 * reset/sun9i-a80-ccu.h headers, but we can't include them since
525 * it would trigger a bunch of warnings for redefinitions of
526 * symbols with the other example.
529 #define CLK_BUS_LCD0 102
531 #define RST_BUS_LCD0 22
532 #define RST_BUS_EDP 24
533 #define RST_BUS_LVDS 25
535 lcd-controller@3c00000 {
536 compatible = "allwinner,sun9i-a80-tcon-lcd";
537 reg = <0x03c00000 0x10000>;
538 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
539 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
540 clock-names = "ahb", "tcon-ch0";
541 resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
542 reset-names = "lcd", "edp", "lvds";
543 clock-output-names = "tcon0-pixel-clock";
547 #address-cells = <1>;
554 remote-endpoint = <&drc0_out_tcon0>;
571 #include <dt-bindings/interrupt-controller/arm-gic.h>
574 * This comes from the clock/sun8i-a83t-ccu.h and
575 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
576 * it would trigger a bunch of warnings for redefinitions of
577 * symbols with the other example.
580 #define CLK_BUS_TCON0 36
582 #define RST_BUS_TCON0 22
583 #define RST_BUS_LVDS 31
585 lcd-controller@1c0c000 {
586 compatible = "allwinner,sun8i-a83t-tcon-lcd";
587 reg = <0x01c0c000 0x1000>;
588 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
590 clock-names = "ahb", "tcon-ch0";
591 clock-output-names = "tcon-pixel-clock";
593 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
594 reset-names = "lcd", "lvds";
597 #address-cells = <1>;
601 #address-cells = <1>;
607 remote-endpoint = <&mixer0_out_tcon0>;
612 remote-endpoint = <&mixer1_out_tcon0>;
628 #include <dt-bindings/interrupt-controller/arm-gic.h>
631 * This comes from the clock/sun8i-r40-ccu.h and
632 * reset/sun8i-r40-ccu.h headers, but we can't include them since
633 * it would trigger a bunch of warnings for redefinitions of
634 * symbols with the other example.
637 #define CLK_BUS_TCON_TV0 73
638 #define RST_BUS_TCON_TV0 49
640 tcon_tv0: lcd-controller@1c73000 {
641 compatible = "allwinner,sun8i-r40-tcon-tv";
642 reg = <0x01c73000 0x1000>;
643 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
645 clock-names = "ahb", "tcon-ch1";
646 resets = <&ccu RST_BUS_TCON_TV0>;
650 #address-cells = <1>;
654 #address-cells = <1>;
660 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
665 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
669 tcon_tv0_out: port@1 {
670 #address-cells = <1>;
676 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
682 #undef CLK_BUS_TCON_TV0
683 #undef RST_BUS_TCON_TV0