1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs DMA Controller DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: "dma-controller.yaml#"
27 - description: Channel-specific registers
28 - description: System control registers
39 DMA clients must use the format described in dma.txt, giving a phandle
40 to the DMA controller plus the following 2 integer cells:
42 - Request type: The DMA request type for transfers to/from the
43 device on the allocated channel, as defined in the SoC documentation.
45 - Channel: If set to 0xffffffff, any available channel will be allocated
46 for the client. Otherwise, the exact channel specified will be used.
47 The channel should be reserved on the DMA controller using the
48 ingenic,reserved-channels property.
50 ingenic,reserved-channels:
51 $ref: /schemas/types.yaml#/definitions/uint32
53 Bitmask of channels to reserve for devices that need a specific
54 channel. These channels will only be assigned when explicitely
55 requested by a client. The primary use for this is channels 0 and
56 1, which can be configured to have special behaviour for NAND/BCH
57 when using programmable firmware.
65 unevaluatedProperties: false
69 #include <dt-bindings/clock/jz4780-cgu.h>
70 dma: dma-controller@13420000 {
71 compatible = "ingenic,jz4780-dma";
72 reg = <0x13420000 0x400>, <0x13421000 0x40>;
74 interrupt-parent = <&intc>;
77 clocks = <&cgu JZ4780_CLK_PDMA>;
81 ingenic,reserved-channels = <0x3>;