1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADF4350/ADF4351 wideband synthesizer
10 - Michael Hennerich <michael.hennerich@analog.com>
26 description: Clock to provide CLKIN reference clock signal.
33 description: Lock detect GPIO.
36 $ref: /schemas/types.yaml#/definitions/uint32
38 Channel spacing in Hz (influences MODULUS).
40 adi,power-up-frequency:
41 $ref: /schemas/types.yaml#/definitions/uint32
43 If set the PLL tunes to this frequency (in Hz) on driver probe.
45 adi,reference-div-factor:
46 $ref: /schemas/types.yaml#/definitions/uint32
48 If set the driver skips dynamic calculation and uses this default
51 adi,reference-doubler-enable:
52 $ref: /schemas/types.yaml#/definitions/flag
53 description: Enables reference doubler.
55 adi,reference-div2-enable:
56 $ref: /schemas/types.yaml#/definitions/flag
57 description: Enables reference divider.
59 adi,phase-detector-polarity-positive-enable:
60 $ref: /schemas/types.yaml#/definitions/flag
61 description: Enables positive phase detector polarity. Default negative.
63 adi,lock-detect-precision-6ns-enable:
64 $ref: /schemas/types.yaml#/definitions/flag
65 description: Enables 6ns lock detect precision. Default = 10ns.
67 adi,lock-detect-function-integer-n-enable:
68 $ref: /schemas/types.yaml#/definitions/flag
70 Enables lock detect for integer-N mode. Default = factional-N mode.
72 adi,charge-pump-current:
73 $ref: /schemas/types.yaml#/definitions/uint32
74 description: Charge pump current in mA. Default = 2500mA.
77 $ref: /schemas/types.yaml#/definitions/uint32
81 On chip multiplexer output selection.
82 Valid values for the multiplexer output are:
83 0: Three-State Output (default)
89 6: Digital lock detect
91 adi,low-spur-mode-enable:
92 $ref: /schemas/types.yaml#/definitions/flag
93 description: Enables low spur mode. Default = Low noise mode.
95 adi,cycle-slip-reduction-enable:
96 $ref: /schemas/types.yaml#/definitions/flag
97 description: Enables cycle slip reduction.
99 adi,charge-cancellation-enable:
100 $ref: /schemas/types.yaml#/definitions/flag
102 Enabled charge pump charge cancellation for integer-N modes.
104 adi,anti-backlash-3ns-enable:
105 $ref: /schemas/types.yaml#/definitions/flag
107 Enables 3ns antibacklash pulse width for integer-N modes.
109 adi,band-select-clock-mode-high-enable:
110 $ref: /schemas/types.yaml#/definitions/flag
111 description: Enables faster band selection logic.
113 adi,12bit-clk-divider:
114 $ref: /schemas/types.yaml#/definitions/uint32
116 Clock divider value used when adi,12bit-clkdiv-mode != 0
118 adi,clk-divider-mode:
119 $ref: /schemas/types.yaml#/definitions/uint32
122 Valid values for the clkdiv mode are:
123 0: Clock divider off (default)
125 2: Phase resync enable
127 adi,aux-output-enable:
128 $ref: /schemas/types.yaml#/definitions/flag
129 description: Enables auxiliary RF output.
131 adi,aux-output-fundamental-enable:
132 $ref: /schemas/types.yaml#/definitions/flag
134 Selects fundamental VCO output on the auxiliary RF output.
135 Default = Output of RF dividers.
137 adi,mute-till-lock-enable:
138 $ref: /schemas/types.yaml#/definitions/flag
139 description: Enables Mute-Till-Lock-Detect function.
142 $ref: /schemas/types.yaml#/definitions/uint32
145 Output power selection.
146 Valid values for the power mode are:
152 adi,aux-output-power:
153 $ref: /schemas/types.yaml#/definitions/uint32
156 Auxiliary output power selection.
157 Valid values for the power mode are:
163 additionalProperties: false
173 #address-cells = <1>;
177 compatible = "adi,adf4351";
179 spi-max-frequency = <10000000>;
180 clocks = <&clk0_ad9523 9>;
181 clock-names = "clkin";
182 adi,channel-spacing = <10000>;
183 adi,power-up-frequency = <2400000000>;
184 adi,phase-detector-polarity-positive-enable;
185 adi,charge-pump-current = <2500>;
186 adi,output-power = <3>;
187 adi,mute-till-lock-enable;