1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^memory-controller@[0-9a-f]+$"
22 - const: ingenic,jz4725b-nemc
23 - const: ingenic,jz4740-nemc
47 ingenic,nemc-bus-width:
48 $ref: /schemas/types.yaml#/definitions/uint32
50 description: Specifies the bus width in bits.
53 $ref: /schemas/types.yaml#/definitions/uint32
54 description: Address setup time in nanoseconds.
57 $ref: /schemas/types.yaml#/definitions/uint32
58 description: Address hold time in nanoseconds.
61 $ref: /schemas/types.yaml#/definitions/uint32
62 description: Burst pitch time in nanoseconds.
65 $ref: /schemas/types.yaml#/definitions/uint32
66 description: Address wait time in nanoseconds.
69 $ref: /schemas/types.yaml#/definitions/uint32
70 description: Static memory recovery time in nanoseconds.
83 additionalProperties: false
87 #include <dt-bindings/clock/jz4780-cgu.h>
88 #include <dt-bindings/gpio/gpio.h>
89 nemc: memory-controller@13410000 {
90 compatible = "ingenic,jz4780-nemc";
91 reg = <0x13410000 0x10000>;
94 ranges = <1 0 0x1b000000 0x1000000>,
95 <2 0 0x1a000000 0x1000000>,
96 <3 0 0x19000000 0x1000000>,
97 <4 0 0x18000000 0x1000000>,
98 <5 0 0x17000000 0x1000000>,
99 <6 0 0x16000000 0x1000000>;
101 clocks = <&cgu JZ4780_CLK_NEMC>;
104 compatible = "davicom,dm9000";
107 pinctrl-names = "default";
108 pinctrl-0 = <&pins_nemc_cs6>;
110 reg = <6 0 1>, /* addr */
113 ingenic,nemc-tAS = <15>;
114 ingenic,nemc-tAH = <10>;
115 ingenic,nemc-tBP = <20>;
116 ingenic,nemc-tAW = <50>;
117 ingenic,nemc-tSTRV = <100>;
119 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
120 vcc-supply = <ð0_power>;
122 interrupt-parent = <&gpe>;