1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 SoC External Memory Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
15 sent from the memory controller.
19 const: nvidia,tegra210-emc
26 - description: external memory clock
34 - description: EMC general interrupt
37 $ref: /schemas/types.yaml#/definitions/phandle
39 phandle to a reserved memory region describing the table of EMC
40 frequencies trained by the firmware
42 nvidia,memory-controller:
43 $ref: /schemas/types.yaml#/definitions/phandle
45 phandle of the memory controller node
52 - nvidia,memory-controller
54 additionalProperties: false
58 #include <dt-bindings/clock/tegra210-car.h>
59 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 emc_table: emc-table@83400000 {
67 compatible = "nvidia,tegra210-emc-table";
68 reg = <0x83400000 0x10000>;
72 external-memory-controller@7001b000 {
73 compatible = "nvidia,tegra210-emc";
74 reg = <0x7001b000 0x1000>,
77 clocks = <&tegra_car TEGRA210_CLK_EMC>;
79 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
80 memory-region = <&emc_table>;
81 nvidia,memory-controller = <&mc>;