Documentation/devicetree/bindings/mfd/samsung,sec-core.txt

   1 Binding for Samsung S2M and S5M family multi-function device
   2 ============================================================
   3
   4 This is a part of device tree bindings for S2M and S5M family multi-function
   5 devices.
   6
   7 The Samsung S2MPA01, S2MPS11/13/14/15, S2MPU02 and S5M8767 is a family
   8 of multi-function devices which include voltage and current regulators, RTC,
   9 charger controller, clock outputs and other sub-blocks. It is interfaced
  10 to the host controller using an I2C interface. Each sub-block is usually
  11 addressed by the host system using different I2C slave addresses.
  12
  13
  14 This document describes bindings for main device node. Optional sub-blocks
  15 must be a sub-nodes to it. Bindings for them can be found in:
  16  - bindings/regulator/samsung,s2mpa01.txt
  17  - bindings/regulator/samsung,s2mps11.txt
  18  - bindings/regulator/samsung,s5m8767.txt
  19  - bindings/clock/samsung,s2mps11.txt
  20
  21
  22 Required properties:
  23  - compatible: Should be one of the following
  24         - "samsung,s2mpa01-pmic",
  25         - "samsung,s2mps11-pmic",
  26         - "samsung,s2mps13-pmic",
  27         - "samsung,s2mps14-pmic",
  28         - "samsung,s2mps15-pmic",
  29         - "samsung,s2mpu02-pmic",
  30         - "samsung,s5m8767-pmic".
  31  - reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
  32
  33 Optional properties:
  34  - interrupts: Interrupt specifiers for interrupt sources.
  35  - samsung,s2mps11-wrstbi-ground: Indicates that WRSTBI pin of PMIC is pulled
  36    down. When the system is suspended it will always go down thus triggerring
  37    unwanted buck warm reset (setting buck voltages to default values).
  38  - samsung,s2mps11-acokb-ground: Indicates that ACOKB pin of S2MPS11 PMIC is
  39    connected to the ground so the PMIC must manually set PWRHOLD bit in CTRL1
  40    register to turn off the power. Usually the ACOKB is pulled up to VBATT so
  41    when PWRHOLD pin goes low, the rising ACOKB will trigger power off.
  42
  43 Example:
  44
  45         s2mps11_pmic@66 {
  46                 compatible = "samsung,s2mps11-pmic";
  47                 reg = <0x66>;
  48
  49                 s2m_osc: clocks {
  50                         compatible = "samsung,s2mps11-clk";
  51                         #clock-cells = <1>;
  52                         clock-output-names = "xx", "yy", "zz";
  53                 };
  54
  55                 regulators {
  56                         ldo1_reg: LDO1 {
  57                                 regulator-name = "VDD_ABB_3.3V";
  58                                 regulator-min-microvolt = <3300000>;
  59                                 regulator-max-microvolt = <3300000>;
  60                         };
  61
  62                         ldo2_reg: LDO2 {
  63                                 regulator-name = "VDD_ALIVE_1.1V";
  64                                 regulator-min-microvolt = <1100000>;
  65                                 regulator-max-microvolt = <1100000>;
  66                                 regulator-always-on;
  67                         };
  68
  69                         buck1_reg: BUCK1 {
  70                                 regulator-name = "vdd_mif";
  71                                 regulator-min-microvolt = <950000>;
  72                                 regulator-max-microvolt = <1350000>;
  73                                 regulator-always-on;
  74                                 regulator-boot-on;
  75                         };
  76
  77                         buck2_reg: BUCK2 {
  78                                 regulator-name = "vdd_arm";
  79                                 regulator-min-microvolt = <950000>;
  80                                 regulator-max-microvolt = <1350000>;
  81                                 regulator-always-on;
  82                                 regulator-boot-on;
  83                                 regulator-ramp-delay = <50000>;
  84                         };
  85                 };
  86         };