1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
10 - Christophe Kerello <christophe.kerello@st.com>
16 - st,stm32mp1-fmc2-nfc
27 - description: tx DMA channel
28 - description: rx DMA channel
29 - description: ecc DMA channel
48 - $ref: "nand-controller.yaml#"
54 const: st,stm32mp15-fmc2
59 - description: Registers
60 - description: Chip select 0 data
61 - description: Chip select 0 command
62 - description: Chip select 0 address space
63 - description: Chip select 1 data
64 - description: Chip select 1 command
65 - description: Chip select 1 address space
80 const: st,stm32mp1-fmc2-nfc
85 - description: Chip select 0 data
86 - description: Chip select 0 command
87 - description: Chip select 0 address space
88 - description: Chip select 1 data
89 - description: Chip select 1 command
90 - description: Chip select 1 address space
97 unevaluatedProperties: false
101 #include <dt-bindings/interrupt-controller/arm-gic.h>
102 #include <dt-bindings/clock/stm32mp1-clks.h>
103 #include <dt-bindings/reset/stm32mp1-resets.h>
104 nand-controller@58002000 {
105 compatible = "st,stm32mp15-fmc2";
106 reg = <0x58002000 0x1000>,
113 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
114 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
115 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
116 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
117 dma-names = "tx", "rx", "ecc";
118 clocks = <&rcc FMC_K>;
119 resets = <&rcc FMC_R>;
120 #address-cells = <1>;
126 #address-cells = <1>;