1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
6 ALTR is supported for legacy device trees, but is deprecated.
7 altr should be used for all new designs.
8 - reg: Address and length of the register set for the device. It contains
9 the information of registers in the same order as described by reg-names
10 - reg-names: Should contain the reg names
11 "control_port": MAC configuration space region
12 "tx_csr": xDMA Tx dispatcher control and status space region
13 "tx_desc": MSGDMA Tx dispatcher descriptor space region
14 "rx_csr" : xDMA Rx dispatcher control and status space region
15 "rx_desc": MSGDMA Rx dispatcher descriptor space region
16 "rx_resp": MSGDMA Rx dispatcher response space region
17 "s1": SGDMA descriptor memory
18 - interrupts: Should contain the TSE interrupts and it's mode.
19 - interrupt-names: Should contain the interrupt names
20 "rx_irq": xDMA Rx dispatcher interrupt
21 "tx_irq": xDMA Tx dispatcher interrupt
22 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes
23 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
24 - phy-mode: See ethernet.txt in the same directory.
25 - phy-handle: See ethernet.txt in the same directory.
26 - phy-addr: See ethernet.txt in the same directory. A configuration should
27 include phy-handle or phy-addr.
28 - altr,has-supplementary-unicast:
29 If present, TSE supports additional unicast addresses.
30 Otherwise additional unicast addresses are not supported.
31 - altr,has-hash-multicast-filter:
32 If present, TSE supports a hash based multicast filter.
33 Otherwise, hash-based multicast filtering is not supported.
35 - mdio device tree subnode: When the TSE has a phy connected to its local
36 mdio, there must be device tree subnode with the following
39 - compatible: Must be "altr,tse-mdio".
40 - #address-cells: Must be <1>.
41 - #size-cells: Must be <0>.
43 For each phy on the mdio bus, there must be a node with the following
46 - reg: phy id used to communicate to phy.
47 - device_type: Must be "ethernet-phy".
49 The MAC address will be determined using the optional properties defined in
54 tse_sub_0_eth_tse_0: ethernet@1,00000000 {
55 compatible = "altr,tse-msgdma-1.0";
56 reg = <0x00000001 0x00000000 0x00000400>,
57 <0x00000001 0x00000460 0x00000020>,
58 <0x00000001 0x00000480 0x00000020>,
59 <0x00000001 0x000004A0 0x00000008>,
60 <0x00000001 0x00000400 0x00000020>,
61 <0x00000001 0x00000420 0x00000020>;
62 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
63 interrupt-parent = <&hps_0_arm_gic_0>;
64 interrupts = <0 41 4>, <0 40 4>;
65 interrupt-names = "rx_irq", "tx_irq";
66 rx-fifo-depth = <2048>;
67 tx-fifo-depth = <2048>;
69 max-frame-size = <1500>;
70 local-mac-address = [ 00 00 00 00 00 00 ];
72 altr,has-supplementary-unicast;
73 altr,has-hash-multicast-filter;
76 compatible = "altr,tse-mdio";
79 phy0: ethernet-phy@0 {
81 device_type = "ethernet-phy";
84 phy1: ethernet-phy@1 {
86 device_type = "ethernet-phy";
92 tse_sub_1_eth_tse_0: ethernet@1,00001000 {
93 compatible = "altr,tse-msgdma-1.0";
94 reg = <0x00000001 0x00001000 0x00000400>,
95 <0x00000001 0x00001460 0x00000020>,
96 <0x00000001 0x00001480 0x00000020>,
97 <0x00000001 0x000014A0 0x00000008>,
98 <0x00000001 0x00001400 0x00000020>,
99 <0x00000001 0x00001420 0x00000020>;
100 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
101 interrupt-parent = <&hps_0_arm_gic_0>;
102 interrupts = <0 43 4>, <0 42 4>;
103 interrupt-names = "rx_irq", "tx_irq";
104 rx-fifo-depth = <2048>;
105 tx-fifo-depth = <2048>;
107 max-frame-size = <1500>;
108 local-mac-address = [ 00 00 00 00 00 00 ];
110 altr,has-supplementary-unicast;
111 altr,has-hash-multicast-filter;
112 phy-handle = <&phy1>;