1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
42 # We need to include all the compatibles from schemas that will
43 # include that schemas, otherwise compatible won't validate for
48 - allwinner,sun7i-a20-gmac
49 - allwinner,sun8i-a83t-emac
50 - allwinner,sun8i-h3-emac
51 - allwinner,sun8i-r40-emac
52 - allwinner,sun8i-v3s-emac
53 - allwinner,sun50i-a64-emac
54 - amlogic,meson6-dwmac
55 - amlogic,meson8b-dwmac
56 - amlogic,meson8m2-dwmac
57 - amlogic,meson-gxbb-dwmac
58 - amlogic,meson-axg-dwmac
78 - description: Combined signal for various interrupt events
79 - description: The interrupt to manage the remote wake-up packet detection
80 - description: The interrupt that occurs when Rx exits the LPI state
95 - description: GMAC main clock
96 - description: Peripheral registers interface clock
98 PTP reference clock. This clock is used for programming the
99 Timestamp Addend Register. If not passed then the system
100 clock will be used and this is fine on some platforms.
105 additionalItems: true
121 $ref: ethernet-controller.yaml#/properties/phy-connection-type
123 The property is identical to 'phy-mode', and assumes that there is mode
124 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
125 can be passive (no SW requirement), and requires that the MAC operate
126 in a different mode than the PHY in order to function.
129 $ref: /schemas/types.yaml#/definitions/phandle
131 AXI BUS Mode parameters. Phandle to a node that can contain the
133 * snps,lpi_en, enable Low Power Interface
134 * snps,xit_frm, unlock on WoL
135 * snps,wr_osr_lmt, max write outstanding req. limit
136 * snps,rd_osr_lmt, max read outstanding req. limit
137 * snps,kbbe, do not cross 1KiB boundary.
138 * snps,blen, this is a vector of supported burst length.
139 * snps,fb, fixed-burst
140 * snps,mb, mixed-burst
141 * snps,rb, rebuild INCRx Burst
144 $ref: /schemas/types.yaml#/definitions/phandle
146 Multiple RX Queues parameters. Phandle to a node that can
147 contain the following properties
148 * snps,rx-queues-to-use, number of RX queues to be used in the
150 * Choose one of these RX scheduling algorithms
151 * snps,rx-sched-sp, Strict priority
152 * snps,rx-sched-wsp, Weighted Strict priority
154 * Choose one of these modes
155 * snps,dcb-algorithm, Queue to be enabled as DCB
156 * snps,avb-algorithm, Queue to be enabled as AVB
157 * snps,map-to-dma-channel, Channel to map
158 * Specifiy specific packet routing
159 * snps,route-avcp, AV Untagged Control packets
160 * snps,route-ptp, PTP Packets
161 * snps,route-dcbcp, DCB Control Packets
162 * snps,route-up, Untagged Packets
163 * snps,route-multi-broad, Multicast & Broadcast Packets
164 * snps,priority, RX queue priority (Range 0x0 to 0xF)
167 $ref: /schemas/types.yaml#/definitions/phandle
169 Multiple TX Queues parameters. Phandle to a node that can
170 contain the following properties
171 * snps,tx-queues-to-use, number of TX queues to be used in the
173 * Choose one of these TX scheduling algorithms
174 * snps,tx-sched-wrr, Weighted Round Robin
175 * snps,tx-sched-wfq, Weighted Fair Queuing
176 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
177 * snps,tx-sched-sp, Strict priority
179 * snps,weight, TX queue weight (if using a DCB weight
181 * Choose one of these modes
182 * snps,dcb-algorithm, TX queue will be working in DCB
183 * snps,avb-algorithm, TX queue will be working in AVB
184 [Attention] Queue 0 is reserved for legacy traffic
185 and so no AVB is available in this queue.
186 * Configure Credit Base Shaper (if AVB Mode selected)
187 * snps,send_slope, enable Low Power Interface
188 * snps,idle_slope, unlock on WoL
189 * snps,high_credit, max write outstanding req. limit
190 * snps,low_credit, max read outstanding req. limit
191 * snps,priority, TX queue priority (Range 0x0 to 0xF)
199 snps,reset-active-low:
201 $ref: /schemas/types.yaml#/definitions/flag
203 Indicates that the PHY Reset is active low
205 snps,reset-delays-us:
208 Triplet of delays. The 1st cell is reset pre-delay in micro
209 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
210 cell is reset post-delay in micro seconds.
211 $ref: /schemas/types.yaml#/definitions/uint32-array
216 $ref: /schemas/types.yaml#/definitions/flag
218 Use Address-Aligned Beats
221 $ref: /schemas/types.yaml#/definitions/flag
223 Program the DMA to use the fixed burst mode
226 $ref: /schemas/types.yaml#/definitions/flag
228 Program the DMA to use the mixed burst mode
230 snps,force_thresh_dma_mode:
231 $ref: /schemas/types.yaml#/definitions/flag
233 Force DMA to use the threshold mode for both tx and rx
235 snps,force_sf_dma_mode:
236 $ref: /schemas/types.yaml#/definitions/flag
238 Force DMA to use the Store and Forward mode for both tx and
239 rx. This flag is ignored if force_thresh_dma_mode is set.
241 snps,en-tx-lpi-clockgating:
242 $ref: /schemas/types.yaml#/definitions/flag
244 Enable gating of the MAC TX clock during TX low-power mode
246 snps,multicast-filter-bins:
247 $ref: /schemas/types.yaml#/definitions/uint32
249 Number of multicast filter hash bins supported by this device
252 snps,perfect-filter-entries:
253 $ref: /schemas/types.yaml#/definitions/uint32
255 Number of perfect filter entries supported by this device
259 $ref: /schemas/types.yaml#/definitions/uint32
261 Port selection speed that can be passed to the core when PCS
262 is supported. For example, this is used in case of SGMII and
268 Creates and registers an MDIO bus.
272 const: snps,dwmac-mdio
285 snps,reset-active-low: ["snps,reset-gpio"]
286 snps,reset-delay-us: ["snps,reset-gpio"]
289 - $ref: "ethernet-controller.yaml#"
295 - allwinner,sun7i-a20-gmac
296 - allwinner,sun8i-a83t-emac
297 - allwinner,sun8i-h3-emac
298 - allwinner,sun8i-r40-emac
299 - allwinner,sun8i-v3s-emac
300 - allwinner,sun50i-a64-emac
309 Programmable Burst Length (tx and rx)
310 $ref: /schemas/types.yaml#/definitions/uint32
315 Tx Programmable Burst Length. If set, DMA tx will use this
316 value rather than snps,pbl.
317 $ref: /schemas/types.yaml#/definitions/uint32
322 Rx Programmable Burst Length. If set, DMA rx will use this
323 value rather than snps,pbl.
324 $ref: /schemas/types.yaml#/definitions/uint32
328 $ref: /schemas/types.yaml#/definitions/flag
330 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
331 rev < 3.50, don\'t multiply the values by 4.
338 - allwinner,sun7i-a20-gmac
339 - allwinner,sun8i-a83t-emac
340 - allwinner,sun8i-h3-emac
341 - allwinner,sun8i-r40-emac
342 - allwinner,sun8i-v3s-emac
343 - allwinner,sun50i-a64-emac
354 $ref: /schemas/types.yaml#/definitions/flag
356 Enables the TSO feature otherwise it will be managed by
357 MAC HW capability register.
359 additionalProperties: true
363 stmmac_axi_setup: stmmac-axi-config {
364 snps,wr_osr_lmt = <0xf>;
365 snps,rd_osr_lmt = <0xf>;
366 snps,blen = <256 128 64 32 0 0 0>;
369 mtl_rx_setup: rx-queues-config {
370 snps,rx-queues-to-use = <1>;
374 snps,map-to-dma-channel = <0x0>;
375 snps,priority = <0x0>;
379 mtl_tx_setup: tx-queues-config {
380 snps,tx-queues-to-use = <2>;
383 snps,weight = <0x10>;
385 snps,priority = <0x0>;
390 snps,send_slope = <0x1000>;
391 snps,idle_slope = <0x1000>;
392 snps,high_credit = <0x3E800>;
393 snps,low_credit = <0xFFC18000>;
394 snps,priority = <0x1>;
398 gmac0: ethernet@e0800000 {
399 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
400 reg = <0xe0800000 0x8000>;
401 interrupt-parent = <&vic1>;
402 interrupts = <24 23 22>;
403 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
404 mac-address = [000000000000]; /* Filled in by U-Boot */
405 max-frame-size = <3800>;
407 snps,multicast-filter-bins = <256>;
408 snps,perfect-filter-entries = <128>;
409 rx-fifo-depth = <16384>;
410 tx-fifo-depth = <16384>;
412 clock-names = "stmmaceth";
413 snps,axi-config = <&stmmac_axi_setup>;
414 snps,mtl-rx-config = <&mtl_rx_setup>;
415 snps,mtl-tx-config = <&mtl_tx_setup>;
417 #address-cells = <1>;
419 compatible = "snps,dwmac-mdio";
420 phy1: ethernet-phy@0 {
426 # FIXME: We should set it, but it would report all the generic
427 # properties as additional properties.
428 # additionalProperties: false