1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier AHCI PHY
10 This describes the deivcetree bindings for PHY interfaces built into
11 AHCI controller implemented on Socionext UniPhier SoCs.
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pxs2-ahci-phy
20 - socionext,uniphier-pxs3-ahci-phy
23 description: PHY register region (offset and length)
56 additionalProperties: false
61 compatible = "socionext,uniphier-pxs3-ahci-glue",
65 ranges = <0 0x65700000 0x100>;
68 compatible = "socionext,uniphier-pxs3-ahci-phy";
71 clock-names = "link", "phy";
72 clocks = <&sys_clk 28>, <&sys_clk 30>;
73 reset-names = "link", "phy";
74 resets = <&sys_rst 28>, <&sys_rst 30>;