1 Broadcom Northstar pins mux controller
3 Some of Northstar SoCs's pins can be used for various purposes thanks to the mux
4 controller. This binding allows describing mux controller and listing available
5 functions. They can be referenced later by other bindings to let system
6 configure controller correctly.
8 A list of pins varies across chipsets so few bindings are available.
10 Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
14 - compatible: must be one of:
17 "brcm,bcm53012-pinmux"
18 - offset: offset of pin registers in the CRU block
20 Functions and their groups available for all chipsets:
23 - "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp"
24 - "uart1": "uart1_grp"
26 Additionally available on BCM4709 and BCM53012:
28 - "uart2": "uart2_grp"
29 - "sdio": "sdio_pwr_grp", "sdio_1p8v_grp"
31 For documentation of subnodes see:
32 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
36 compatible = "simple-bus";
37 ranges = <0 0x1800c000 0x1000>;
42 compatible = "syscon", "simple-mfd";
46 compatible = "brcm,bcm4708-pinmux";