1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
34 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
35 if the device is on an spmi bus or an ssbi bus respectively
39 Value type: <prop-encoded-array>
40 Definition: Register base of the GPIO block and length.
44 Value type: <prop-encoded-array>
45 Definition: Must contain an array of encoded interrupt specifiers for
51 Definition: Mark the device node as a GPIO controller
56 Definition: Must be 2;
57 the first cell will be used to define gpio number and the
58 second denotes the flags for this gpio
60 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
61 a general description of GPIO and interrupt bindings.
63 Please refer to pinctrl-bindings.txt in this directory for details of the
64 common pinctrl bindings used by client devices, including the meaning of the
65 phrase "pin configuration node".
67 The pin configuration nodes act as a container for an arbitrary number of
68 subnodes. Each of these subnodes represents some desired configuration for a
69 pin or a list of pins. This configuration can include the
70 mux function to select on those pin(s), and various pin configuration
71 parameters, as listed below.
76 The name of each subnode is not important; all subnodes should be enumerated
77 and processed purely based on their content.
79 Each subnode only affects those parameters that are explicitly listed. In
80 other words, a subnode that lists a mux function but no pin configuration
81 parameters implies no information about any pin configuration parameters.
82 Similarly, a pin subnode that describes a pullup parameter implies no
83 information about e.g. the mux function.
85 The following generic properties as defined in pinctrl-bindings.txt are valid
86 to specify in a pin configuration subnode:
90 Value type: <string-array>
91 Definition: List of gpio pins affected by the properties specified in
92 this subnode. Valid pins are:
93 gpio1-gpio4 for pm8005
94 gpio1-gpio6 for pm8018
95 gpio1-gpio12 for pm8038
96 gpio1-gpio40 for pm8058
97 gpio1-gpio4 for pm8916
98 gpio1-gpio38 for pm8917
99 gpio1-gpio44 for pm8921
100 gpio1-gpio36 for pm8941
101 gpio1-gpio8 for pm8950 (hole on gpio3)
102 gpio1-gpio22 for pm8994
103 gpio1-gpio26 for pm8998
104 gpio1-gpio22 for pma8084
105 gpio1-gpio2 for pmi8950
106 gpio1-gpio10 for pmi8994
107 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
108 gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
110 gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
111 gpio1-gpio12 for pm8150l (hole on gpio7)
112 gpio1-gpio10 for pm6150
113 gpio1-gpio12 for pm6150l
114 gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
120 Definition: Specify the alternative function to be configured for the
121 specified pins. Valid values are:
130 And following values are supported by LV/MV GPIO subtypes:
137 Definition: The specified pins should be configured as no pull.
142 Definition: The specified pins should be configured as pull down.
147 Definition: The specified pins should be configured as pull up.
149 - qcom,pull-up-strength:
152 Definition: Specifies the strength to use for pull up, if selected.
153 Valid values are; as defined in
154 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
155 1: 30uA (PMIC_GPIO_PULL_UP_30)
156 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
157 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
158 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
159 If this property is omitted 30uA strength will be used if
162 - bias-high-impedance:
165 Definition: The specified pins will put in high-Z mode and disabled.
170 Definition: The specified pins are put in input mode.
175 Definition: The specified pins are configured in output mode, driven
181 Definition: The specified pins are configured in output mode, driven
187 Definition: Selects the power source for the specified pins. Valid
188 power sources are defined per chip in
189 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
191 - qcom,drive-strength:
194 Definition: Selects the drive strength for the specified pins. Value
196 0: no (PMIC_GPIO_STRENGTH_NO)
197 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
198 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
199 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
200 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
205 Definition: The specified pins are configured in push-pull mode.
210 Definition: The specified pins are configured in open-drain mode.
215 Definition: The specified pins are configured in open-source mode.
220 Definition: The specified pins are configured in analog-pass-through mode.
225 Definition: Selects ATEST rail to route to GPIO when it's configured
226 in analog-pass-through mode.
227 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
232 Definition: Selects DTEST rail to route to GPIO when it's configured
234 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
238 pm8921_gpio: gpio@150 {
239 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
241 interrupts = <192 1>, <193 1>, <194 1>,
242 <195 1>, <196 1>, <197 1>,
243 <198 1>, <199 1>, <200 1>,
244 <201 1>, <202 1>, <203 1>,
245 <204 1>, <205 1>, <206 1>,
246 <207 1>, <208 1>, <209 1>,
247 <210 1>, <211 1>, <212 1>,
248 <213 1>, <214 1>, <215 1>,
249 <216 1>, <217 1>, <218 1>,
250 <219 1>, <220 1>, <221 1>,
251 <222 1>, <223 1>, <224 1>,
252 <225 1>, <226 1>, <227 1>,
253 <228 1>, <229 1>, <230 1>,
254 <231 1>, <232 1>, <233 1>,
260 pm8921_gpio_keys: gpio-keys {
262 pins = "gpio20", "gpio21";
268 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
269 power-source = <PM8921_GPIO_S4>;