1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A2 combined Pin and GPIO controller
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
17 Each port features up to 8 pins, each of them configurable for GPIO function
18 (port mode) or in alternate function mode.
19 Up to 8 different alternate function modes exist for each single pin.
23 const: "renesas,r7s9210-pinctrl" # RZ/A2M
33 The first cell contains the global GPIO port index, constructed using the
34 RZA2_PIN() helper macro in r7s9210-pinctrl.h.
35 E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
46 - $ref: pincfg-node.yaml#
47 - $ref: pinmux-node.yaml#
49 The child nodes of the pin controller designate pins to be used for
50 specific peripheral functions or as GPIO.
52 A pin multiplexing sub-node describes how to configure a set of
53 (or a single) pin in some desired alternate function mode.
54 The values for the pinmux properties are a combination of port name,
55 pin number and the desired function index. Use the RZA2_PINMUX macro
56 located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
58 For assigning GPIO pins, use the macro RZA2_PIN also in
59 to express the desired port pin.
66 Values are constructed from GPIO port number, pin number, and
67 alternate function configuration number using the RZA2_PINMUX()
68 helper macro in r7s9210-pinctrl.h.
73 additionalProperties: false
82 additionalProperties: false
86 #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
87 pinctrl: pinctrl@fcffe000 {
88 compatible = "renesas,r7s9210-pinctrl";
89 reg = <0xfcffe000 0x1000>;
93 gpio-ranges = <&pinctrl 0 0 176>;
97 pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
98 <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */