1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Real Time Clock Bindings
10 - Gabriel Fernandez <gabriel.fernandez@st.com>
35 $ref: "/schemas/types.yaml#/definitions/phandle-array"
40 Phandle/offset/mask triplet. The phandle to pwrcfg used to
41 access control register at offset, and change the dbp (Disable Backup
42 Protection) bit represented by the mask, mandatory to disable/enable backup
43 domain (RTC registers) write protection.
47 override default rtc_ck parent clock reference to the rtc_ck clock entry
50 assigned-clock-parents:
52 override default rtc_ck parent clock phandle of the new parent clock of rtc_ck
93 const: st,stm32mp1-rtc
101 assigned-clocks: false
102 assigned-clock-parents: false
113 additionalProperties: false
117 #include <dt-bindings/mfd/stm32f4-rcc.h>
118 #include <dt-bindings/clock/stm32fx-clock.h>
120 compatible = "st,stm32-rtc";
121 reg = <0x40002800 0x400>;
122 clocks = <&rcc 1 CLK_RTC>;
123 assigned-clocks = <&rcc 1 CLK_RTC>;
124 assigned-clock-parents = <&rcc 1 CLK_LSE>;
125 interrupt-parent = <&exti>;
127 st,syscfg = <&pwrcfg 0x00 0x100>;
130 #include <dt-bindings/interrupt-controller/arm-gic.h>
131 #include <dt-bindings/clock/stm32mp1-clks.h>
133 compatible = "st,stm32mp1-rtc";
134 reg = <0x5c004000 0x400>;
135 clocks = <&rcc RTCAPB>, <&rcc RTC>;
136 clock-names = "pclk", "rtc_ck";
137 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;