Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Freescale i.MX Watchdog Timer (WDT) Controller
   8
   9 maintainers:
  10   - Anson Huang <Anson.Huang@nxp.com>
  11
  12 allOf:
  13   - $ref: "watchdog.yaml#"
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - const: fsl,imx21-wdt
  19       - items:
  20           - enum:
  21               - fsl,imx25-wdt
  22               - fsl,imx27-wdt
  23               - fsl,imx31-wdt
  24               - fsl,imx35-wdt
  25               - fsl,imx50-wdt
  26               - fsl,imx51-wdt
  27               - fsl,imx53-wdt
  28               - fsl,imx6q-wdt
  29               - fsl,imx6sl-wdt
  30               - fsl,imx6sll-wdt
  31               - fsl,imx6sx-wdt
  32               - fsl,imx6ul-wdt
  33               - fsl,imx7d-wdt
  34               - fsl,imx8mm-wdt
  35               - fsl,imx8mn-wdt
  36               - fsl,imx8mp-wdt
  37               - fsl,imx8mq-wdt
  38               - fsl,ls1012a-wdt
  39               - fsl,ls1043a-wdt
  40               - fsl,vf610-wdt
  41           - const: fsl,imx21-wdt
  42
  43   reg:
  44     maxItems: 1
  45
  46   interrupts:
  47     maxItems: 1
  48
  49   clocks:
  50     maxItems: 1
  51
  52   fsl,ext-reset-output:
  53     $ref: /schemas/types.yaml#/definitions/flag
  54     description: |
  55       If present, the watchdog device is configured to assert its
  56       external reset (WDOG_B) instead of issuing a software reset.
  57
  58 required:
  59   - compatible
  60   - interrupts
  61   - reg
  62
  63 unevaluatedProperties: false
  64
  65 examples:
  66   - |
  67     #include <dt-bindings/interrupt-controller/arm-gic.h>
  68     #include <dt-bindings/clock/imx6qdl-clock.h>
  69
  70     watchdog@20bc000 {
  71         compatible = "fsl,imx21-wdt";
  72         reg = <0x020bc000 0x4000>;
  73         interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
  74         clocks = <&clks IMX6QDL_CLK_IPG>;
  75     };
  76
  77 ...