1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 ARM Ltd.
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
9 #include <linux/kvm_host.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/uaccess.h>
14 #include <clocksource/arm_arch_timer.h>
15 #include <asm/arch_timer.h>
16 #include <asm/kvm_emulate.h>
17 #include <asm/kvm_hyp.h>
19 #include <kvm/arm_vgic.h>
20 #include <kvm/arm_arch_timer.h>
24 static struct timecounter
*timecounter
;
25 static unsigned int host_vtimer_irq
;
26 static unsigned int host_ptimer_irq
;
27 static u32 host_vtimer_irq_flags
;
28 static u32 host_ptimer_irq_flags
;
30 static DEFINE_STATIC_KEY_FALSE(has_gic_active_state
);
32 static const struct kvm_irq_level default_ptimer_irq
= {
37 static const struct kvm_irq_level default_vtimer_irq
= {
42 static bool kvm_timer_irq_can_fire(struct arch_timer_context
*timer_ctx
);
43 static void kvm_timer_update_irq(struct kvm_vcpu
*vcpu
, bool new_level
,
44 struct arch_timer_context
*timer_ctx
);
45 static bool kvm_timer_should_fire(struct arch_timer_context
*timer_ctx
);
46 static void kvm_arm_timer_write(struct kvm_vcpu
*vcpu
,
47 struct arch_timer_context
*timer
,
48 enum kvm_arch_timer_regs treg
,
50 static u64
kvm_arm_timer_read(struct kvm_vcpu
*vcpu
,
51 struct arch_timer_context
*timer
,
52 enum kvm_arch_timer_regs treg
);
54 u32
timer_get_ctl(struct arch_timer_context
*ctxt
)
56 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
58 switch(arch_timer_ctx_index(ctxt
)) {
60 return __vcpu_sys_reg(vcpu
, CNTV_CTL_EL0
);
62 return __vcpu_sys_reg(vcpu
, CNTP_CTL_EL0
);
69 u64
timer_get_cval(struct arch_timer_context
*ctxt
)
71 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
73 switch(arch_timer_ctx_index(ctxt
)) {
75 return __vcpu_sys_reg(vcpu
, CNTV_CVAL_EL0
);
77 return __vcpu_sys_reg(vcpu
, CNTP_CVAL_EL0
);
84 static u64
timer_get_offset(struct arch_timer_context
*ctxt
)
86 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
88 switch(arch_timer_ctx_index(ctxt
)) {
90 return __vcpu_sys_reg(vcpu
, CNTVOFF_EL2
);
96 static void timer_set_ctl(struct arch_timer_context
*ctxt
, u32 ctl
)
98 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
100 switch(arch_timer_ctx_index(ctxt
)) {
102 __vcpu_sys_reg(vcpu
, CNTV_CTL_EL0
) = ctl
;
105 __vcpu_sys_reg(vcpu
, CNTP_CTL_EL0
) = ctl
;
112 static void timer_set_cval(struct arch_timer_context
*ctxt
, u64 cval
)
114 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
116 switch(arch_timer_ctx_index(ctxt
)) {
118 __vcpu_sys_reg(vcpu
, CNTV_CVAL_EL0
) = cval
;
121 __vcpu_sys_reg(vcpu
, CNTP_CVAL_EL0
) = cval
;
128 static void timer_set_offset(struct arch_timer_context
*ctxt
, u64 offset
)
130 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
132 switch(arch_timer_ctx_index(ctxt
)) {
134 __vcpu_sys_reg(vcpu
, CNTVOFF_EL2
) = offset
;
137 WARN(offset
, "timer %ld\n", arch_timer_ctx_index(ctxt
));
141 u64
kvm_phys_timer_read(void)
143 return timecounter
->cc
->read(timecounter
->cc
);
146 static void get_timer_map(struct kvm_vcpu
*vcpu
, struct timer_map
*map
)
149 map
->direct_vtimer
= vcpu_vtimer(vcpu
);
150 map
->direct_ptimer
= vcpu_ptimer(vcpu
);
151 map
->emul_ptimer
= NULL
;
153 map
->direct_vtimer
= vcpu_vtimer(vcpu
);
154 map
->direct_ptimer
= NULL
;
155 map
->emul_ptimer
= vcpu_ptimer(vcpu
);
158 trace_kvm_get_timer_map(vcpu
->vcpu_id
, map
);
161 static inline bool userspace_irqchip(struct kvm
*kvm
)
163 return static_branch_unlikely(&userspace_irqchip_in_use
) &&
164 unlikely(!irqchip_in_kernel(kvm
));
167 static void soft_timer_start(struct hrtimer
*hrt
, u64 ns
)
169 hrtimer_start(hrt
, ktime_add_ns(ktime_get(), ns
),
170 HRTIMER_MODE_ABS_HARD
);
173 static void soft_timer_cancel(struct hrtimer
*hrt
)
178 static irqreturn_t
kvm_arch_timer_handler(int irq
, void *dev_id
)
180 struct kvm_vcpu
*vcpu
= *(struct kvm_vcpu
**)dev_id
;
181 struct arch_timer_context
*ctx
;
182 struct timer_map map
;
185 * We may see a timer interrupt after vcpu_put() has been called which
186 * sets the CPU's vcpu pointer to NULL, because even though the timer
187 * has been disabled in timer_save_state(), the hardware interrupt
188 * signal may not have been retired from the interrupt controller yet.
193 get_timer_map(vcpu
, &map
);
195 if (irq
== host_vtimer_irq
)
196 ctx
= map
.direct_vtimer
;
198 ctx
= map
.direct_ptimer
;
200 if (kvm_timer_should_fire(ctx
))
201 kvm_timer_update_irq(vcpu
, true, ctx
);
203 if (userspace_irqchip(vcpu
->kvm
) &&
204 !static_branch_unlikely(&has_gic_active_state
))
205 disable_percpu_irq(host_vtimer_irq
);
210 static u64
kvm_timer_compute_delta(struct arch_timer_context
*timer_ctx
)
214 cval
= timer_get_cval(timer_ctx
);
215 now
= kvm_phys_timer_read() - timer_get_offset(timer_ctx
);
220 ns
= cyclecounter_cyc2ns(timecounter
->cc
,
230 static bool kvm_timer_irq_can_fire(struct arch_timer_context
*timer_ctx
)
232 WARN_ON(timer_ctx
&& timer_ctx
->loaded
);
234 ((timer_get_ctl(timer_ctx
) &
235 (ARCH_TIMER_CTRL_IT_MASK
| ARCH_TIMER_CTRL_ENABLE
)) == ARCH_TIMER_CTRL_ENABLE
);
239 * Returns the earliest expiration time in ns among guest timers.
240 * Note that it will return 0 if none of timers can fire.
242 static u64
kvm_timer_earliest_exp(struct kvm_vcpu
*vcpu
)
244 u64 min_delta
= ULLONG_MAX
;
247 for (i
= 0; i
< NR_KVM_TIMERS
; i
++) {
248 struct arch_timer_context
*ctx
= &vcpu
->arch
.timer_cpu
.timers
[i
];
250 WARN(ctx
->loaded
, "timer %d loaded\n", i
);
251 if (kvm_timer_irq_can_fire(ctx
))
252 min_delta
= min(min_delta
, kvm_timer_compute_delta(ctx
));
255 /* If none of timers can fire, then return 0 */
256 if (min_delta
== ULLONG_MAX
)
262 static enum hrtimer_restart
kvm_bg_timer_expire(struct hrtimer
*hrt
)
264 struct arch_timer_cpu
*timer
;
265 struct kvm_vcpu
*vcpu
;
268 timer
= container_of(hrt
, struct arch_timer_cpu
, bg_timer
);
269 vcpu
= container_of(timer
, struct kvm_vcpu
, arch
.timer_cpu
);
272 * Check that the timer has really expired from the guest's
273 * PoV (NTP on the host may have forced it to expire
274 * early). If we should have slept longer, restart it.
276 ns
= kvm_timer_earliest_exp(vcpu
);
278 hrtimer_forward_now(hrt
, ns_to_ktime(ns
));
279 return HRTIMER_RESTART
;
282 kvm_vcpu_wake_up(vcpu
);
283 return HRTIMER_NORESTART
;
286 static enum hrtimer_restart
kvm_hrtimer_expire(struct hrtimer
*hrt
)
288 struct arch_timer_context
*ctx
;
289 struct kvm_vcpu
*vcpu
;
292 ctx
= container_of(hrt
, struct arch_timer_context
, hrtimer
);
295 trace_kvm_timer_hrtimer_expire(ctx
);
298 * Check that the timer has really expired from the guest's
299 * PoV (NTP on the host may have forced it to expire
300 * early). If not ready, schedule for a later time.
302 ns
= kvm_timer_compute_delta(ctx
);
304 hrtimer_forward_now(hrt
, ns_to_ktime(ns
));
305 return HRTIMER_RESTART
;
308 kvm_timer_update_irq(vcpu
, true, ctx
);
309 return HRTIMER_NORESTART
;
312 static bool kvm_timer_should_fire(struct arch_timer_context
*timer_ctx
)
314 enum kvm_arch_timers index
;
320 index
= arch_timer_ctx_index(timer_ctx
);
322 if (timer_ctx
->loaded
) {
327 cnt_ctl
= read_sysreg_el0(SYS_CNTV_CTL
);
330 cnt_ctl
= read_sysreg_el0(SYS_CNTP_CTL
);
333 /* GCC is braindead */
338 return (cnt_ctl
& ARCH_TIMER_CTRL_ENABLE
) &&
339 (cnt_ctl
& ARCH_TIMER_CTRL_IT_STAT
) &&
340 !(cnt_ctl
& ARCH_TIMER_CTRL_IT_MASK
);
343 if (!kvm_timer_irq_can_fire(timer_ctx
))
346 cval
= timer_get_cval(timer_ctx
);
347 now
= kvm_phys_timer_read() - timer_get_offset(timer_ctx
);
352 bool kvm_timer_is_pending(struct kvm_vcpu
*vcpu
)
354 struct timer_map map
;
356 get_timer_map(vcpu
, &map
);
358 return kvm_timer_should_fire(map
.direct_vtimer
) ||
359 kvm_timer_should_fire(map
.direct_ptimer
) ||
360 kvm_timer_should_fire(map
.emul_ptimer
);
364 * Reflect the timer output level into the kvm_run structure
366 void kvm_timer_update_run(struct kvm_vcpu
*vcpu
)
368 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
369 struct arch_timer_context
*ptimer
= vcpu_ptimer(vcpu
);
370 struct kvm_sync_regs
*regs
= &vcpu
->run
->s
.regs
;
372 /* Populate the device bitmap with the timer states */
373 regs
->device_irq_level
&= ~(KVM_ARM_DEV_EL1_VTIMER
|
374 KVM_ARM_DEV_EL1_PTIMER
);
375 if (kvm_timer_should_fire(vtimer
))
376 regs
->device_irq_level
|= KVM_ARM_DEV_EL1_VTIMER
;
377 if (kvm_timer_should_fire(ptimer
))
378 regs
->device_irq_level
|= KVM_ARM_DEV_EL1_PTIMER
;
381 static void kvm_timer_update_irq(struct kvm_vcpu
*vcpu
, bool new_level
,
382 struct arch_timer_context
*timer_ctx
)
386 timer_ctx
->irq
.level
= new_level
;
387 trace_kvm_timer_update_irq(vcpu
->vcpu_id
, timer_ctx
->irq
.irq
,
388 timer_ctx
->irq
.level
);
390 if (!userspace_irqchip(vcpu
->kvm
)) {
391 ret
= kvm_vgic_inject_irq(vcpu
->kvm
, vcpu
->vcpu_id
,
393 timer_ctx
->irq
.level
,
399 /* Only called for a fully emulated timer */
400 static void timer_emulate(struct arch_timer_context
*ctx
)
402 bool should_fire
= kvm_timer_should_fire(ctx
);
404 trace_kvm_timer_emulate(ctx
, should_fire
);
406 if (should_fire
!= ctx
->irq
.level
) {
407 kvm_timer_update_irq(ctx
->vcpu
, should_fire
, ctx
);
412 * If the timer can fire now, we don't need to have a soft timer
413 * scheduled for the future. If the timer cannot fire at all,
414 * then we also don't need a soft timer.
416 if (!kvm_timer_irq_can_fire(ctx
)) {
417 soft_timer_cancel(&ctx
->hrtimer
);
421 soft_timer_start(&ctx
->hrtimer
, kvm_timer_compute_delta(ctx
));
424 static void timer_save_state(struct arch_timer_context
*ctx
)
426 struct arch_timer_cpu
*timer
= vcpu_timer(ctx
->vcpu
);
427 enum kvm_arch_timers index
= arch_timer_ctx_index(ctx
);
433 local_irq_save(flags
);
440 timer_set_ctl(ctx
, read_sysreg_el0(SYS_CNTV_CTL
));
441 timer_set_cval(ctx
, read_sysreg_el0(SYS_CNTV_CVAL
));
443 /* Disable the timer */
444 write_sysreg_el0(0, SYS_CNTV_CTL
);
449 timer_set_ctl(ctx
, read_sysreg_el0(SYS_CNTP_CTL
));
450 timer_set_cval(ctx
, read_sysreg_el0(SYS_CNTP_CVAL
));
452 /* Disable the timer */
453 write_sysreg_el0(0, SYS_CNTP_CTL
);
461 trace_kvm_timer_save_state(ctx
);
465 local_irq_restore(flags
);
469 * Schedule the background timer before calling kvm_vcpu_block, so that this
470 * thread is removed from its waitqueue and made runnable when there's a timer
471 * interrupt to handle.
473 static void kvm_timer_blocking(struct kvm_vcpu
*vcpu
)
475 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
476 struct timer_map map
;
478 get_timer_map(vcpu
, &map
);
481 * If no timers are capable of raising interrupts (disabled or
482 * masked), then there's no more work for us to do.
484 if (!kvm_timer_irq_can_fire(map
.direct_vtimer
) &&
485 !kvm_timer_irq_can_fire(map
.direct_ptimer
) &&
486 !kvm_timer_irq_can_fire(map
.emul_ptimer
))
490 * At least one guest time will expire. Schedule a background timer.
491 * Set the earliest expiration time among the guest timers.
493 soft_timer_start(&timer
->bg_timer
, kvm_timer_earliest_exp(vcpu
));
496 static void kvm_timer_unblocking(struct kvm_vcpu
*vcpu
)
498 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
500 soft_timer_cancel(&timer
->bg_timer
);
503 static void timer_restore_state(struct arch_timer_context
*ctx
)
505 struct arch_timer_cpu
*timer
= vcpu_timer(ctx
->vcpu
);
506 enum kvm_arch_timers index
= arch_timer_ctx_index(ctx
);
512 local_irq_save(flags
);
519 write_sysreg_el0(timer_get_cval(ctx
), SYS_CNTV_CVAL
);
521 write_sysreg_el0(timer_get_ctl(ctx
), SYS_CNTV_CTL
);
524 write_sysreg_el0(timer_get_cval(ctx
), SYS_CNTP_CVAL
);
526 write_sysreg_el0(timer_get_ctl(ctx
), SYS_CNTP_CTL
);
532 trace_kvm_timer_restore_state(ctx
);
536 local_irq_restore(flags
);
539 static void set_cntvoff(u64 cntvoff
)
541 kvm_call_hyp(__kvm_timer_set_cntvoff
, cntvoff
);
544 static inline void set_timer_irq_phys_active(struct arch_timer_context
*ctx
, bool active
)
547 r
= irq_set_irqchip_state(ctx
->host_timer_irq
, IRQCHIP_STATE_ACTIVE
, active
);
551 static void kvm_timer_vcpu_load_gic(struct arch_timer_context
*ctx
)
553 struct kvm_vcpu
*vcpu
= ctx
->vcpu
;
554 bool phys_active
= false;
557 * Update the timer output so that it is likely to match the
558 * state we're about to restore. If the timer expires between
559 * this point and the register restoration, we'll take the
562 kvm_timer_update_irq(ctx
->vcpu
, kvm_timer_should_fire(ctx
), ctx
);
564 if (irqchip_in_kernel(vcpu
->kvm
))
565 phys_active
= kvm_vgic_map_is_active(vcpu
, ctx
->irq
.irq
);
567 phys_active
|= ctx
->irq
.level
;
569 set_timer_irq_phys_active(ctx
, phys_active
);
572 static void kvm_timer_vcpu_load_nogic(struct kvm_vcpu
*vcpu
)
574 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
577 * Update the timer output so that it is likely to match the
578 * state we're about to restore. If the timer expires between
579 * this point and the register restoration, we'll take the
582 kvm_timer_update_irq(vcpu
, kvm_timer_should_fire(vtimer
), vtimer
);
585 * When using a userspace irqchip with the architected timers and a
586 * host interrupt controller that doesn't support an active state, we
587 * must still prevent continuously exiting from the guest, and
588 * therefore mask the physical interrupt by disabling it on the host
589 * interrupt controller when the virtual level is high, such that the
590 * guest can make forward progress. Once we detect the output level
591 * being de-asserted, we unmask the interrupt again so that we exit
592 * from the guest when the timer fires.
594 if (vtimer
->irq
.level
)
595 disable_percpu_irq(host_vtimer_irq
);
597 enable_percpu_irq(host_vtimer_irq
, host_vtimer_irq_flags
);
600 void kvm_timer_vcpu_load(struct kvm_vcpu
*vcpu
)
602 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
603 struct timer_map map
;
605 if (unlikely(!timer
->enabled
))
608 get_timer_map(vcpu
, &map
);
610 if (static_branch_likely(&has_gic_active_state
)) {
611 kvm_timer_vcpu_load_gic(map
.direct_vtimer
);
612 if (map
.direct_ptimer
)
613 kvm_timer_vcpu_load_gic(map
.direct_ptimer
);
615 kvm_timer_vcpu_load_nogic(vcpu
);
618 set_cntvoff(timer_get_offset(map
.direct_vtimer
));
620 kvm_timer_unblocking(vcpu
);
622 timer_restore_state(map
.direct_vtimer
);
623 if (map
.direct_ptimer
)
624 timer_restore_state(map
.direct_ptimer
);
627 timer_emulate(map
.emul_ptimer
);
630 bool kvm_timer_should_notify_user(struct kvm_vcpu
*vcpu
)
632 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
633 struct arch_timer_context
*ptimer
= vcpu_ptimer(vcpu
);
634 struct kvm_sync_regs
*sregs
= &vcpu
->run
->s
.regs
;
637 if (likely(irqchip_in_kernel(vcpu
->kvm
)))
640 vlevel
= sregs
->device_irq_level
& KVM_ARM_DEV_EL1_VTIMER
;
641 plevel
= sregs
->device_irq_level
& KVM_ARM_DEV_EL1_PTIMER
;
643 return kvm_timer_should_fire(vtimer
) != vlevel
||
644 kvm_timer_should_fire(ptimer
) != plevel
;
647 void kvm_timer_vcpu_put(struct kvm_vcpu
*vcpu
)
649 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
650 struct timer_map map
;
651 struct rcuwait
*wait
= kvm_arch_vcpu_get_wait(vcpu
);
653 if (unlikely(!timer
->enabled
))
656 get_timer_map(vcpu
, &map
);
658 timer_save_state(map
.direct_vtimer
);
659 if (map
.direct_ptimer
)
660 timer_save_state(map
.direct_ptimer
);
663 * Cancel soft timer emulation, because the only case where we
664 * need it after a vcpu_put is in the context of a sleeping VCPU, and
665 * in that case we already factor in the deadline for the physical
666 * timer when scheduling the bg_timer.
668 * In any case, we re-schedule the hrtimer for the physical timer when
669 * coming back to the VCPU thread in kvm_timer_vcpu_load().
672 soft_timer_cancel(&map
.emul_ptimer
->hrtimer
);
674 if (rcuwait_active(wait
))
675 kvm_timer_blocking(vcpu
);
678 * The kernel may decide to run userspace after calling vcpu_put, so
679 * we reset cntvoff to 0 to ensure a consistent read between user
680 * accesses to the virtual counter and kernel access to the physical
681 * counter of non-VHE case. For VHE, the virtual counter uses a fixed
682 * virtual offset of zero, so no need to zero CNTVOFF_EL2 register.
688 * With a userspace irqchip we have to check if the guest de-asserted the
689 * timer and if so, unmask the timer irq signal on the host interrupt
690 * controller to ensure that we see future timer signals.
692 static void unmask_vtimer_irq_user(struct kvm_vcpu
*vcpu
)
694 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
696 if (!kvm_timer_should_fire(vtimer
)) {
697 kvm_timer_update_irq(vcpu
, false, vtimer
);
698 if (static_branch_likely(&has_gic_active_state
))
699 set_timer_irq_phys_active(vtimer
, false);
701 enable_percpu_irq(host_vtimer_irq
, host_vtimer_irq_flags
);
705 void kvm_timer_sync_user(struct kvm_vcpu
*vcpu
)
707 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
709 if (unlikely(!timer
->enabled
))
712 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
)))
713 unmask_vtimer_irq_user(vcpu
);
716 int kvm_timer_vcpu_reset(struct kvm_vcpu
*vcpu
)
718 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
719 struct timer_map map
;
721 get_timer_map(vcpu
, &map
);
724 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
725 * and to 0 for ARMv7. We provide an implementation that always
726 * resets the timer to be disabled and unmasked and is compliant with
727 * the ARMv7 architecture.
729 timer_set_ctl(vcpu_vtimer(vcpu
), 0);
730 timer_set_ctl(vcpu_ptimer(vcpu
), 0);
732 if (timer
->enabled
) {
733 kvm_timer_update_irq(vcpu
, false, vcpu_vtimer(vcpu
));
734 kvm_timer_update_irq(vcpu
, false, vcpu_ptimer(vcpu
));
736 if (irqchip_in_kernel(vcpu
->kvm
)) {
737 kvm_vgic_reset_mapped_irq(vcpu
, map
.direct_vtimer
->irq
.irq
);
738 if (map
.direct_ptimer
)
739 kvm_vgic_reset_mapped_irq(vcpu
, map
.direct_ptimer
->irq
.irq
);
744 soft_timer_cancel(&map
.emul_ptimer
->hrtimer
);
749 /* Make the updates of cntvoff for all vtimer contexts atomic */
750 static void update_vtimer_cntvoff(struct kvm_vcpu
*vcpu
, u64 cntvoff
)
753 struct kvm
*kvm
= vcpu
->kvm
;
754 struct kvm_vcpu
*tmp
;
756 mutex_lock(&kvm
->lock
);
757 kvm_for_each_vcpu(i
, tmp
, kvm
)
758 timer_set_offset(vcpu_vtimer(tmp
), cntvoff
);
761 * When called from the vcpu create path, the CPU being created is not
762 * included in the loop above, so we just set it here as well.
764 timer_set_offset(vcpu_vtimer(vcpu
), cntvoff
);
765 mutex_unlock(&kvm
->lock
);
768 void kvm_timer_vcpu_init(struct kvm_vcpu
*vcpu
)
770 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
771 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
772 struct arch_timer_context
*ptimer
= vcpu_ptimer(vcpu
);
777 /* Synchronize cntvoff across all vtimers of a VM. */
778 update_vtimer_cntvoff(vcpu
, kvm_phys_timer_read());
779 timer_set_offset(ptimer
, 0);
781 hrtimer_init(&timer
->bg_timer
, CLOCK_MONOTONIC
, HRTIMER_MODE_ABS_HARD
);
782 timer
->bg_timer
.function
= kvm_bg_timer_expire
;
784 hrtimer_init(&vtimer
->hrtimer
, CLOCK_MONOTONIC
, HRTIMER_MODE_ABS_HARD
);
785 hrtimer_init(&ptimer
->hrtimer
, CLOCK_MONOTONIC
, HRTIMER_MODE_ABS_HARD
);
786 vtimer
->hrtimer
.function
= kvm_hrtimer_expire
;
787 ptimer
->hrtimer
.function
= kvm_hrtimer_expire
;
789 vtimer
->irq
.irq
= default_vtimer_irq
.irq
;
790 ptimer
->irq
.irq
= default_ptimer_irq
.irq
;
792 vtimer
->host_timer_irq
= host_vtimer_irq
;
793 ptimer
->host_timer_irq
= host_ptimer_irq
;
795 vtimer
->host_timer_irq_flags
= host_vtimer_irq_flags
;
796 ptimer
->host_timer_irq_flags
= host_ptimer_irq_flags
;
799 static void kvm_timer_init_interrupt(void *info
)
801 enable_percpu_irq(host_vtimer_irq
, host_vtimer_irq_flags
);
802 enable_percpu_irq(host_ptimer_irq
, host_ptimer_irq_flags
);
805 int kvm_arm_timer_set_reg(struct kvm_vcpu
*vcpu
, u64 regid
, u64 value
)
807 struct arch_timer_context
*timer
;
810 case KVM_REG_ARM_TIMER_CTL
:
811 timer
= vcpu_vtimer(vcpu
);
812 kvm_arm_timer_write(vcpu
, timer
, TIMER_REG_CTL
, value
);
814 case KVM_REG_ARM_TIMER_CNT
:
815 timer
= vcpu_vtimer(vcpu
);
816 update_vtimer_cntvoff(vcpu
, kvm_phys_timer_read() - value
);
818 case KVM_REG_ARM_TIMER_CVAL
:
819 timer
= vcpu_vtimer(vcpu
);
820 kvm_arm_timer_write(vcpu
, timer
, TIMER_REG_CVAL
, value
);
822 case KVM_REG_ARM_PTIMER_CTL
:
823 timer
= vcpu_ptimer(vcpu
);
824 kvm_arm_timer_write(vcpu
, timer
, TIMER_REG_CTL
, value
);
826 case KVM_REG_ARM_PTIMER_CVAL
:
827 timer
= vcpu_ptimer(vcpu
);
828 kvm_arm_timer_write(vcpu
, timer
, TIMER_REG_CVAL
, value
);
838 static u64
read_timer_ctl(struct arch_timer_context
*timer
)
841 * Set ISTATUS bit if it's expired.
842 * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
843 * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
844 * regardless of ENABLE bit for our implementation convenience.
846 u32 ctl
= timer_get_ctl(timer
);
848 if (!kvm_timer_compute_delta(timer
))
849 ctl
|= ARCH_TIMER_CTRL_IT_STAT
;
854 u64
kvm_arm_timer_get_reg(struct kvm_vcpu
*vcpu
, u64 regid
)
857 case KVM_REG_ARM_TIMER_CTL
:
858 return kvm_arm_timer_read(vcpu
,
859 vcpu_vtimer(vcpu
), TIMER_REG_CTL
);
860 case KVM_REG_ARM_TIMER_CNT
:
861 return kvm_arm_timer_read(vcpu
,
862 vcpu_vtimer(vcpu
), TIMER_REG_CNT
);
863 case KVM_REG_ARM_TIMER_CVAL
:
864 return kvm_arm_timer_read(vcpu
,
865 vcpu_vtimer(vcpu
), TIMER_REG_CVAL
);
866 case KVM_REG_ARM_PTIMER_CTL
:
867 return kvm_arm_timer_read(vcpu
,
868 vcpu_ptimer(vcpu
), TIMER_REG_CTL
);
869 case KVM_REG_ARM_PTIMER_CNT
:
870 return kvm_arm_timer_read(vcpu
,
871 vcpu_ptimer(vcpu
), TIMER_REG_CNT
);
872 case KVM_REG_ARM_PTIMER_CVAL
:
873 return kvm_arm_timer_read(vcpu
,
874 vcpu_ptimer(vcpu
), TIMER_REG_CVAL
);
879 static u64
kvm_arm_timer_read(struct kvm_vcpu
*vcpu
,
880 struct arch_timer_context
*timer
,
881 enum kvm_arch_timer_regs treg
)
887 val
= timer_get_cval(timer
) - kvm_phys_timer_read() + timer_get_offset(timer
);
888 val
= lower_32_bits(val
);
892 val
= read_timer_ctl(timer
);
896 val
= timer_get_cval(timer
);
900 val
= kvm_phys_timer_read() - timer_get_offset(timer
);
910 u64
kvm_arm_timer_read_sysreg(struct kvm_vcpu
*vcpu
,
911 enum kvm_arch_timers tmr
,
912 enum kvm_arch_timer_regs treg
)
917 kvm_timer_vcpu_put(vcpu
);
919 val
= kvm_arm_timer_read(vcpu
, vcpu_get_timer(vcpu
, tmr
), treg
);
921 kvm_timer_vcpu_load(vcpu
);
927 static void kvm_arm_timer_write(struct kvm_vcpu
*vcpu
,
928 struct arch_timer_context
*timer
,
929 enum kvm_arch_timer_regs treg
,
934 timer_set_cval(timer
, kvm_phys_timer_read() - timer_get_offset(timer
) + (s32
)val
);
938 timer_set_ctl(timer
, val
& ~ARCH_TIMER_CTRL_IT_STAT
);
942 timer_set_cval(timer
, val
);
950 void kvm_arm_timer_write_sysreg(struct kvm_vcpu
*vcpu
,
951 enum kvm_arch_timers tmr
,
952 enum kvm_arch_timer_regs treg
,
956 kvm_timer_vcpu_put(vcpu
);
958 kvm_arm_timer_write(vcpu
, vcpu_get_timer(vcpu
, tmr
), treg
, val
);
960 kvm_timer_vcpu_load(vcpu
);
964 static int kvm_timer_starting_cpu(unsigned int cpu
)
966 kvm_timer_init_interrupt(NULL
);
970 static int kvm_timer_dying_cpu(unsigned int cpu
)
972 disable_percpu_irq(host_vtimer_irq
);
976 int kvm_timer_hyp_init(bool has_gic
)
978 struct arch_timer_kvm_info
*info
;
981 info
= arch_timer_get_kvm_info();
982 timecounter
= &info
->timecounter
;
984 if (!timecounter
->cc
) {
985 kvm_err("kvm_arch_timer: uninitialized timecounter\n");
989 /* First, do the virtual EL1 timer irq */
991 if (info
->virtual_irq
<= 0) {
992 kvm_err("kvm_arch_timer: invalid virtual timer IRQ: %d\n",
996 host_vtimer_irq
= info
->virtual_irq
;
998 host_vtimer_irq_flags
= irq_get_trigger_type(host_vtimer_irq
);
999 if (host_vtimer_irq_flags
!= IRQF_TRIGGER_HIGH
&&
1000 host_vtimer_irq_flags
!= IRQF_TRIGGER_LOW
) {
1001 kvm_err("Invalid trigger for vtimer IRQ%d, assuming level low\n",
1003 host_vtimer_irq_flags
= IRQF_TRIGGER_LOW
;
1006 err
= request_percpu_irq(host_vtimer_irq
, kvm_arch_timer_handler
,
1007 "kvm guest vtimer", kvm_get_running_vcpus());
1009 kvm_err("kvm_arch_timer: can't request vtimer interrupt %d (%d)\n",
1010 host_vtimer_irq
, err
);
1015 err
= irq_set_vcpu_affinity(host_vtimer_irq
,
1016 kvm_get_running_vcpus());
1018 kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
1022 static_branch_enable(&has_gic_active_state
);
1025 kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq
);
1027 /* Now let's do the physical EL1 timer irq */
1029 if (info
->physical_irq
> 0) {
1030 host_ptimer_irq
= info
->physical_irq
;
1031 host_ptimer_irq_flags
= irq_get_trigger_type(host_ptimer_irq
);
1032 if (host_ptimer_irq_flags
!= IRQF_TRIGGER_HIGH
&&
1033 host_ptimer_irq_flags
!= IRQF_TRIGGER_LOW
) {
1034 kvm_err("Invalid trigger for ptimer IRQ%d, assuming level low\n",
1036 host_ptimer_irq_flags
= IRQF_TRIGGER_LOW
;
1039 err
= request_percpu_irq(host_ptimer_irq
, kvm_arch_timer_handler
,
1040 "kvm guest ptimer", kvm_get_running_vcpus());
1042 kvm_err("kvm_arch_timer: can't request ptimer interrupt %d (%d)\n",
1043 host_ptimer_irq
, err
);
1048 err
= irq_set_vcpu_affinity(host_ptimer_irq
,
1049 kvm_get_running_vcpus());
1051 kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
1056 kvm_debug("physical timer IRQ%d\n", host_ptimer_irq
);
1057 } else if (has_vhe()) {
1058 kvm_err("kvm_arch_timer: invalid physical timer IRQ: %d\n",
1059 info
->physical_irq
);
1064 cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING
,
1065 "kvm/arm/timer:starting", kvm_timer_starting_cpu
,
1066 kvm_timer_dying_cpu
);
1069 free_percpu_irq(host_vtimer_irq
, kvm_get_running_vcpus());
1073 void kvm_timer_vcpu_terminate(struct kvm_vcpu
*vcpu
)
1075 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
1077 soft_timer_cancel(&timer
->bg_timer
);
1080 static bool timer_irqs_are_valid(struct kvm_vcpu
*vcpu
)
1082 int vtimer_irq
, ptimer_irq
;
1085 vtimer_irq
= vcpu_vtimer(vcpu
)->irq
.irq
;
1086 ret
= kvm_vgic_set_owner(vcpu
, vtimer_irq
, vcpu_vtimer(vcpu
));
1090 ptimer_irq
= vcpu_ptimer(vcpu
)->irq
.irq
;
1091 ret
= kvm_vgic_set_owner(vcpu
, ptimer_irq
, vcpu_ptimer(vcpu
));
1095 kvm_for_each_vcpu(i
, vcpu
, vcpu
->kvm
) {
1096 if (vcpu_vtimer(vcpu
)->irq
.irq
!= vtimer_irq
||
1097 vcpu_ptimer(vcpu
)->irq
.irq
!= ptimer_irq
)
1104 bool kvm_arch_timer_get_input_level(int vintid
)
1106 struct kvm_vcpu
*vcpu
= kvm_get_running_vcpu();
1107 struct arch_timer_context
*timer
;
1109 if (vintid
== vcpu_vtimer(vcpu
)->irq
.irq
)
1110 timer
= vcpu_vtimer(vcpu
);
1111 else if (vintid
== vcpu_ptimer(vcpu
)->irq
.irq
)
1112 timer
= vcpu_ptimer(vcpu
);
1116 return kvm_timer_should_fire(timer
);
1119 int kvm_timer_enable(struct kvm_vcpu
*vcpu
)
1121 struct arch_timer_cpu
*timer
= vcpu_timer(vcpu
);
1122 struct timer_map map
;
1128 /* Without a VGIC we do not map virtual IRQs to physical IRQs */
1129 if (!irqchip_in_kernel(vcpu
->kvm
))
1133 * At this stage, we have the guarantee that the vgic is both
1134 * available and initialized.
1136 if (!timer_irqs_are_valid(vcpu
)) {
1137 kvm_debug("incorrectly configured timer irqs\n");
1141 get_timer_map(vcpu
, &map
);
1143 ret
= kvm_vgic_map_phys_irq(vcpu
,
1144 map
.direct_vtimer
->host_timer_irq
,
1145 map
.direct_vtimer
->irq
.irq
,
1146 kvm_arch_timer_get_input_level
);
1150 if (map
.direct_ptimer
) {
1151 ret
= kvm_vgic_map_phys_irq(vcpu
,
1152 map
.direct_ptimer
->host_timer_irq
,
1153 map
.direct_ptimer
->irq
.irq
,
1154 kvm_arch_timer_get_input_level
);
1166 * On VHE system, we only need to configure the EL2 timer trap register once,
1167 * not for every world switch.
1168 * The host kernel runs at EL2 with HCR_EL2.TGE == 1,
1169 * and this makes those bits have no effect for the host kernel execution.
1171 void kvm_timer_init_vhe(void)
1173 /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */
1174 u32 cnthctl_shift
= 10;
1178 * VHE systems allow the guest direct access to the EL1 physical
1181 val
= read_sysreg(cnthctl_el2
);
1182 val
|= (CNTHCTL_EL1PCEN
<< cnthctl_shift
);
1183 val
|= (CNTHCTL_EL1PCTEN
<< cnthctl_shift
);
1184 write_sysreg(val
, cnthctl_el2
);
1187 static void set_timer_irqs(struct kvm
*kvm
, int vtimer_irq
, int ptimer_irq
)
1189 struct kvm_vcpu
*vcpu
;
1192 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1193 vcpu_vtimer(vcpu
)->irq
.irq
= vtimer_irq
;
1194 vcpu_ptimer(vcpu
)->irq
.irq
= ptimer_irq
;
1198 int kvm_arm_timer_set_attr(struct kvm_vcpu
*vcpu
, struct kvm_device_attr
*attr
)
1200 int __user
*uaddr
= (int __user
*)(long)attr
->addr
;
1201 struct arch_timer_context
*vtimer
= vcpu_vtimer(vcpu
);
1202 struct arch_timer_context
*ptimer
= vcpu_ptimer(vcpu
);
1205 if (!irqchip_in_kernel(vcpu
->kvm
))
1208 if (get_user(irq
, uaddr
))
1211 if (!(irq_is_ppi(irq
)))
1214 if (vcpu
->arch
.timer_cpu
.enabled
)
1217 switch (attr
->attr
) {
1218 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER
:
1219 set_timer_irqs(vcpu
->kvm
, irq
, ptimer
->irq
.irq
);
1221 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER
:
1222 set_timer_irqs(vcpu
->kvm
, vtimer
->irq
.irq
, irq
);
1231 int kvm_arm_timer_get_attr(struct kvm_vcpu
*vcpu
, struct kvm_device_attr
*attr
)
1233 int __user
*uaddr
= (int __user
*)(long)attr
->addr
;
1234 struct arch_timer_context
*timer
;
1237 switch (attr
->attr
) {
1238 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER
:
1239 timer
= vcpu_vtimer(vcpu
);
1241 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER
:
1242 timer
= vcpu_ptimer(vcpu
);
1248 irq
= timer
->irq
.irq
;
1249 return put_user(irq
, uaddr
);
1252 int kvm_arm_timer_has_attr(struct kvm_vcpu
*vcpu
, struct kvm_device_attr
*attr
)
1254 switch (attr
->attr
) {
1255 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER
:
1256 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER
: