2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2000 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
11 #include <linux/bug.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/smp.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/types.h>
21 #include <linux/pagemap.h>
22 #include <linux/ptrace.h>
23 #include <linux/mman.h>
25 #include <linux/memblock.h>
26 #include <linux/highmem.h>
27 #include <linux/swap.h>
28 #include <linux/proc_fs.h>
29 #include <linux/pfn.h>
30 #include <linux/hardirq.h>
31 #include <linux/gfp.h>
32 #include <linux/kcore.h>
33 #include <linux/initrd.h>
35 #include <asm/bootinfo.h>
36 #include <asm/cachectl.h>
40 #include <asm/mmu_context.h>
41 #include <asm/sections.h>
42 #include <asm/pgalloc.h>
44 #include <asm/fixmap.h>
47 * We have up to 8 empty zeroed pages so we can map one of the right colour
48 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
49 * where we have to avoid VCED / VECI exceptions for good performance at
50 * any price. Since page is never written to after the initialization we
51 * don't have to care about aliases on other CPUs.
53 unsigned long empty_zero_page
, zero_page_mask
;
54 EXPORT_SYMBOL_GPL(empty_zero_page
);
55 EXPORT_SYMBOL(zero_page_mask
);
58 * Not static inline because used by IP27 special magic initialization code
60 void setup_zero_pages(void)
62 unsigned int order
, i
;
70 empty_zero_page
= __get_free_pages(GFP_KERNEL
| __GFP_ZERO
, order
);
72 panic("Oh boy, that early out of memory?");
74 page
= virt_to_page((void *)empty_zero_page
);
75 split_page(page
, order
);
76 for (i
= 0; i
< (1 << order
); i
++, page
++)
77 mark_page_reserved(page
);
79 zero_page_mask
= ((PAGE_SIZE
<< order
) - 1) & PAGE_MASK
;
82 static void *__kmap_pgprot(struct page
*page
, unsigned long addr
, pgprot_t prot
)
84 enum fixed_addresses idx
;
85 unsigned int old_mmid
;
86 unsigned long vaddr
, flags
, entrylo
;
87 unsigned long old_ctx
;
91 BUG_ON(Page_dcache_dirty(page
));
95 idx
= (addr
>> PAGE_SHIFT
) & (FIX_N_COLOURS
- 1);
96 idx
+= in_interrupt() ? FIX_N_COLOURS
: 0;
97 vaddr
= __fix_to_virt(FIX_CMAP_END
- idx
);
98 pte
= mk_pte(page
, prot
);
99 #if defined(CONFIG_XPA)
100 entrylo
= pte_to_entrylo(pte
.pte_high
);
101 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
102 entrylo
= pte
.pte_high
;
104 entrylo
= pte_to_entrylo(pte_val(pte
));
107 local_irq_save(flags
);
108 old_ctx
= read_c0_entryhi();
109 write_c0_entryhi(vaddr
& (PAGE_MASK
<< 1));
110 write_c0_entrylo0(entrylo
);
111 write_c0_entrylo1(entrylo
);
113 old_mmid
= read_c0_memorymapid();
114 write_c0_memorymapid(MMID_KERNEL_WIRED
);
118 entrylo
= (pte
.pte_low
& _PFNX_MASK
);
119 writex_c0_entrylo0(entrylo
);
120 writex_c0_entrylo1(entrylo
);
123 tlbidx
= num_wired_entries();
124 write_c0_wired(tlbidx
+ 1);
125 write_c0_index(tlbidx
);
129 write_c0_entryhi(old_ctx
);
131 write_c0_memorymapid(old_mmid
);
132 local_irq_restore(flags
);
134 return (void*) vaddr
;
137 void *kmap_coherent(struct page
*page
, unsigned long addr
)
139 return __kmap_pgprot(page
, addr
, PAGE_KERNEL
);
142 void *kmap_noncoherent(struct page
*page
, unsigned long addr
)
144 return __kmap_pgprot(page
, addr
, PAGE_KERNEL_NC
);
147 void kunmap_coherent(void)
150 unsigned long flags
, old_ctx
;
152 local_irq_save(flags
);
153 old_ctx
= read_c0_entryhi();
154 wired
= num_wired_entries() - 1;
155 write_c0_wired(wired
);
156 write_c0_index(wired
);
157 write_c0_entryhi(UNIQUE_ENTRYHI(wired
));
158 write_c0_entrylo0(0);
159 write_c0_entrylo1(0);
163 write_c0_entryhi(old_ctx
);
164 local_irq_restore(flags
);
169 void copy_user_highpage(struct page
*to
, struct page
*from
,
170 unsigned long vaddr
, struct vm_area_struct
*vma
)
174 vto
= kmap_atomic(to
);
175 if (cpu_has_dc_aliases
&&
176 page_mapcount(from
) && !Page_dcache_dirty(from
)) {
177 vfrom
= kmap_coherent(from
, vaddr
);
178 copy_page(vto
, vfrom
);
181 vfrom
= kmap_atomic(from
);
182 copy_page(vto
, vfrom
);
183 kunmap_atomic(vfrom
);
185 if ((!cpu_has_ic_fills_f_dc
) ||
186 pages_do_alias((unsigned long)vto
, vaddr
& PAGE_MASK
))
187 flush_data_cache_page((unsigned long)vto
);
189 /* Make sure this page is cleared on other CPU's too before using it */
193 void copy_to_user_page(struct vm_area_struct
*vma
,
194 struct page
*page
, unsigned long vaddr
, void *dst
, const void *src
,
197 if (cpu_has_dc_aliases
&&
198 page_mapcount(page
) && !Page_dcache_dirty(page
)) {
199 void *vto
= kmap_coherent(page
, vaddr
) + (vaddr
& ~PAGE_MASK
);
200 memcpy(vto
, src
, len
);
203 memcpy(dst
, src
, len
);
204 if (cpu_has_dc_aliases
)
205 SetPageDcacheDirty(page
);
207 if (vma
->vm_flags
& VM_EXEC
)
208 flush_cache_page(vma
, vaddr
, page_to_pfn(page
));
211 void copy_from_user_page(struct vm_area_struct
*vma
,
212 struct page
*page
, unsigned long vaddr
, void *dst
, const void *src
,
215 if (cpu_has_dc_aliases
&&
216 page_mapcount(page
) && !Page_dcache_dirty(page
)) {
217 void *vfrom
= kmap_coherent(page
, vaddr
) + (vaddr
& ~PAGE_MASK
);
218 memcpy(dst
, vfrom
, len
);
221 memcpy(dst
, src
, len
);
222 if (cpu_has_dc_aliases
)
223 SetPageDcacheDirty(page
);
226 EXPORT_SYMBOL_GPL(copy_from_user_page
);
228 void __init
fixrange_init(unsigned long start
, unsigned long end
,
231 #ifdef CONFIG_HIGHMEM
240 i
= pgd_index(vaddr
);
241 j
= pud_index(vaddr
);
242 k
= pmd_index(vaddr
);
245 for ( ; (i
< PTRS_PER_PGD
) && (vaddr
< end
); pgd
++, i
++) {
247 for ( ; (j
< PTRS_PER_PUD
) && (vaddr
< end
); pud
++, j
++) {
249 for (; (k
< PTRS_PER_PMD
) && (vaddr
< end
); pmd
++, k
++) {
250 if (pmd_none(*pmd
)) {
251 pte
= (pte_t
*) memblock_alloc_low(PAGE_SIZE
,
254 panic("%s: Failed to allocate %lu bytes align=%lx\n",
258 set_pmd(pmd
, __pmd((unsigned long)pte
));
259 BUG_ON(pte
!= pte_offset_kernel(pmd
, 0));
270 struct maar_walk_info
{
271 struct maar_config cfg
[16];
272 unsigned int num_cfg
;
275 static int maar_res_walk(unsigned long start_pfn
, unsigned long nr_pages
,
278 struct maar_walk_info
*wi
= data
;
279 struct maar_config
*cfg
= &wi
->cfg
[wi
->num_cfg
];
280 unsigned int maar_align
;
282 /* MAAR registers hold physical addresses right shifted by 4 bits */
283 maar_align
= BIT(MIPS_MAAR_ADDR_SHIFT
+ 4);
285 /* Fill in the MAAR config entry */
286 cfg
->lower
= ALIGN(PFN_PHYS(start_pfn
), maar_align
);
287 cfg
->upper
= ALIGN_DOWN(PFN_PHYS(start_pfn
+ nr_pages
), maar_align
) - 1;
288 cfg
->attrs
= MIPS_MAAR_S
;
290 /* Ensure we don't overflow the cfg array */
291 if (!WARN_ON(wi
->num_cfg
>= ARRAY_SIZE(wi
->cfg
)))
298 unsigned __weak
platform_maar_init(unsigned num_pairs
)
300 unsigned int num_configured
;
301 struct maar_walk_info wi
;
304 walk_system_ram_range(0, max_pfn
, &wi
, maar_res_walk
);
306 num_configured
= maar_config(wi
.cfg
, wi
.num_cfg
, num_pairs
);
307 if (num_configured
< wi
.num_cfg
)
308 pr_warn("Not enough MAAR pairs (%u) for all memory regions (%u)\n",
309 num_pairs
, wi
.num_cfg
);
311 return num_configured
;
316 unsigned num_maars
, used
, i
;
317 phys_addr_t lower
, upper
, attr
;
319 struct maar_config cfgs
[3];
321 } recorded
= { { { 0 } }, 0 };
326 /* Detect the number of MAARs */
328 back_to_back_c0_hazard();
329 num_maars
= read_c0_maari() + 1;
331 /* MAARs should be in pairs */
332 WARN_ON(num_maars
% 2);
334 /* Set MAARs using values we recorded already */
336 used
= maar_config(recorded
.cfgs
, recorded
.used
, num_maars
/ 2);
337 BUG_ON(used
!= recorded
.used
);
339 /* Configure the required MAARs */
340 used
= platform_maar_init(num_maars
/ 2);
343 /* Disable any further MAARs */
344 for (i
= (used
* 2); i
< num_maars
; i
++) {
346 back_to_back_c0_hazard();
348 back_to_back_c0_hazard();
354 pr_info("MAAR configuration:\n");
355 for (i
= 0; i
< num_maars
; i
+= 2) {
357 back_to_back_c0_hazard();
358 upper
= read_c0_maar();
360 upper
|= (phys_addr_t
)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT
;
363 write_c0_maari(i
+ 1);
364 back_to_back_c0_hazard();
365 lower
= read_c0_maar();
367 lower
|= (phys_addr_t
)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT
;
370 attr
= lower
& upper
;
371 lower
= (lower
& MIPS_MAAR_ADDR
) << 4;
372 upper
= ((upper
& MIPS_MAAR_ADDR
) << 4) | 0xffff;
374 pr_info(" [%d]: ", i
/ 2);
375 if ((attr
& MIPS_MAAR_V
) != MIPS_MAAR_V
) {
376 pr_cont("disabled\n");
380 pr_cont("%pa-%pa", &lower
, &upper
);
382 if (attr
& MIPS_MAAR_S
)
383 pr_cont(" speculate");
387 /* Record the setup for use on secondary CPUs */
388 if (used
<= ARRAY_SIZE(recorded
.cfgs
)) {
389 recorded
.cfgs
[recorded
.used
].lower
= lower
;
390 recorded
.cfgs
[recorded
.used
].upper
= upper
;
391 recorded
.cfgs
[recorded
.used
].attrs
= attr
;
397 #ifndef CONFIG_NEED_MULTIPLE_NODES
398 void __init
paging_init(void)
400 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
404 #ifdef CONFIG_ZONE_DMA
405 max_zone_pfns
[ZONE_DMA
] = MAX_DMA_PFN
;
407 #ifdef CONFIG_ZONE_DMA32
408 max_zone_pfns
[ZONE_DMA32
] = MAX_DMA32_PFN
;
410 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
411 #ifdef CONFIG_HIGHMEM
412 max_zone_pfns
[ZONE_HIGHMEM
] = highend_pfn
;
414 if (cpu_has_dc_aliases
&& max_low_pfn
!= highend_pfn
) {
415 printk(KERN_WARNING
"This processor doesn't support highmem."
416 " %ldk highmem ignored\n",
417 (highend_pfn
- max_low_pfn
) << (PAGE_SHIFT
- 10));
418 max_zone_pfns
[ZONE_HIGHMEM
] = max_low_pfn
;
422 free_area_init(max_zone_pfns
);
426 static struct kcore_list kcore_kseg0
;
429 static inline void __init
mem_init_free_highmem(void)
431 #ifdef CONFIG_HIGHMEM
434 if (cpu_has_dc_aliases
)
437 for (tmp
= highstart_pfn
; tmp
< highend_pfn
; tmp
++) {
438 struct page
*page
= pfn_to_page(tmp
);
440 if (!memblock_is_memory(PFN_PHYS(tmp
)))
441 SetPageReserved(page
);
443 free_highmem_page(page
);
448 void __init
mem_init(void)
451 * When _PFN_SHIFT is greater than PAGE_SHIFT we won't have enough PTE
452 * bits to hold a full 32b physical address on MIPS32 systems.
454 BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT
) && (_PFN_SHIFT
> PAGE_SHIFT
));
456 #ifdef CONFIG_HIGHMEM
457 #ifdef CONFIG_DISCONTIGMEM
458 #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
460 max_mapnr
= highend_pfn
? highend_pfn
: max_low_pfn
;
462 max_mapnr
= max_low_pfn
;
464 high_memory
= (void *) __va(max_low_pfn
<< PAGE_SHIFT
);
468 setup_zero_pages(); /* Setup zeroed pages. */
469 mem_init_free_highmem();
470 mem_init_print_info(NULL
);
473 if ((unsigned long) &_text
> (unsigned long) CKSEG0
)
474 /* The -4 is a hack so that user tools don't have to handle
476 kclist_add(&kcore_kseg0
, (void *) CKSEG0
,
477 0x80000000 - 4, KCORE_TEXT
);
480 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
482 void free_init_pages(const char *what
, unsigned long begin
, unsigned long end
)
486 for (pfn
= PFN_UP(begin
); pfn
< PFN_DOWN(end
); pfn
++) {
487 struct page
*page
= pfn_to_page(pfn
);
488 void *addr
= phys_to_virt(PFN_PHYS(pfn
));
490 memset(addr
, POISON_FREE_INITMEM
, PAGE_SIZE
);
491 free_reserved_page(page
);
493 printk(KERN_INFO
"Freeing %s: %ldk freed\n", what
, (end
- begin
) >> 10);
496 void (*free_init_pages_eva
)(void *begin
, void *end
) = NULL
;
498 void __ref
free_initmem(void)
500 prom_free_prom_memory();
502 * Let the platform define a specific function to free the
503 * init section since EVA may have used any possible mapping
504 * between virtual and physical addresses.
506 if (free_init_pages_eva
)
507 free_init_pages_eva((void *)&__init_begin
, (void *)&__init_end
);
509 free_initmem_default(POISON_FREE_INITMEM
);
512 #ifdef CONFIG_HAVE_SETUP_PER_CPU_AREA
513 unsigned long __per_cpu_offset
[NR_CPUS
] __read_mostly
;
514 EXPORT_SYMBOL(__per_cpu_offset
);
516 static int __init
pcpu_cpu_distance(unsigned int from
, unsigned int to
)
518 return node_distance(cpu_to_node(from
), cpu_to_node(to
));
521 static void * __init
pcpu_fc_alloc(unsigned int cpu
, size_t size
,
524 return memblock_alloc_try_nid(size
, align
, __pa(MAX_DMA_ADDRESS
),
525 MEMBLOCK_ALLOC_ACCESSIBLE
,
529 static void __init
pcpu_fc_free(void *ptr
, size_t size
)
531 memblock_free_early(__pa(ptr
), size
);
534 void __init
setup_per_cpu_areas(void)
541 * Always reserve area for module percpu variables. That's
542 * what the legacy allocator did.
544 rc
= pcpu_embed_first_chunk(PERCPU_MODULE_RESERVE
,
545 PERCPU_DYNAMIC_RESERVE
, PAGE_SIZE
,
547 pcpu_fc_alloc
, pcpu_fc_free
);
549 panic("Failed to initialize percpu areas.");
551 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
552 for_each_possible_cpu(cpu
)
553 __per_cpu_offset
[cpu
] = delta
+ pcpu_unit_offsets
[cpu
];
557 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
558 unsigned long pgd_current
[NR_CPUS
];
562 * Align swapper_pg_dir in to 64K, allows its address to be loaded
563 * with a single LUI instruction in the TLB handlers. If we used
564 * __aligned(64K), its size would get rounded up to the alignment
565 * size, and waste space. So we place it in its own section and align
566 * it in the linker script.
568 pgd_t swapper_pg_dir
[PTRS_PER_PGD
] __section(".bss..swapper_pg_dir");
569 #ifndef __PAGETABLE_PUD_FOLDED
570 pud_t invalid_pud_table
[PTRS_PER_PUD
] __page_aligned_bss
;
572 #ifndef __PAGETABLE_PMD_FOLDED
573 pmd_t invalid_pmd_table
[PTRS_PER_PMD
] __page_aligned_bss
;
574 EXPORT_SYMBOL_GPL(invalid_pmd_table
);
576 pte_t invalid_pte_table
[PTRS_PER_PTE
] __page_aligned_bss
;
577 EXPORT_SYMBOL(invalid_pte_table
);