1 // SPDX-License-Identifier: GPL-2.0-only
3 * SBI initialilization and all extension implementation.
5 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
8 #include <linux/init.h>
13 /* default SBI version is 0.1 */
14 unsigned long sbi_spec_version
= SBI_SPEC_VERSION_DEFAULT
;
15 EXPORT_SYMBOL(sbi_spec_version
);
17 static void (*__sbi_set_timer
)(uint64_t stime
);
18 static int (*__sbi_send_ipi
)(const unsigned long *hart_mask
);
19 static int (*__sbi_rfence
)(int fid
, const unsigned long *hart_mask
,
20 unsigned long start
, unsigned long size
,
21 unsigned long arg4
, unsigned long arg5
);
23 struct sbiret
sbi_ecall(int ext
, int fid
, unsigned long arg0
,
24 unsigned long arg1
, unsigned long arg2
,
25 unsigned long arg3
, unsigned long arg4
,
30 register uintptr_t a0
asm ("a0") = (uintptr_t)(arg0
);
31 register uintptr_t a1
asm ("a1") = (uintptr_t)(arg1
);
32 register uintptr_t a2
asm ("a2") = (uintptr_t)(arg2
);
33 register uintptr_t a3
asm ("a3") = (uintptr_t)(arg3
);
34 register uintptr_t a4
asm ("a4") = (uintptr_t)(arg4
);
35 register uintptr_t a5
asm ("a5") = (uintptr_t)(arg5
);
36 register uintptr_t a6
asm ("a6") = (uintptr_t)(fid
);
37 register uintptr_t a7
asm ("a7") = (uintptr_t)(ext
);
39 : "+r" (a0
), "+r" (a1
)
40 : "r" (a2
), "r" (a3
), "r" (a4
), "r" (a5
), "r" (a6
), "r" (a7
)
47 EXPORT_SYMBOL(sbi_ecall
);
49 int sbi_err_map_linux_errno(int err
)
56 case SBI_ERR_INVALID_PARAM
:
58 case SBI_ERR_INVALID_ADDRESS
:
60 case SBI_ERR_NOT_SUPPORTED
:
66 EXPORT_SYMBOL(sbi_err_map_linux_errno
);
68 #ifdef CONFIG_RISCV_SBI_V01
70 * sbi_console_putchar() - Writes given character to the console device.
71 * @ch: The data to be written to the console.
75 void sbi_console_putchar(int ch
)
77 sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR
, 0, ch
, 0, 0, 0, 0, 0);
79 EXPORT_SYMBOL(sbi_console_putchar
);
82 * sbi_console_getchar() - Reads a byte from console device.
84 * Returns the value read from console.
86 int sbi_console_getchar(void)
90 ret
= sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR
, 0, 0, 0, 0, 0, 0, 0);
94 EXPORT_SYMBOL(sbi_console_getchar
);
97 * sbi_shutdown() - Remove all the harts from executing supervisor code.
101 void sbi_shutdown(void)
103 sbi_ecall(SBI_EXT_0_1_SHUTDOWN
, 0, 0, 0, 0, 0, 0, 0);
105 EXPORT_SYMBOL(sbi_shutdown
);
108 * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
112 void sbi_clear_ipi(void)
114 sbi_ecall(SBI_EXT_0_1_CLEAR_IPI
, 0, 0, 0, 0, 0, 0, 0);
116 EXPORT_SYMBOL(sbi_clear_ipi
);
119 * sbi_set_timer_v01() - Program the timer for next timer event.
120 * @stime_value: The value after which next timer event should fire.
124 static void __sbi_set_timer_v01(uint64_t stime_value
)
126 #if __riscv_xlen == 32
127 sbi_ecall(SBI_EXT_0_1_SET_TIMER
, 0, stime_value
,
128 stime_value
>> 32, 0, 0, 0, 0);
130 sbi_ecall(SBI_EXT_0_1_SET_TIMER
, 0, stime_value
, 0, 0, 0, 0, 0);
134 static int __sbi_send_ipi_v01(const unsigned long *hart_mask
)
136 sbi_ecall(SBI_EXT_0_1_SEND_IPI
, 0, (unsigned long)hart_mask
,
141 static int __sbi_rfence_v01(int fid
, const unsigned long *hart_mask
,
142 unsigned long start
, unsigned long size
,
143 unsigned long arg4
, unsigned long arg5
)
147 /* v0.2 function IDs are equivalent to v0.1 extension IDs */
149 case SBI_EXT_RFENCE_REMOTE_FENCE_I
:
150 sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I
, 0,
151 (unsigned long)hart_mask
, 0, 0, 0, 0, 0);
153 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
:
154 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA
, 0,
155 (unsigned long)hart_mask
, start
, size
,
158 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
:
159 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
, 0,
160 (unsigned long)hart_mask
, start
, size
,
164 pr_err("SBI call [%d]not supported in SBI v0.1\n", fid
);
171 static void sbi_set_power_off(void)
173 pm_power_off
= sbi_shutdown
;
176 static void __sbi_set_timer_v01(uint64_t stime_value
)
178 pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
179 sbi_major_version(), sbi_minor_version());
182 static int __sbi_send_ipi_v01(const unsigned long *hart_mask
)
184 pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
185 sbi_major_version(), sbi_minor_version());
190 static int __sbi_rfence_v01(int fid
, const unsigned long *hart_mask
,
191 unsigned long start
, unsigned long size
,
192 unsigned long arg4
, unsigned long arg5
)
194 pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
195 sbi_major_version(), sbi_minor_version());
200 static void sbi_set_power_off(void) {}
201 #endif /* CONFIG_RISCV_SBI_V01 */
203 static void __sbi_set_timer_v02(uint64_t stime_value
)
205 #if __riscv_xlen == 32
206 sbi_ecall(SBI_EXT_TIME
, SBI_EXT_TIME_SET_TIMER
, stime_value
,
207 stime_value
>> 32, 0, 0, 0, 0);
209 sbi_ecall(SBI_EXT_TIME
, SBI_EXT_TIME_SET_TIMER
, stime_value
, 0,
214 static int __sbi_send_ipi_v02(const unsigned long *hart_mask
)
216 unsigned long hartid
, hmask_val
, hbase
;
217 struct cpumask tmask
;
218 struct sbiret ret
= {0};
221 if (!hart_mask
|| !(*hart_mask
)) {
222 riscv_cpuid_to_hartid_mask(cpu_online_mask
, &tmask
);
223 hart_mask
= cpumask_bits(&tmask
);
228 for_each_set_bit(hartid
, hart_mask
, NR_CPUS
) {
229 if (hmask_val
&& ((hbase
+ BITS_PER_LONG
) <= hartid
)) {
230 ret
= sbi_ecall(SBI_EXT_IPI
, SBI_EXT_IPI_SEND_IPI
,
231 hmask_val
, hbase
, 0, 0, 0, 0);
239 hmask_val
|= 1UL << (hartid
- hbase
);
243 ret
= sbi_ecall(SBI_EXT_IPI
, SBI_EXT_IPI_SEND_IPI
,
244 hmask_val
, hbase
, 0, 0, 0, 0);
252 result
= sbi_err_map_linux_errno(ret
.error
);
253 pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
254 __func__
, hbase
, hmask_val
, result
);
258 static int __sbi_rfence_v02_call(unsigned long fid
, unsigned long hmask_val
,
259 unsigned long hbase
, unsigned long start
,
260 unsigned long size
, unsigned long arg4
,
263 struct sbiret ret
= {0};
264 int ext
= SBI_EXT_RFENCE
;
268 case SBI_EXT_RFENCE_REMOTE_FENCE_I
:
269 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, 0, 0, 0, 0);
271 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
:
272 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
275 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
:
276 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
280 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA
:
281 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
284 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID
:
285 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
288 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA
:
289 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
292 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID
:
293 ret
= sbi_ecall(ext
, fid
, hmask_val
, hbase
, start
,
297 pr_err("unknown function ID [%lu] for SBI extension [%d]\n",
303 result
= sbi_err_map_linux_errno(ret
.error
);
304 pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
305 __func__
, hbase
, hmask_val
, result
);
311 static int __sbi_rfence_v02(int fid
, const unsigned long *hart_mask
,
312 unsigned long start
, unsigned long size
,
313 unsigned long arg4
, unsigned long arg5
)
315 unsigned long hmask_val
, hartid
, hbase
;
316 struct cpumask tmask
;
319 if (!hart_mask
|| !(*hart_mask
)) {
320 riscv_cpuid_to_hartid_mask(cpu_online_mask
, &tmask
);
321 hart_mask
= cpumask_bits(&tmask
);
326 for_each_set_bit(hartid
, hart_mask
, NR_CPUS
) {
327 if (hmask_val
&& ((hbase
+ BITS_PER_LONG
) <= hartid
)) {
328 result
= __sbi_rfence_v02_call(fid
, hmask_val
, hbase
,
329 start
, size
, arg4
, arg5
);
337 hmask_val
|= 1UL << (hartid
- hbase
);
341 result
= __sbi_rfence_v02_call(fid
, hmask_val
, hbase
,
342 start
, size
, arg4
, arg5
);
351 * sbi_set_timer() - Program the timer for next timer event.
352 * @stime_value: The value after which next timer event should fire.
356 void sbi_set_timer(uint64_t stime_value
)
358 __sbi_set_timer(stime_value
);
362 * sbi_send_ipi() - Send an IPI to any hart.
363 * @hart_mask: A cpu mask containing all the target harts.
367 void sbi_send_ipi(const unsigned long *hart_mask
)
369 __sbi_send_ipi(hart_mask
);
371 EXPORT_SYMBOL(sbi_send_ipi
);
374 * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
375 * @hart_mask: A cpu mask containing all the target harts.
379 void sbi_remote_fence_i(const unsigned long *hart_mask
)
381 __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I
,
382 hart_mask
, 0, 0, 0, 0);
384 EXPORT_SYMBOL(sbi_remote_fence_i
);
387 * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
388 * harts for the specified virtual address range.
389 * @hart_mask: A cpu mask containing all the target harts.
390 * @start: Start of the virtual address
391 * @size: Total size of the virtual address range.
395 void sbi_remote_sfence_vma(const unsigned long *hart_mask
,
399 __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
,
400 hart_mask
, start
, size
, 0, 0);
402 EXPORT_SYMBOL(sbi_remote_sfence_vma
);
405 * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
406 * remote harts for a virtual address range belonging to a specific ASID.
408 * @hart_mask: A cpu mask containing all the target harts.
409 * @start: Start of the virtual address
410 * @size: Total size of the virtual address range.
411 * @asid: The value of address space identifier (ASID).
415 void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask
,
420 __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
,
421 hart_mask
, start
, size
, asid
, 0);
423 EXPORT_SYMBOL(sbi_remote_sfence_vma_asid
);
426 * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
427 * harts for the specified guest physical address range.
428 * @hart_mask: A cpu mask containing all the target harts.
429 * @start: Start of the guest physical address
430 * @size: Total size of the guest physical address range.
434 int sbi_remote_hfence_gvma(const unsigned long *hart_mask
,
438 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA
,
439 hart_mask
, start
, size
, 0, 0);
441 EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma
);
444 * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
445 * remote harts for a guest physical address range belonging to a specific VMID.
447 * @hart_mask: A cpu mask containing all the target harts.
448 * @start: Start of the guest physical address
449 * @size: Total size of the guest physical address range.
450 * @vmid: The value of guest ID (VMID).
452 * Return: 0 if success, Error otherwise.
454 int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask
,
459 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID
,
460 hart_mask
, start
, size
, vmid
, 0);
462 EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid
);
465 * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
466 * harts for the current guest virtual address range.
467 * @hart_mask: A cpu mask containing all the target harts.
468 * @start: Start of the current guest virtual address
469 * @size: Total size of the current guest virtual address range.
473 int sbi_remote_hfence_vvma(const unsigned long *hart_mask
,
477 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA
,
478 hart_mask
, start
, size
, 0, 0);
480 EXPORT_SYMBOL(sbi_remote_hfence_vvma
);
483 * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
484 * remote harts for current guest virtual address range belonging to a specific
487 * @hart_mask: A cpu mask containing all the target harts.
488 * @start: Start of the current guest virtual address
489 * @size: Total size of the current guest virtual address range.
490 * @asid: The value of address space identifier (ASID).
494 int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask
,
499 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID
,
500 hart_mask
, start
, size
, asid
, 0);
502 EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid
);
505 * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
506 * @extid: The extension ID to be probed.
508 * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
510 int sbi_probe_extension(int extid
)
514 ret
= sbi_ecall(SBI_EXT_BASE
, SBI_EXT_BASE_PROBE_EXT
, extid
,
522 EXPORT_SYMBOL(sbi_probe_extension
);
524 static long __sbi_base_ecall(int fid
)
528 ret
= sbi_ecall(SBI_EXT_BASE
, fid
, 0, 0, 0, 0, 0, 0);
532 return sbi_err_map_linux_errno(ret
.error
);
535 static inline long sbi_get_spec_version(void)
537 return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION
);
540 static inline long sbi_get_firmware_id(void)
542 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_ID
);
545 static inline long sbi_get_firmware_version(void)
547 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION
);
550 static void sbi_send_cpumask_ipi(const struct cpumask
*target
)
552 struct cpumask hartid_mask
;
554 riscv_cpuid_to_hartid_mask(target
, &hartid_mask
);
556 sbi_send_ipi(cpumask_bits(&hartid_mask
));
559 static struct riscv_ipi_ops sbi_ipi_ops
= {
560 .ipi_inject
= sbi_send_cpumask_ipi
563 int __init
sbi_init(void)
568 ret
= sbi_get_spec_version();
570 sbi_spec_version
= ret
;
572 pr_info("SBI specification v%lu.%lu detected\n",
573 sbi_major_version(), sbi_minor_version());
575 if (!sbi_spec_is_0_1()) {
576 pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
577 sbi_get_firmware_id(), sbi_get_firmware_version());
578 if (sbi_probe_extension(SBI_EXT_TIME
) > 0) {
579 __sbi_set_timer
= __sbi_set_timer_v02
;
580 pr_info("SBI v0.2 TIME extension detected\n");
582 __sbi_set_timer
= __sbi_set_timer_v01
;
584 if (sbi_probe_extension(SBI_EXT_IPI
) > 0) {
585 __sbi_send_ipi
= __sbi_send_ipi_v02
;
586 pr_info("SBI v0.2 IPI extension detected\n");
588 __sbi_send_ipi
= __sbi_send_ipi_v01
;
590 if (sbi_probe_extension(SBI_EXT_RFENCE
) > 0) {
591 __sbi_rfence
= __sbi_rfence_v02
;
592 pr_info("SBI v0.2 RFENCE extension detected\n");
594 __sbi_rfence
= __sbi_rfence_v01
;
597 __sbi_set_timer
= __sbi_set_timer_v01
;
598 __sbi_send_ipi
= __sbi_send_ipi_v01
;
599 __sbi_rfence
= __sbi_rfence_v01
;
602 riscv_set_ipi_ops(&sbi_ipi_ops
);