1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
8 #include <asm/asm-offsets.h>
9 #include <asm/current.h>
10 #include <asm/errno.h>
11 #include <asm/ia32_unistd.h>
12 #include <asm/thread_info.h>
13 #include <asm/segment.h>
14 #include <asm/irqflags.h>
17 #include <linux/linkage.h>
18 #include <linux/err.h>
20 .section .entry.text, "ax"
23 * 32-bit SYSENTER entry.
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO. In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction. This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 * eax system call number
49 SYM_CODE_START(entry_SYSENTER_compat)
51 /* Interrupts are off on entry. */
55 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
58 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
60 /* Construct struct pt_regs on stack */
61 pushq $__USER32_DS /* pt_regs->ss */
62 pushq $0 /* pt_regs->sp = 0 (placeholder) */
65 * Push flags. This is nasty. First, interrupts are currently
66 * off, but we need pt_regs->flags to have IF set. Second, if TS
67 * was set in usermode, it's still set, and we're singlestepping
68 * through this code. do_SYSENTER_32() will fix up IF.
70 pushfq /* pt_regs->flags (except IF = 0) */
71 pushq $__USER32_CS /* pt_regs->cs */
72 pushq $0 /* pt_regs->ip = 0 (placeholder) */
73 SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
76 * User tracing code (ptrace or signal handlers) might assume that
77 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
78 * syscall. Just in case the high bits are nonzero, zero-extend
79 * the syscall number. (This could almost certainly be deleted
80 * with no ill effects.)
84 pushq %rax /* pt_regs->orig_ax */
85 pushq %rdi /* pt_regs->di */
86 pushq %rsi /* pt_regs->si */
87 pushq %rdx /* pt_regs->dx */
88 pushq %rcx /* pt_regs->cx */
89 pushq $-ENOSYS /* pt_regs->ax */
90 pushq $0 /* pt_regs->r8 = 0 */
91 xorl %r8d, %r8d /* nospec r8 */
92 pushq $0 /* pt_regs->r9 = 0 */
93 xorl %r9d, %r9d /* nospec r9 */
94 pushq $0 /* pt_regs->r10 = 0 */
95 xorl %r10d, %r10d /* nospec r10 */
96 pushq $0 /* pt_regs->r11 = 0 */
97 xorl %r11d, %r11d /* nospec r11 */
98 pushq %rbx /* pt_regs->rbx */
99 xorl %ebx, %ebx /* nospec rbx */
100 pushq %rbp /* pt_regs->rbp (will be overwritten) */
101 xorl %ebp, %ebp /* nospec rbp */
102 pushq $0 /* pt_regs->r12 = 0 */
103 xorl %r12d, %r12d /* nospec r12 */
104 pushq $0 /* pt_regs->r13 = 0 */
105 xorl %r13d, %r13d /* nospec r13 */
106 pushq $0 /* pt_regs->r14 = 0 */
107 xorl %r14d, %r14d /* nospec r14 */
108 pushq $0 /* pt_regs->r15 = 0 */
109 xorl %r15d, %r15d /* nospec r15 */
116 * SYSENTER doesn't filter flags, so we need to clear NT and AC
117 * ourselves. To save a few cycles, we can check whether
118 * either was set instead of doing an unconditional popfq.
119 * This needs to happen before enabling interrupts so that
120 * we don't get preempted with NT set.
122 * If TF is set, we will single-step all the way to here -- do_debug
123 * will ignore all the traps. (Yes, this is slow, but so is
124 * single-stepping in general. This allows us to avoid having
125 * a more complicated code to handle the case where a user program
126 * forces us to single-step through the SYSENTER entry code.)
128 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
129 * out-of-line as an optimization: NT is unlikely to be set in the
130 * majority of the cases and instead of polluting the I$ unnecessarily,
131 * we're keeping that code behind a branch which will predict as
132 * not-taken and therefore its instructions won't be fetched.
134 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
135 jnz .Lsysenter_fix_flags
136 .Lsysenter_flags_fixed:
140 /* XEN PV guests always use IRET path */
141 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
142 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
143 jmp sysret32_from_system_call
145 .Lsysenter_fix_flags:
146 pushq $X86_EFLAGS_FIXED
148 jmp .Lsysenter_flags_fixed
149 SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
150 SYM_CODE_END(entry_SYSENTER_compat)
153 * 32-bit SYSCALL entry.
155 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
156 * on 64-bit kernels running on AMD CPUs.
158 * The SYSCALL instruction, in principle, should *only* occur in the
159 * vDSO. In practice, it appears that this really is the case.
162 * - The calling convention for SYSCALL has changed several times without
165 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
166 * user task that did SYSCALL without immediately reloading SS
167 * would randomly crash.
169 * - Most programmers do not directly target AMD CPUs, and the 32-bit
170 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
171 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
172 * because the SYSCALL instruction in legacy/native 32-bit mode (as
173 * opposed to compat mode) is sufficiently poorly designed as to be
174 * essentially unusable.
176 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
177 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
178 * programmed MSRs. RFLAGS gets masked by a value from another MSR
179 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
180 * the stack and does not change RSP.
182 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
183 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
184 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
185 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
186 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
189 * eax system call number
192 * ebp arg2 (note: not saved in the stack frame, should not be touched)
199 SYM_CODE_START(entry_SYSCALL_compat)
201 /* Interrupts are off on entry. */
207 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
208 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
210 /* Switch to the kernel stack */
211 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
213 /* Construct struct pt_regs on stack */
214 pushq $__USER32_DS /* pt_regs->ss */
215 pushq %r8 /* pt_regs->sp */
216 pushq %r11 /* pt_regs->flags */
217 pushq $__USER32_CS /* pt_regs->cs */
218 pushq %rcx /* pt_regs->ip */
219 SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
220 movl %eax, %eax /* discard orig_ax high bits */
221 pushq %rax /* pt_regs->orig_ax */
222 pushq %rdi /* pt_regs->di */
223 pushq %rsi /* pt_regs->si */
224 xorl %esi, %esi /* nospec si */
225 pushq %rdx /* pt_regs->dx */
226 xorl %edx, %edx /* nospec dx */
227 pushq %rbp /* pt_regs->cx (stashed in bp) */
228 xorl %ecx, %ecx /* nospec cx */
229 pushq $-ENOSYS /* pt_regs->ax */
230 pushq $0 /* pt_regs->r8 = 0 */
231 xorl %r8d, %r8d /* nospec r8 */
232 pushq $0 /* pt_regs->r9 = 0 */
233 xorl %r9d, %r9d /* nospec r9 */
234 pushq $0 /* pt_regs->r10 = 0 */
235 xorl %r10d, %r10d /* nospec r10 */
236 pushq $0 /* pt_regs->r11 = 0 */
237 xorl %r11d, %r11d /* nospec r11 */
238 pushq %rbx /* pt_regs->rbx */
239 xorl %ebx, %ebx /* nospec rbx */
240 pushq %rbp /* pt_regs->rbp (will be overwritten) */
241 xorl %ebp, %ebp /* nospec rbp */
242 pushq $0 /* pt_regs->r12 = 0 */
243 xorl %r12d, %r12d /* nospec r12 */
244 pushq $0 /* pt_regs->r13 = 0 */
245 xorl %r13d, %r13d /* nospec r13 */
246 pushq $0 /* pt_regs->r14 = 0 */
247 xorl %r14d, %r14d /* nospec r14 */
248 pushq $0 /* pt_regs->r15 = 0 */
249 xorl %r15d, %r15d /* nospec r15 */
254 call do_fast_syscall_32
255 /* XEN PV guests always use IRET path */
256 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
257 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
259 /* Opportunistic SYSRET */
260 sysret32_from_system_call:
262 * We are not going to return to userspace from the trampoline
263 * stack. So let's erase the thread stack right now.
267 movq RBX(%rsp), %rbx /* pt_regs->rbx */
268 movq RBP(%rsp), %rbp /* pt_regs->rbp */
269 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
270 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
271 addq $RAX, %rsp /* Skip r8-r15 */
272 popq %rax /* pt_regs->rax */
273 popq %rdx /* Skip pt_regs->cx */
274 popq %rdx /* pt_regs->dx */
275 popq %rsi /* pt_regs->si */
276 popq %rdi /* pt_regs->di */
279 * USERGS_SYSRET32 does:
280 * GSBASE = user's GS base
286 * ECX will not match pt_regs->cx, but we're returning to a vDSO
287 * trampoline that will fix up RCX, so this is okay.
289 * R12-R15 are callee-saved, so they contain whatever was in them
290 * when the system call started, which is already known to user
291 * code. We zero R8-R10 to avoid info leaks.
293 movq RSP-ORIG_RAX(%rsp), %rsp
296 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
297 * on the process stack which is not mapped to userspace and
298 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
299 * switch until after after the last reference to the process
302 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
304 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
311 SYM_CODE_END(entry_SYSCALL_compat)
314 * 32-bit legacy system call entry.
316 * 32-bit x86 Linux system calls traditionally used the INT $0x80
317 * instruction. INT $0x80 lands here.
319 * This entry point can be used by 32-bit and 64-bit programs to perform
320 * 32-bit system calls. Instances of INT $0x80 can be found inline in
321 * various programs and libraries. It is also used by the vDSO's
322 * __kernel_vsyscall fallback for hardware that doesn't support a faster
323 * entry method. Restarted 32-bit system calls also fall back to INT
324 * $0x80 regardless of what instruction was originally used to do the
327 * This is considered a slow path. It is not used by most libc
328 * implementations on modern hardware except during process startup.
331 * eax system call number
339 SYM_CODE_START(entry_INT80_compat)
342 * Interrupts are off on entry.
344 ASM_CLAC /* Do this early to minimize exposure */
348 * User tracing code (ptrace or signal handlers) might assume that
349 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
350 * syscall. Just in case the high bits are nonzero, zero-extend
351 * the syscall number. (This could almost certainly be deleted
352 * with no ill effects.)
356 /* switch to thread stack expects orig_ax and rdi to be pushed */
357 pushq %rax /* pt_regs->orig_ax */
358 pushq %rdi /* pt_regs->di */
360 /* Need to switch before accessing the thread stack. */
361 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
363 /* In the Xen PV case we already run on the thread stack. */
364 ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
367 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
369 pushq 6*8(%rdi) /* regs->ss */
370 pushq 5*8(%rdi) /* regs->rsp */
371 pushq 4*8(%rdi) /* regs->eflags */
372 pushq 3*8(%rdi) /* regs->cs */
373 pushq 2*8(%rdi) /* regs->ip */
374 pushq 1*8(%rdi) /* regs->orig_ax */
375 pushq (%rdi) /* pt_regs->di */
378 pushq %rsi /* pt_regs->si */
379 xorl %esi, %esi /* nospec si */
380 pushq %rdx /* pt_regs->dx */
381 xorl %edx, %edx /* nospec dx */
382 pushq %rcx /* pt_regs->cx */
383 xorl %ecx, %ecx /* nospec cx */
384 pushq $-ENOSYS /* pt_regs->ax */
385 pushq %r8 /* pt_regs->r8 */
386 xorl %r8d, %r8d /* nospec r8 */
387 pushq %r9 /* pt_regs->r9 */
388 xorl %r9d, %r9d /* nospec r9 */
389 pushq %r10 /* pt_regs->r10*/
390 xorl %r10d, %r10d /* nospec r10 */
391 pushq %r11 /* pt_regs->r11 */
392 xorl %r11d, %r11d /* nospec r11 */
393 pushq %rbx /* pt_regs->rbx */
394 xorl %ebx, %ebx /* nospec rbx */
395 pushq %rbp /* pt_regs->rbp */
396 xorl %ebp, %ebp /* nospec rbp */
397 pushq %r12 /* pt_regs->r12 */
398 xorl %r12d, %r12d /* nospec r12 */
399 pushq %r13 /* pt_regs->r13 */
400 xorl %r13d, %r13d /* nospec r13 */
401 pushq %r14 /* pt_regs->r14 */
402 xorl %r14d, %r14d /* nospec r14 */
403 pushq %r15 /* pt_regs->r15 */
404 xorl %r15d, %r15d /* nospec r15 */
411 call do_int80_syscall_32
412 jmp swapgs_restore_regs_and_return_to_usermode
413 SYM_CODE_END(entry_INT80_compat)