1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/char/hw_random/timeriomem-rng.c
5 * Copyright (C) 2009 Alexander Clouter <alex@digriz.org.uk>
7 * Derived from drivers/char/hw_random/omap-rng.c
8 * Copyright 2005 (c) MontaVista Software, Inc.
9 * Author: Deepak Saxena <dsaxena@plexity.net>
12 * This driver is useful for platforms that have an IO range that provides
13 * periodic random data from a single IO memory address. All the platform
14 * has to do is provide the address and 'wait time' that new data becomes
17 * TODO: add support for reading sizes other than 32bits and masking
20 #include <linux/completion.h>
21 #include <linux/delay.h>
22 #include <linux/hrtimer.h>
23 #include <linux/hw_random.h>
25 #include <linux/ktime.h>
26 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/slab.h>
30 #include <linux/time.h>
31 #include <linux/timeriomem-rng.h>
33 struct timeriomem_rng_private
{
34 void __iomem
*io_base
;
36 unsigned int present
:1;
39 struct completion completion
;
44 static int timeriomem_rng_read(struct hwrng
*hwrng
, void *data
,
45 size_t max
, bool wait
)
47 struct timeriomem_rng_private
*priv
=
48 container_of(hwrng
, struct timeriomem_rng_private
, rng_ops
);
50 int period_us
= ktime_to_us(priv
->period
);
53 * There may not have been enough time for new data to be generated
54 * since the last request. If the caller doesn't want to wait, let them
55 * bail out. Otherwise, wait for the completion. If the new data has
56 * already been generated, the completion should already be available.
58 if (!wait
&& !priv
->present
)
61 wait_for_completion(&priv
->completion
);
65 * After the first read, all additional reads will need to wait
66 * for the RNG to generate new data. Since the period can have
67 * a wide range of values (1us to 1s have been observed), allow
68 * for 1% tolerance in the sleep time rather than a fixed value.
71 usleep_range(period_us
,
72 period_us
+ min(1, period_us
/ 100));
74 *(u32
*)data
= readl(priv
->io_base
);
75 retval
+= sizeof(u32
);
78 } while (wait
&& max
> sizeof(u32
));
81 * Block any new callers until the RNG has had time to generate new
85 reinit_completion(&priv
->completion
);
86 hrtimer_forward_now(&priv
->timer
, priv
->period
);
87 hrtimer_restart(&priv
->timer
);
92 static enum hrtimer_restart
timeriomem_rng_trigger(struct hrtimer
*timer
)
94 struct timeriomem_rng_private
*priv
95 = container_of(timer
, struct timeriomem_rng_private
, timer
);
98 complete(&priv
->completion
);
100 return HRTIMER_NORESTART
;
103 static int timeriomem_rng_probe(struct platform_device
*pdev
)
105 struct timeriomem_rng_data
*pdata
= pdev
->dev
.platform_data
;
106 struct timeriomem_rng_private
*priv
;
107 struct resource
*res
;
111 if (!pdev
->dev
.of_node
&& !pdata
) {
112 dev_err(&pdev
->dev
, "timeriomem_rng_data is missing\n");
116 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
120 if (res
->start
% 4 != 0 || resource_size(res
) != 4) {
122 "address must be four bytes wide and aligned\n");
126 /* Allocate memory for the device structure (and zero it) */
127 priv
= devm_kzalloc(&pdev
->dev
,
128 sizeof(struct timeriomem_rng_private
), GFP_KERNEL
);
132 platform_set_drvdata(pdev
, priv
);
134 if (pdev
->dev
.of_node
) {
137 if (!of_property_read_u32(pdev
->dev
.of_node
,
141 dev_err(&pdev
->dev
, "missing period\n");
145 if (!of_property_read_u32(pdev
->dev
.of_node
,
147 priv
->rng_ops
.quality
= i
;
149 priv
->rng_ops
.quality
= 0;
151 period
= pdata
->period
;
152 priv
->rng_ops
.quality
= pdata
->quality
;
155 priv
->period
= ns_to_ktime(period
* NSEC_PER_USEC
);
156 init_completion(&priv
->completion
);
157 hrtimer_init(&priv
->timer
, CLOCK_MONOTONIC
, HRTIMER_MODE_ABS
);
158 priv
->timer
.function
= timeriomem_rng_trigger
;
160 priv
->rng_ops
.name
= dev_name(&pdev
->dev
);
161 priv
->rng_ops
.read
= timeriomem_rng_read
;
163 priv
->io_base
= devm_ioremap_resource(&pdev
->dev
, res
);
164 if (IS_ERR(priv
->io_base
)) {
165 return PTR_ERR(priv
->io_base
);
168 /* Assume random data is already available. */
170 complete(&priv
->completion
);
172 err
= hwrng_register(&priv
->rng_ops
);
174 dev_err(&pdev
->dev
, "problem registering\n");
178 dev_info(&pdev
->dev
, "32bits from 0x%p @ %dus\n",
179 priv
->io_base
, period
);
184 static int timeriomem_rng_remove(struct platform_device
*pdev
)
186 struct timeriomem_rng_private
*priv
= platform_get_drvdata(pdev
);
188 hwrng_unregister(&priv
->rng_ops
);
189 hrtimer_cancel(&priv
->timer
);
194 static const struct of_device_id timeriomem_rng_match
[] = {
195 { .compatible
= "timeriomem_rng" },
198 MODULE_DEVICE_TABLE(of
, timeriomem_rng_match
);
200 static struct platform_driver timeriomem_rng_driver
= {
202 .name
= "timeriomem_rng",
203 .of_match_table
= timeriomem_rng_match
,
205 .probe
= timeriomem_rng_probe
,
206 .remove
= timeriomem_rng_remove
,
209 module_platform_driver(timeriomem_rng_driver
);
211 MODULE_LICENSE("GPL");
212 MODULE_AUTHOR("Alexander Clouter <alex@digriz.org.uk>");
213 MODULE_DESCRIPTION("Timer IOMEM H/W RNG driver");