1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020 MOXA Inc. - https://www.moxa.com/
5 * Author: Johnson Chen <johnsonch.chen@moxa.com>
14 cpu0-supply = <&vdd1_reg>;
18 vbat: vbat-regulator {
19 compatible = "regulator-fixed";
22 /* Power supply provides a fixed 3.3V @3A */
23 vmmcsd_fixed: vmmcsd-regulator {
24 compatible = "regulator-fixed";
25 regulator-name = "vmmcsd_fixed";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
31 buttons: push_button {
32 compatible = "gpio-keys";
38 pinctrl-names = "default";
39 pinctrl-0 = <&minipcie_pins>;
41 minipcie_pins: pinmux_minipcie {
42 pinctrl-single,pins = <
43 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2_24 */
44 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
45 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
49 push_button_pins: pinmux_push_button {
50 pinctrl-single,pins = <
51 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
55 i2c0_pins: pinmux_i2c0_pins {
56 pinctrl-single,pins = <
57 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
58 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
63 i2c1_pins: pinmux_i2c1_pins {
64 pinctrl-single,pins = <
65 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_ctsn.i2c1_sda */
66 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_rtsn.i2c1_scl */
70 uart0_pins: pinmux_uart0_pins {
71 pinctrl-single,pins = <
72 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
73 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
77 uart1_pins: pinmux_uart1_pins {
78 pinctrl-single,pins = <
79 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
80 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
81 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
82 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
86 uart2_pins: pinmux_uart2_pins {
87 pinctrl-single,pins = <
88 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_INPUT, MUX_MODE6) /* lcd_data14.uart5_ctsn */
89 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* lcd_data15.uart5_rtsn */
90 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* lcd_data9.uart5_rxd */
91 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE4) /* lcd_data8.uart5_txd */
95 cpsw_default: cpsw_default {
96 pinctrl-single,pins = <
98 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
99 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
100 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
101 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
102 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
103 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
104 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
105 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
108 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_crs_dv */
109 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rxer */
110 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_txen */
111 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td1 */
112 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td0 */
113 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd1 */
114 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd0 */
115 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE1) /* rmii2_refclk */
120 davinci_mdio_default: davinci_mdio_default {
121 pinctrl-single,pins = <
123 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
124 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
128 mmc0_pins_default: pinmux_mmc0_pins {
129 pinctrl-single,pins = <
130 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
131 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
132 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
133 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
134 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
135 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
136 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
137 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
141 mmc2_pins_default: pinmux_mmc2_pins {
142 pinctrl-single,pins = <
144 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
145 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
146 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
147 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
148 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
149 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
150 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
151 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
152 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
153 AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */
157 spi0_pins: pinmux_spi0 {
158 pinctrl-single,pins = <
159 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
160 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
161 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
162 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
171 pinctrl-names = "default";
172 pinctrl-0 = <&uart0_pins>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&uart1_pins>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&uart2_pins>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&i2c0_pins>;
194 clock-frequency = <400000>;
197 compatible = "ti,tps65910";
202 compatible = "atmel,24c16";
207 rtc_wdt: rtc_wdt@68 {
208 compatible = "dallas,ds1374";
214 pinctrl-names = "default";
215 pinctrl-0 = <&i2c1_pins>;
218 clock-frequency = <400000>;
219 gpio_xten: gpio_xten@27 {
220 compatible = "nxp,pca9535";
236 #include "tps65910.dtsi"
238 vcc1-supply = <&vbat>;
239 vcc2-supply = <&vbat>;
240 vcc3-supply = <&vbat>;
241 vcc4-supply = <&vbat>;
242 vcc5-supply = <&vbat>;
243 vcc6-supply = <&vbat>;
244 vcc7-supply = <&vbat>;
245 vccio-supply = <&vbat>;
248 vrtc_reg: regulator@0 {
252 vio_reg: regulator@1 {
256 vdd1_reg: regulator@2 {
260 vdd2_reg: regulator@3 {
264 vdd3_reg: regulator@4 {
268 vdig1_reg: regulator@5 {
272 vdig2_reg: regulator@6 {
276 vpll_reg: regulator@7 {
280 vdac_reg: regulator@8 {
284 vaux1_reg: regulator@9 {
288 vaux2_reg: regulator@10 {
292 vaux33_reg: regulator@11 {
296 vmmc_reg: regulator@12 {
297 compatible = "regulator-fixed";
298 regulator-name = "vmmc_reg";
299 regulator-min-microvolt = <3300000>;
300 regulator-max-microvolt = <3300000>;
308 regulator-name = "vbat";
309 regulator-min-microvolt = <5000000>;
310 regulator-max-microvolt = <5000000>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&cpsw_default>;
321 pinctrl-names = "default";
322 pinctrl-0 = <&davinci_mdio_default>;
325 ethphy0: ethernet-phy@4 {
329 ethphy1: ethernet-phy@5 {
336 phy-handle = <ðphy0>;
338 dual_emac_res_vlan = <1>;
343 phy-handle = <ðphy1>;
345 dual_emac_res_vlan = <2>;
361 pinctrl-names = "default";
362 vmmc-supply = <&vmmcsd_fixed>;
364 pinctrl-0 = <&mmc0_pins_default>;
365 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
366 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
371 dmas = <&edma_xbar 12 0 1
373 dma-names = "tx", "rx";
374 pinctrl-names = "default";
375 vmmc-supply = <&vmmcsd_fixed>;
377 pinctrl-0 = <&mmc2_pins_default>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&push_button_pins>;
385 #address-cells = <1>;
389 label = "push_button";
390 linux,code = <0x100>;
391 gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&spi0_pins>;
402 compatible = "mx25l6405d";
403 spi-max-frequency = <40000000>;
408 #address-cells = <1>;
411 /* reg : The partition's offset and size within the mtd bank. */
419 reg = <0x80000 0x100000>;
423 label = "U-Boot Env";
424 reg = <0x180000 0x20000>;