arch/arm/boot/dts/am3517.dtsi

   1 /*
   2  * Device Tree Source for am3517 SoC
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include "omap3.dtsi"
  12
  13 /* AM3517 doesn't appear to have the crypto engines defined in omap3.dtsi */
  14 /delete-node/ &aes1_target;
  15 /delete-node/ &aes2_target;
  16
  17 / {
  18         aliases {
  19                 serial3 = &uart4;
  20                 can = &hecc;
  21         };
  22
  23         cpus {
  24                 cpu: cpu@0 {
  25                         /* Based on OMAP3630 variants OPP50 and OPP100 */
  26                         operating-points-v2 = <&cpu0_opp_table>;
  27
  28                         clock-latency = <300000>; /* From legacy driver */
  29                 };
  30         };
  31
  32         cpu0_opp_table: opp-table {
  33                 compatible = "operating-points-v2-ti-cpu";
  34                 syscon = <&scm_conf>;
  35                 /*
  36                  * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
  37                  * appear to operate at 300MHz as well. Since AM3517 only
  38                  * lists one operating voltage, it will remain fixed at 1.2V
  39                  */
  40                 opp50-300000000 {
  41                         opp-hz = /bits/ 64 <300000000>;
  42                         opp-microvolt = <1200000>;
  43                         opp-supported-hw = <0xffffffff 0xffffffff>;
  44                         opp-suspend;
  45                 };
  46
  47                 opp100-600000000 {
  48                         opp-hz = /bits/ 64 <600000000>;
  49                         opp-microvolt = <1200000>;
  50                         opp-supported-hw = <0xffffffff 0xffffffff>;
  51                 };
  52         };
  53
  54         ocp@68000000 {
  55                 am35x_otg_hs: am35x_otg_hs@5c040000 {
  56                         compatible = "ti,omap3-musb";
  57                         ti,hwmods = "am35x_otg_hs";
  58                         status = "disabled";
  59                         reg = <0x5c040000 0x1000>;
  60                         interrupts = <71>;
  61                         interrupt-names = "mc";
  62                 };
  63
  64                 davinci_emac: ethernet@5c000000 {
  65                         compatible = "ti,am3517-emac";
  66                         ti,hwmods = "davinci_emac";
  67                         status = "disabled";
  68                         reg = <0x5c000000 0x30000>;
  69                         interrupts = <67 68 69 70>;
  70                         syscon = <&scm_conf>;
  71                         ti,davinci-ctrl-reg-offset = <0x10000>;
  72                         ti,davinci-ctrl-mod-reg-offset = <0>;
  73                         ti,davinci-ctrl-ram-offset = <0x20000>;
  74                         ti,davinci-ctrl-ram-size = <0x2000>;
  75                         ti,davinci-rmii-en = /bits/ 8 <1>;
  76                         local-mac-address = [ 00 00 00 00 00 00 ];
  77                         clocks = <&emac_ick>;
  78                         clock-names = "ick";
  79                 };
  80
  81                 davinci_mdio: mdio@5c030000 {
  82                         compatible = "ti,davinci_mdio";
  83                         ti,hwmods = "davinci_mdio";
  84                         status = "disabled";
  85                         reg = <0x5c030000 0x1000>;
  86                         bus_freq = <1000000>;
  87                         #address-cells = <1>;
  88                         #size-cells = <0>;
  89                         clocks = <&emac_fck>;
  90                         clock-names = "fck";
  91                 };
  92
  93                 uart4: serial@4809e000 {
  94                         compatible = "ti,omap3-uart";
  95                         ti,hwmods = "uart4";
  96                         status = "disabled";
  97                         reg = <0x4809e000 0x400>;
  98                         interrupts = <84>;
  99                         dmas = <&sdma 55 &sdma 54>;
 100                         dma-names = "tx", "rx";
 101                         clock-frequency = <48000000>;
 102                 };
 103
 104                 omap3_pmx_core2: pinmux@480025d8 {
 105                         compatible = "ti,omap3-padconf", "pinctrl-single";
 106                         reg = <0x480025d8 0x24>;
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         #pinctrl-cells = <1>;
 110                         #interrupt-cells = <1>;
 111                         interrupt-controller;
 112                         pinctrl-single,register-width = <16>;
 113                         pinctrl-single,function-mask = <0xff1f>;
 114                 };
 115
 116                 hecc: can@5c050000 {
 117                         compatible = "ti,am3517-hecc";
 118                         status = "disabled";
 119                         reg = <0x5c050000 0x80>,
 120                               <0x5c053000 0x180>,
 121                               <0x5c052000 0x200>;
 122                         reg-names = "hecc", "hecc-ram", "mbx";
 123                         interrupts = <24>;
 124                         clocks = <&hecc_ck>;
 125                 };
 126
 127                 /*
 128                  * On am3517 the OCP registers do not seem to be accessible
 129                  * similar to the omap34xx. Maybe SGX is permanently set to
 130                  * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
 131                  * write-only at 0x50000e10. We detect SGX based on the SGX
 132                  * revision register instead of the unreadable OCP revision
 133                  * register.
 134                  */
 135                 sgx_module: target-module@50000000 {
 136                         compatible = "ti,sysc-omap2", "ti,sysc";
 137                         reg = <0x50000014 0x4>;
 138                         reg-names = "rev";
 139                         clocks = <&sgx_fck>, <&sgx_ick>;
 140                         clock-names = "fck", "ick";
 141                         #address-cells = <1>;
 142                         #size-cells = <1>;
 143                         ranges = <0 0x50000000 0x4000>;
 144
 145                         /*
 146                          * Closed source PowerVR driver, no child device
 147                          * binding or driver in mainline
 148                          */
 149                 };
 150         };
 151 };
 152
 153 /* Not currently working, probably needs at least different clocks */
 154 &rng_target {
 155         status = "disabled";
 156         /delete-property/ clocks;
 157 };
 158
 159 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
 160 &usb_otg_hs {
 161         status = "disabled";
 162 };
 163
 164 &iva {
 165         status = "disabled";
 166 };
 167
 168 &mailbox {
 169         status = "disabled";
 170 };
 171
 172 &mmu_isp {
 173         status = "disabled";
 174 };
 175
 176 #include "am35xx-clocks.dtsi"
 177 #include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
 178
 179 /* Preferred always-on timer for clocksource */
 180 &timer1_target {
 181         ti,no-reset-on-init;
 182         ti,no-idle;
 183         timer@0 {
 184                 assigned-clocks = <&gpt1_fck>;
 185                 assigned-clock-parents = <&sys_ck>;
 186         };
 187 };
 188
 189 /* Preferred timer for clockevent */
 190 &timer2_target {
 191         ti,no-reset-on-init;
 192         ti,no-idle;
 193         timer@0 {
 194                 assigned-clocks = <&gpt2_fck>;
 195                 assigned-clock-parents = <&sys_ck>;
 196         };
 197 };