| blob | 810b0676ab03370687bdf5cb096ae7459f18c1c2 |
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright 2019 IBM Corp.
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
8 / {
9 model = "Aspeed BMC";
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
15 aliases {
16 i2c0 = &i2c0;
17 i2c1 = &i2c1;
18 i2c2 = &i2c2;
19 i2c3 = &i2c3;
20 i2c4 = &i2c4;
21 i2c5 = &i2c5;
22 i2c6 = &i2c6;
23 i2c7 = &i2c7;
24 i2c8 = &i2c8;
25 i2c9 = &i2c9;
26 i2c10 = &i2c10;
27 i2c11 = &i2c11;
28 i2c12 = &i2c12;
29 i2c13 = &i2c13;
30 i2c14 = &i2c14;
31 i2c15 = &i2c15;
32 serial0 = &uart1;
33 serial1 = &uart2;
34 serial2 = &uart3;
35 serial3 = &uart4;
36 serial4 = &uart5;
37 serial5 = &vuart1;
38 serial6 = &vuart2;
39 };
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
47 cpu@f00 {
48 compatible = "arm,cortex-a7";
49 device_type = "cpu";
50 reg = <0xf00>;
51 };
53 cpu@f01 {
54 compatible = "arm,cortex-a7";
55 device_type = "cpu";
56 reg = <0xf01>;
57 };
58 };
60 timer {
61 compatible = "arm,armv7-timer";
62 interrupt-parent = <&gic>;
63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67 clocks = <&syscon ASPEED_CLK_HPLL>;
68 arm,cpu-registers-not-fw-configured;
69 always-on;
70 };
72 edac: sdram@1e6e0000 {
73 compatible = "aspeed,ast2600-sdram-edac", "syscon";
74 reg = <0x1e6e0000 0x174>;
75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
76 };
78 ahb {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 device_type = "soc";
83 ranges;
85 gic: interrupt-controller@40461000 {
86 compatible = "arm,cortex-a7-gic";
87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
88 #interrupt-cells = <3>;
89 interrupt-controller;
90 interrupt-parent = <&gic>;
91 reg = <0x40461000 0x1000>,
92 <0x40462000 0x1000>,
93 <0x40464000 0x2000>,
94 <0x40466000 0x2000>;
95 };
97 fmc: spi@1e620000 {
98 reg = < 0x1e620000 0xc4
99 0x20000000 0x10000000 >;
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "aspeed,ast2600-fmc";
103 clocks = <&syscon ASPEED_CLK_AHB>;
104 status = "disabled";
105 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
106 flash@0 {
107 reg = < 0 >;
108 compatible = "jedec,spi-nor";
109 spi-max-frequency = <50000000>;
110 status = "disabled";
111 };
112 flash@1 {
113 reg = < 1 >;
114 compatible = "jedec,spi-nor";
115 spi-max-frequency = <50000000>;
116 status = "disabled";
117 };
118 flash@2 {
119 reg = < 2 >;
120 compatible = "jedec,spi-nor";
121 spi-max-frequency = <50000000>;
122 status = "disabled";
123 };
124 };
126 spi1: spi@1e630000 {
127 reg = < 0x1e630000 0xc4
128 0x30000000 0x10000000 >;
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "aspeed,ast2600-spi";
132 clocks = <&syscon ASPEED_CLK_AHB>;
133 status = "disabled";
134 flash@0 {
135 reg = < 0 >;
136 compatible = "jedec,spi-nor";
137 spi-max-frequency = <50000000>;
138 status = "disabled";
139 };
140 flash@1 {
141 reg = < 1 >;
142 compatible = "jedec,spi-nor";
143 spi-max-frequency = <50000000>;
144 status = "disabled";
145 };
146 };
148 spi2: spi@1e631000 {
149 reg = < 0x1e631000 0xc4
150 0x50000000 0x10000000 >;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 compatible = "aspeed,ast2600-spi";
154 clocks = <&syscon ASPEED_CLK_AHB>;
155 status = "disabled";
156 flash@0 {
157 reg = < 0 >;
158 compatible = "jedec,spi-nor";
159 spi-max-frequency = <50000000>;
160 status = "disabled";
161 };
162 flash@1 {
163 reg = < 1 >;
164 compatible = "jedec,spi-nor";
165 spi-max-frequency = <50000000>;
166 status = "disabled";
167 };
168 flash@2 {
169 reg = < 2 >;
170 compatible = "jedec,spi-nor";
171 spi-max-frequency = <50000000>;
172 status = "disabled";
173 };
174 };
176 mdio0: mdio@1e650000 {
177 compatible = "aspeed,ast2600-mdio";
178 reg = <0x1e650000 0x8>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 status = "disabled";
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_mdio1_default>;
184 };
186 mdio1: mdio@1e650008 {
187 compatible = "aspeed,ast2600-mdio";
188 reg = <0x1e650008 0x8>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 status = "disabled";
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_mdio2_default>;
194 };
196 mdio2: mdio@1e650010 {
197 compatible = "aspeed,ast2600-mdio";
198 reg = <0x1e650010 0x8>;
199 #address-cells = <1>;
200 #size-cells = <0>;
201 status = "disabled";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_mdio3_default>;
204 };
206 mdio3: mdio@1e650018 {
207 compatible = "aspeed,ast2600-mdio";
208 reg = <0x1e650018 0x8>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 status = "disabled";
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_mdio4_default>;
214 };
216 mac0: ftgmac@1e660000 {
217 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
218 reg = <0x1e660000 0x180>;
219 #address-cells = <1>;
220 #size-cells = <0>;
221 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
223 status = "disabled";
224 };
226 mac1: ftgmac@1e680000 {
227 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
228 reg = <0x1e680000 0x180>;
229 #address-cells = <1>;
230 #size-cells = <0>;
231 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
232 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
233 status = "disabled";
234 };
236 mac2: ftgmac@1e670000 {
237 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
238 reg = <0x1e670000 0x180>;
239 #address-cells = <1>;
240 #size-cells = <0>;
241 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
242 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
243 status = "disabled";
244 };
246 mac3: ftgmac@1e690000 {
247 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
248 reg = <0x1e690000 0x180>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
253 status = "disabled";
254 };
256 ehci0: usb@1e6a1000 {
257 compatible = "aspeed,ast2600-ehci", "generic-ehci";
258 reg = <0x1e6a1000 0x100>;
259 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
260 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_usb2ah_default>;
263 status = "disabled";
264 };
266 ehci1: usb@1e6a3000 {
267 compatible = "aspeed,ast2600-ehci", "generic-ehci";
268 reg = <0x1e6a3000 0x100>;
269 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_usb2bh_default>;
273 status = "disabled";
274 };
276 uhci: usb@1e6b0000 {
277 compatible = "aspeed,ast2600-uhci", "generic-uhci";
278 reg = <0x1e6b0000 0x100>;
279 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
280 #ports = <2>;
281 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
282 status = "disabled";
283 /*
284 * No default pinmux, it will follow EHCI, use an
285 * explicit pinmux override if EHCI is not enabled.
286 */
287 };
289 vhub: usb-vhub@1e6a0000 {
290 compatible = "aspeed,ast2600-usb-vhub";
291 reg = <0x1e6a0000 0x350>;
292 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
294 aspeed,vhub-downstream-ports = <7>;
295 aspeed,vhub-generic-endpoints = <21>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_usb2ad_default>;
298 status = "disabled";
299 };
301 apb {
302 compatible = "simple-bus";
303 #address-cells = <1>;
304 #size-cells = <1>;
305 ranges;
307 syscon: syscon@1e6e2000 {
308 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
309 reg = <0x1e6e2000 0x1000>;
310 ranges = <0 0x1e6e2000 0x1000>;
311 #address-cells = <1>;
312 #size-cells = <1>;
313 #clock-cells = <1>;
314 #reset-cells = <1>;
316 pinctrl: pinctrl {
317 compatible = "aspeed,ast2600-pinctrl";
318 };
320 silicon-id@14 {
321 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
322 reg = <0x14 0x4 0x5b0 0x8>;
323 };
325 smp-memram@180 {
326 compatible = "aspeed,ast2600-smpmem";
327 reg = <0x180 0x40>;
328 };
330 scu_ic0: interrupt-controller@560 {
331 #interrupt-cells = <1>;
332 compatible = "aspeed,ast2600-scu-ic0";
333 reg = <0x560 0x4>;
334 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-controller;
336 };
338 scu_ic1: interrupt-controller@570 {
339 #interrupt-cells = <1>;
340 compatible = "aspeed,ast2600-scu-ic1";
341 reg = <0x570 0x4>;
342 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
343 interrupt-controller;
344 };
345 };
347 rng: hwrng@1e6e2524 {
348 compatible = "timeriomem_rng";
349 reg = <0x1e6e2524 0x4>;
350 period = <1>;
351 quality = <100>;
352 };
354 xdma: xdma@1e6e7000 {
355 compatible = "aspeed,ast2600-xdma";
356 reg = <0x1e6e7000 0x100>;
357 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
358 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
359 reset-names = "device", "root-complex";
360 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
361 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
362 aspeed,pcie-device = "bmc";
363 aspeed,scu = <&syscon>;
364 status = "disabled";
365 };
367 gpio0: gpio@1e780000 {
368 #gpio-cells = <2>;
369 gpio-controller;
370 compatible = "aspeed,ast2600-gpio";
371 reg = <0x1e780000 0x400>;
372 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
373 gpio-ranges = <&pinctrl 0 0 208>;
374 ngpios = <208>;
375 clocks = <&syscon ASPEED_CLK_APB2>;
376 interrupt-controller;
377 #interrupt-cells = <2>;
378 };
380 gpio1: gpio@1e780800 {
381 #gpio-cells = <2>;
382 gpio-controller;
383 compatible = "aspeed,ast2600-gpio";
384 reg = <0x1e780800 0x800>;
385 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
386 gpio-ranges = <&pinctrl 0 208 36>;
387 ngpios = <36>;
388 clocks = <&syscon ASPEED_CLK_APB1>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
391 };
393 rtc: rtc@1e781000 {
394 compatible = "aspeed,ast2600-rtc";
395 reg = <0x1e781000 0x18>;
396 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
397 status = "disabled";
398 };
400 timer: timer@1e782000 {
401 compatible = "aspeed,ast2600-timer";
402 reg = <0x1e782000 0x90>;
403 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
404 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
405 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
406 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
407 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
408 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
409 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
410 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
411 clocks = <&syscon ASPEED_CLK_APB1>;
412 clock-names = "PCLK";
413 status = "disabled";
414 };
416 uart1: serial@1e783000 {
417 compatible = "ns16550a";
418 reg = <0x1e783000 0x20>;
419 reg-shift = <2>;
420 reg-io-width = <4>;
421 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
423 resets = <&lpc_reset 4>;
424 no-loopback-test;
425 pinctrl-names = "default";
426 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
427 status = "disabled";
428 };
430 uart5: serial@1e784000 {
431 compatible = "ns16550a";
432 reg = <0x1e784000 0x1000>;
433 reg-shift = <2>;
434 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
435 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
436 no-loopback-test;
437 };
439 wdt1: watchdog@1e785000 {
440 compatible = "aspeed,ast2600-wdt";
441 reg = <0x1e785000 0x40>;
442 };
444 wdt2: watchdog@1e785040 {
445 compatible = "aspeed,ast2600-wdt";
446 reg = <0x1e785040 0x40>;
447 status = "disabled";
448 };
450 wdt3: watchdog@1e785080 {
451 compatible = "aspeed,ast2600-wdt";
452 reg = <0x1e785080 0x40>;
453 status = "disabled";
454 };
456 wdt4: watchdog@1e7850c0 {
457 compatible = "aspeed,ast2600-wdt";
458 reg = <0x1e7850C0 0x40>;
459 status = "disabled";
460 };
462 lpc: lpc@1e789000 {
463 compatible = "aspeed,ast2600-lpc", "simple-mfd";
464 reg = <0x1e789000 0x1000>;
466 #address-cells = <1>;
467 #size-cells = <1>;
468 ranges = <0x0 0x1e789000 0x1000>;
470 lpc_bmc: lpc-bmc@0 {
471 compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
472 reg = <0x0 0x80>;
473 reg-io-width = <4>;
475 #address-cells = <1>;
476 #size-cells = <1>;
477 ranges = <0x0 0x0 0x80>;
479 kcs1: kcs@24 {
480 compatible = "aspeed,ast2500-kcs-bmc-v2";
481 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
482 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
483 kcs_chan = <1>;
484 status = "disabled";
485 };
486 kcs2: kcs@28 {
487 compatible = "aspeed,ast2500-kcs-bmc-v2";
488 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
489 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
490 status = "disabled";
491 };
492 kcs3: kcs@2c {
493 compatible = "aspeed,ast2500-kcs-bmc-v2";
494 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
495 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
496 status = "disabled";
497 };
498 };
500 lpc_host: lpc-host@80 {
501 compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
502 reg = <0x80 0x1e0>;
503 reg-io-width = <4>;
505 #address-cells = <1>;
506 #size-cells = <1>;
507 ranges = <0x0 0x80 0x1e0>;
509 kcs4: kcs@94 {
510 compatible = "aspeed,ast2500-kcs-bmc-v2";
511 reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
512 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
513 status = "disabled";
514 };
516 lpc_ctrl: lpc-ctrl@0 {
517 compatible = "aspeed,ast2600-lpc-ctrl";
518 reg = <0x0 0x80>;
519 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
520 status = "disabled";
521 };
523 lpc_snoop: lpc-snoop@0 {
524 compatible = "aspeed,ast2600-lpc-snoop";
525 reg = <0x0 0x80>;
526 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
527 status = "disabled";
528 };
530 lhc: lhc@20 {
531 compatible = "aspeed,ast2600-lhc";
532 reg = <0x20 0x24 0x48 0x8>;
533 };
535 lpc_reset: reset-controller@18 {
536 compatible = "aspeed,ast2600-lpc-reset";
537 reg = <0x18 0x4>;
538 #reset-cells = <1>;
539 };
541 ibt: ibt@c0 {
542 compatible = "aspeed,ast2600-ibt-bmc";
543 reg = <0xc0 0x18>;
544 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
545 status = "disabled";
546 };
547 };
548 };
550 sdc: sdc@1e740000 {
551 compatible = "aspeed,ast2600-sd-controller";
552 reg = <0x1e740000 0x100>;
553 #address-cells = <1>;
554 #size-cells = <1>;
555 ranges = <0 0x1e740000 0x10000>;
556 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
557 status = "disabled";
559 sdhci0: sdhci@1e740100 {
560 compatible = "aspeed,ast2600-sdhci", "sdhci";
561 reg = <0x100 0x100>;
562 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
563 sdhci,auto-cmd12;
564 clocks = <&syscon ASPEED_CLK_SDIO>;
565 status = "disabled";
566 };
568 sdhci1: sdhci@1e740200 {
569 compatible = "aspeed,ast2600-sdhci", "sdhci";
570 reg = <0x200 0x100>;
571 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
572 sdhci,auto-cmd12;
573 clocks = <&syscon ASPEED_CLK_SDIO>;
574 status = "disabled";
575 };
576 };
578 emmc_controller: sdc@1e750000 {
579 compatible = "aspeed,ast2600-sd-controller";
580 reg = <0x1e750000 0x100>;
581 #address-cells = <1>;
582 #size-cells = <1>;
583 ranges = <0 0x1e750000 0x10000>;
584 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
585 status = "disabled";
587 emmc: sdhci@1e750100 {
588 compatible = "aspeed,ast2600-sdhci";
589 reg = <0x100 0x100>;
590 sdhci,auto-cmd12;
591 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&syscon ASPEED_CLK_EMMC>;
593 pinctrl-names = "default";
594 pinctrl-0 = <&pinctrl_emmc_default>;
595 };
596 };
598 vuart1: serial@1e787000 {
599 compatible = "aspeed,ast2500-vuart";
600 reg = <0x1e787000 0x40>;
601 reg-shift = <2>;
602 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
603 clocks = <&syscon ASPEED_CLK_APB1>;
604 no-loopback-test;
605 status = "disabled";
606 };
608 vuart2: serial@1e788000 {
609 compatible = "aspeed,ast2500-vuart";
610 reg = <0x1e788000 0x40>;
611 reg-shift = <2>;
612 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&syscon ASPEED_CLK_APB1>;
614 no-loopback-test;
615 status = "disabled";
616 };
618 uart2: serial@1e78d000 {
619 compatible = "ns16550a";
620 reg = <0x1e78d000 0x20>;
621 reg-shift = <2>;
622 reg-io-width = <4>;
623 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
625 resets = <&lpc_reset 5>;
626 no-loopback-test;
627 pinctrl-names = "default";
628 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
629 status = "disabled";
630 };
632 uart3: serial@1e78e000 {
633 compatible = "ns16550a";
634 reg = <0x1e78e000 0x20>;
635 reg-shift = <2>;
636 reg-io-width = <4>;
637 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
638 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
639 resets = <&lpc_reset 6>;
640 no-loopback-test;
641 pinctrl-names = "default";
642 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
643 status = "disabled";
644 };
646 uart4: serial@1e78f000 {
647 compatible = "ns16550a";
648 reg = <0x1e78f000 0x20>;
649 reg-shift = <2>;
650 reg-io-width = <4>;
651 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
652 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
653 resets = <&lpc_reset 7>;
654 no-loopback-test;
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
657 status = "disabled";
658 };
660 i2c: bus@1e78a000 {
661 compatible = "simple-bus";
662 #address-cells = <1>;
663 #size-cells = <1>;
664 ranges = <0 0x1e78a000 0x1000>;
665 };
667 fsim0: fsi@1e79b000 {
668 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
669 reg = <0x1e79b000 0x94>;
670 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_fsi1_default>;
673 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
674 status = "disabled";
675 };
677 fsim1: fsi@1e79b100 {
678 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
679 reg = <0x1e79b100 0x94>;
680 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
681 pinctrl-names = "default";
682 pinctrl-0 = <&pinctrl_fsi2_default>;
683 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
684 status = "disabled";
685 };
686 };
687 };
688 };
690 #include "aspeed-g6-pinctrl.dtsi"
692 &i2c {
693 i2c0: i2c-bus@80 {
694 #address-cells = <1>;
695 #size-cells = <0>;
696 #interrupt-cells = <1>;
697 reg = <0x80 0x80>;
698 compatible = "aspeed,ast2600-i2c-bus";
699 clocks = <&syscon ASPEED_CLK_APB2>;
700 resets = <&syscon ASPEED_RESET_I2C>;
701 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
702 bus-frequency = <100000>;
703 pinctrl-names = "default";
704 pinctrl-0 = <&pinctrl_i2c1_default>;
705 status = "disabled";
706 };
708 i2c1: i2c-bus@100 {
709 #address-cells = <1>;
710 #size-cells = <0>;
711 #interrupt-cells = <1>;
712 reg = <0x100 0x80>;
713 compatible = "aspeed,ast2600-i2c-bus";
714 clocks = <&syscon ASPEED_CLK_APB2>;
715 resets = <&syscon ASPEED_RESET_I2C>;
716 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
717 bus-frequency = <100000>;
718 pinctrl-names = "default";
719 pinctrl-0 = <&pinctrl_i2c2_default>;
720 status = "disabled";
721 };
723 i2c2: i2c-bus@180 {
724 #address-cells = <1>;
725 #size-cells = <0>;
726 #interrupt-cells = <1>;
727 reg = <0x180 0x80>;
728 compatible = "aspeed,ast2600-i2c-bus";
729 clocks = <&syscon ASPEED_CLK_APB2>;
730 resets = <&syscon ASPEED_RESET_I2C>;
731 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
732 bus-frequency = <100000>;
733 pinctrl-names = "default";
734 pinctrl-0 = <&pinctrl_i2c3_default>;
735 status = "disabled";
736 };
738 i2c3: i2c-bus@200 {
739 #address-cells = <1>;
740 #size-cells = <0>;
741 #interrupt-cells = <1>;
742 reg = <0x200 0x80>;
743 compatible = "aspeed,ast2600-i2c-bus";
744 clocks = <&syscon ASPEED_CLK_APB2>;
745 resets = <&syscon ASPEED_RESET_I2C>;
746 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
747 bus-frequency = <100000>;
748 pinctrl-names = "default";
749 pinctrl-0 = <&pinctrl_i2c4_default>;
750 status = "disabled";
751 };
753 i2c4: i2c-bus@280 {
754 #address-cells = <1>;
755 #size-cells = <0>;
756 #interrupt-cells = <1>;
757 reg = <0x280 0x80>;
758 compatible = "aspeed,ast2600-i2c-bus";
759 clocks = <&syscon ASPEED_CLK_APB2>;
760 resets = <&syscon ASPEED_RESET_I2C>;
761 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
762 bus-frequency = <100000>;
763 pinctrl-names = "default";
764 pinctrl-0 = <&pinctrl_i2c5_default>;
765 status = "disabled";
766 };
768 i2c5: i2c-bus@300 {
769 #address-cells = <1>;
770 #size-cells = <0>;
771 #interrupt-cells = <1>;
772 reg = <0x300 0x80>;
773 compatible = "aspeed,ast2600-i2c-bus";
774 clocks = <&syscon ASPEED_CLK_APB2>;
775 resets = <&syscon ASPEED_RESET_I2C>;
776 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
777 bus-frequency = <100000>;
778 pinctrl-names = "default";
779 pinctrl-0 = <&pinctrl_i2c6_default>;
780 status = "disabled";
781 };
783 i2c6: i2c-bus@380 {
784 #address-cells = <1>;
785 #size-cells = <0>;
786 #interrupt-cells = <1>;
787 reg = <0x380 0x80>;
788 compatible = "aspeed,ast2600-i2c-bus";
789 clocks = <&syscon ASPEED_CLK_APB2>;
790 resets = <&syscon ASPEED_RESET_I2C>;
791 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
792 bus-frequency = <100000>;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_i2c7_default>;
795 status = "disabled";
796 };
798 i2c7: i2c-bus@400 {
799 #address-cells = <1>;
800 #size-cells = <0>;
801 #interrupt-cells = <1>;
802 reg = <0x400 0x80>;
803 compatible = "aspeed,ast2600-i2c-bus";
804 clocks = <&syscon ASPEED_CLK_APB2>;
805 resets = <&syscon ASPEED_RESET_I2C>;
806 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
807 bus-frequency = <100000>;
808 pinctrl-names = "default";
809 pinctrl-0 = <&pinctrl_i2c8_default>;
810 status = "disabled";
811 };
813 i2c8: i2c-bus@480 {
814 #address-cells = <1>;
815 #size-cells = <0>;
816 #interrupt-cells = <1>;
817 reg = <0x480 0x80>;
818 compatible = "aspeed,ast2600-i2c-bus";
819 clocks = <&syscon ASPEED_CLK_APB2>;
820 resets = <&syscon ASPEED_RESET_I2C>;
821 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
822 bus-frequency = <100000>;
823 pinctrl-names = "default";
824 pinctrl-0 = <&pinctrl_i2c9_default>;
825 status = "disabled";
826 };
828 i2c9: i2c-bus@500 {
829 #address-cells = <1>;
830 #size-cells = <0>;
831 #interrupt-cells = <1>;
832 reg = <0x500 0x80>;
833 compatible = "aspeed,ast2600-i2c-bus";
834 clocks = <&syscon ASPEED_CLK_APB2>;
835 resets = <&syscon ASPEED_RESET_I2C>;
836 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
837 bus-frequency = <100000>;
838 pinctrl-names = "default";
839 pinctrl-0 = <&pinctrl_i2c10_default>;
840 status = "disabled";
841 };
843 i2c10: i2c-bus@580 {
844 #address-cells = <1>;
845 #size-cells = <0>;
846 #interrupt-cells = <1>;
847 reg = <0x580 0x80>;
848 compatible = "aspeed,ast2600-i2c-bus";
849 clocks = <&syscon ASPEED_CLK_APB2>;
850 resets = <&syscon ASPEED_RESET_I2C>;
851 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
852 bus-frequency = <100000>;
853 pinctrl-names = "default";
854 pinctrl-0 = <&pinctrl_i2c11_default>;
855 status = "disabled";
856 };
858 i2c11: i2c-bus@600 {
859 #address-cells = <1>;
860 #size-cells = <0>;
861 #interrupt-cells = <1>;
862 reg = <0x600 0x80>;
863 compatible = "aspeed,ast2600-i2c-bus";
864 clocks = <&syscon ASPEED_CLK_APB2>;
865 resets = <&syscon ASPEED_RESET_I2C>;
866 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
867 bus-frequency = <100000>;
868 pinctrl-names = "default";
869 pinctrl-0 = <&pinctrl_i2c12_default>;
870 status = "disabled";
871 };
873 i2c12: i2c-bus@680 {
874 #address-cells = <1>;
875 #size-cells = <0>;
876 #interrupt-cells = <1>;
877 reg = <0x680 0x80>;
878 compatible = "aspeed,ast2600-i2c-bus";
879 clocks = <&syscon ASPEED_CLK_APB2>;
880 resets = <&syscon ASPEED_RESET_I2C>;
881 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
882 bus-frequency = <100000>;
883 pinctrl-names = "default";
884 pinctrl-0 = <&pinctrl_i2c13_default>;
885 status = "disabled";
886 };
888 i2c13: i2c-bus@700 {
889 #address-cells = <1>;
890 #size-cells = <0>;
891 #interrupt-cells = <1>;
892 reg = <0x700 0x80>;
893 compatible = "aspeed,ast2600-i2c-bus";
894 clocks = <&syscon ASPEED_CLK_APB2>;
895 resets = <&syscon ASPEED_RESET_I2C>;
896 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
897 bus-frequency = <100000>;
898 pinctrl-names = "default";
899 pinctrl-0 = <&pinctrl_i2c14_default>;
900 status = "disabled";
901 };
903 i2c14: i2c-bus@780 {
904 #address-cells = <1>;
905 #size-cells = <0>;
906 #interrupt-cells = <1>;
907 reg = <0x780 0x80>;
908 compatible = "aspeed,ast2600-i2c-bus";
909 clocks = <&syscon ASPEED_CLK_APB2>;
910 resets = <&syscon ASPEED_RESET_I2C>;
911 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
912 bus-frequency = <100000>;
913 pinctrl-names = "default";
914 pinctrl-0 = <&pinctrl_i2c15_default>;
915 status = "disabled";
916 };
918 i2c15: i2c-bus@800 {
919 #address-cells = <1>;
920 #size-cells = <0>;
921 #interrupt-cells = <1>;
922 reg = <0x800 0x80>;
923 compatible = "aspeed,ast2600-i2c-bus";
924 clocks = <&syscon ASPEED_CLK_APB2>;
925 resets = <&syscon ASPEED_RESET_I2C>;
926 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
927 bus-frequency = <100000>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&pinctrl_i2c16_default>;
930 status = "disabled";
931 };
932 };