| blob | 7adc36ca8a467572f18612f7cf4ff14321ab4735 |
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 */
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
39 cpu@0 {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 reg = <0>;
43 };
44 };
46 memory@20000000 {
47 device_type = "memory";
48 reg = <0x20000000 0x08000000>;
49 };
51 clocks {
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63 };
65 sram: sram@300000 {
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x28000>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ranges = <0 0x00300000 0x28000>;
71 };
73 ahb {
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
79 usb0: ohci@500000 {
80 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
81 reg = <0x00500000 0x100000>;
82 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
83 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
84 clock-names = "ohci_clk", "hclk", "uhpck";
85 status = "disabled";
86 };
88 fb0: fb@600000 {
89 compatible = "atmel,at91sam9261-lcdc";
90 reg = <0x00600000 0x1000>;
91 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_fb>;
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
95 clock-names = "lcdc_clk", "hclk";
96 status = "disabled";
97 };
99 ebi: ebi@10000000 {
100 compatible = "atmel,at91sam9261-ebi";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 atmel,smc = <&smc>;
104 atmel,matrix = <&matrix>;
105 reg = <0x10000000 0x80000000>;
106 ranges = <0x0 0x0 0x10000000 0x10000000
107 0x1 0x0 0x20000000 0x10000000
108 0x2 0x0 0x30000000 0x10000000
109 0x3 0x0 0x40000000 0x10000000
110 0x4 0x0 0x50000000 0x10000000
111 0x5 0x0 0x60000000 0x10000000
112 0x6 0x0 0x70000000 0x10000000
113 0x7 0x0 0x80000000 0x10000000>;
114 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
115 status = "disabled";
117 nand_controller: nand-controller {
118 compatible = "atmel,at91sam9261-nand-controller";
119 #address-cells = <2>;
120 #size-cells = <1>;
121 ranges;
122 status = "disabled";
123 };
124 };
126 apb {
127 compatible = "simple-bus";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges;
132 tcb0: timer@fffa0000 {
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 reg = <0xfffa0000 0x100>;
137 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
138 <18 IRQ_TYPE_LEVEL_HIGH 0>,
139 <19 IRQ_TYPE_LEVEL_HIGH 0>;
140 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
142 };
144 usb1: gadget@fffa4000 {
145 compatible = "atmel,at91sam9261-udc";
146 reg = <0xfffa4000 0x4000>;
147 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
149 clock-names = "pclk", "hclk";
150 atmel,matrix = <&matrix>;
151 status = "disabled";
152 };
154 mmc0: mmc@fffa8000 {
155 compatible = "atmel,hsmci";
156 reg = <0xfffa8000 0x600>;
157 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
163 clock-names = "mci_clk";
164 status = "disabled";
165 };
167 i2c0: i2c@fffac000 {
168 compatible = "atmel,at91sam9261-i2c";
169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_i2c_twi>;
171 reg = <0xfffac000 0x100>;
172 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
176 status = "disabled";
177 };
179 usart0: serial@fffb0000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfffb0000 0x200>;
182 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_usart0>;
187 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
188 clock-names = "usart";
189 status = "disabled";
190 };
192 usart1: serial@fffb4000 {
193 compatible = "atmel,at91sam9260-usart";
194 reg = <0xfffb4000 0x200>;
195 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
196 atmel,use-dma-rx;
197 atmel,use-dma-tx;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usart1>;
200 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
201 clock-names = "usart";
202 status = "disabled";
203 };
205 usart2: serial@fffb8000{
206 compatible = "atmel,at91sam9260-usart";
207 reg = <0xfffb8000 0x200>;
208 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
209 atmel,use-dma-rx;
210 atmel,use-dma-tx;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_usart2>;
213 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
214 clock-names = "usart";
215 status = "disabled";
216 };
218 ssc0: ssc@fffbc000 {
219 compatible = "atmel,at91rm9200-ssc";
220 reg = <0xfffbc000 0x4000>;
221 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
224 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
225 clock-names = "pclk";
226 status = "disabled";
227 };
229 ssc1: ssc@fffc0000 {
230 compatible = "atmel,at91rm9200-ssc";
231 reg = <0xfffc0000 0x4000>;
232 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
235 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
236 clock-names = "pclk";
237 status = "disabled";
238 };
240 ssc2: ssc@fffc4000 {
241 compatible = "atmel,at91rm9200-ssc";
242 reg = <0xfffc4000 0x4000>;
243 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
246 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
247 clock-names = "pclk";
248 status = "disabled";
249 };
251 spi0: spi@fffc8000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "atmel,at91rm9200-spi";
255 reg = <0xfffc8000 0x200>;
256 cs-gpios = <0>, <0>, <0>, <0>;
257 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_spi0>;
260 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
261 clock-names = "spi_clk";
262 status = "disabled";
263 };
265 spi1: spi@fffcc000 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "atmel,at91rm9200-spi";
269 reg = <0xfffcc000 0x200>;
270 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_spi1>;
273 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
274 clock-names = "spi_clk";
275 status = "disabled";
276 };
278 ramc: ramc@ffffea00 {
279 compatible = "atmel,at91sam9260-sdramc";
280 reg = <0xffffea00 0x200>;
281 };
283 smc: smc@ffffec00 {
284 compatible = "atmel,at91sam9260-smc", "syscon";
285 reg = <0xffffec00 0x200>;
286 };
288 matrix: matrix@ffffee00 {
289 compatible = "atmel,at91sam9261-matrix", "syscon";
290 reg = <0xffffee00 0x200>;
291 };
293 aic: interrupt-controller@fffff000 {
294 #interrupt-cells = <3>;
295 compatible = "atmel,at91rm9200-aic";
296 interrupt-controller;
297 reg = <0xfffff000 0x200>;
298 atmel,external-irqs = <29 30 31>;
299 };
301 dbgu: serial@fffff200 {
302 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
303 reg = <0xfffff200 0x200>;
304 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_dbgu>;
307 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
308 clock-names = "usart";
309 status = "disabled";
310 };
312 pinctrl@fffff400 {
313 #address-cells = <1>;
314 #size-cells = <1>;
315 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
316 ranges = <0xfffff400 0xfffff400 0x600>;
318 atmel,mux-mask =
319 /* A B */
320 <0xffffffff 0xfffffff7>, /* pioA */
321 <0xffffffff 0xfffffff4>, /* pioB */
322 <0xffffffff 0xffffff07>; /* pioC */
324 /* shared pinctrl settings */
325 dbgu {
326 pinctrl_dbgu: dbgu-0 {
327 atmel,pins =
328 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
329 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
330 };
331 };
333 usart0 {
334 pinctrl_usart0: usart0-0 {
335 atmel,pins =
336 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
337 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
338 };
340 pinctrl_usart0_rts: usart0_rts-0 {
341 atmel,pins =
342 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 };
345 pinctrl_usart0_cts: usart0_cts-0 {
346 atmel,pins =
347 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349 };
351 usart1 {
352 pinctrl_usart1: usart1-0 {
353 atmel,pins =
354 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
355 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
356 };
358 pinctrl_usart1_rts: usart1_rts-0 {
359 atmel,pins =
360 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
363 pinctrl_usart1_cts: usart1_cts-0 {
364 atmel,pins =
365 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367 };
369 usart2 {
370 pinctrl_usart2: usart2-0 {
371 atmel,pins =
372 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
373 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
374 };
376 pinctrl_usart2_rts: usart2_rts-0 {
377 atmel,pins =
378 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
381 pinctrl_usart2_cts: usart2_cts-0 {
382 atmel,pins =
383 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 };
385 };
387 nand {
388 pinctrl_nand_rb: nand-rb-0 {
389 atmel,pins =
390 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
391 };
393 pinctrl_nand_cs: nand-cs-0 {
394 atmel,pins =
395 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
396 };
397 };
399 mmc0 {
400 pinctrl_mmc0_clk: mmc0_clk-0 {
401 atmel,pins =
402 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
405 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
406 atmel,pins =
407 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
408 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
409 };
411 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
412 atmel,pins =
413 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
414 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
415 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
416 };
417 };
419 ssc0 {
420 pinctrl_ssc0_tx: ssc0_tx-0 {
421 atmel,pins =
422 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
423 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
424 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
427 pinctrl_ssc0_rx: ssc0_rx-0 {
428 atmel,pins =
429 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
430 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433 };
435 ssc1 {
436 pinctrl_ssc1_tx: ssc1_tx-0 {
437 atmel,pins =
438 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
439 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
440 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
443 pinctrl_ssc1_rx: ssc1_rx-0 {
444 atmel,pins =
445 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
446 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
447 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 };
449 };
451 ssc2 {
452 pinctrl_ssc2_tx: ssc2_tx-0 {
453 atmel,pins =
454 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
457 };
459 pinctrl_ssc2_rx: ssc2_rx-0 {
460 atmel,pins =
461 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465 };
467 spi0 {
468 pinctrl_spi0: spi0-0 {
469 atmel,pins =
470 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
471 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
473 };
474 };
476 spi1 {
477 pinctrl_spi1: spi1-0 {
478 atmel,pins =
479 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
480 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
481 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
482 };
483 };
485 tcb0 {
486 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
487 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
490 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
491 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
494 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
495 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
498 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
499 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
502 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
503 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
504 };
506 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
507 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
508 };
510 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
511 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
512 };
514 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
515 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
516 };
518 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
519 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
520 };
521 };
523 i2c0 {
524 pinctrl_i2c_bitbang: i2c-0-bitbang {
525 atmel,pins =
526 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
527 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
528 };
529 pinctrl_i2c_twi: i2c-0-twi {
530 atmel,pins =
531 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
533 };
534 };
536 fb {
537 pinctrl_fb: fb-0 {
538 atmel,pins =
539 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
540 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
543 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
544 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
555 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
556 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
557 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
558 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
559 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
560 };
561 };
563 pioA: gpio@fffff400 {
564 compatible = "atmel,at91rm9200-gpio";
565 reg = <0xfffff400 0x200>;
566 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
567 #gpio-cells = <2>;
568 gpio-controller;
569 interrupt-controller;
570 #interrupt-cells = <2>;
571 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
572 };
574 pioB: gpio@fffff600 {
575 compatible = "atmel,at91rm9200-gpio";
576 reg = <0xfffff600 0x200>;
577 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
578 #gpio-cells = <2>;
579 gpio-controller;
580 interrupt-controller;
581 #interrupt-cells = <2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
583 };
585 pioC: gpio@fffff800 {
586 compatible = "atmel,at91rm9200-gpio";
587 reg = <0xfffff800 0x200>;
588 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
589 #gpio-cells = <2>;
590 gpio-controller;
591 interrupt-controller;
592 #interrupt-cells = <2>;
593 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
594 };
595 };
597 pmc: pmc@fffffc00 {
598 compatible = "atmel,at91sam9261-pmc", "syscon";
599 reg = <0xfffffc00 0x100>;
600 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
601 #clock-cells = <2>;
602 clocks = <&slow_xtal>, <&main_xtal>;
603 clock-names = "slow_xtal", "main_xtal";
604 };
606 rstc@fffffd00 {
607 compatible = "atmel,at91sam9260-rstc";
608 reg = <0xfffffd00 0x10>;
609 clocks = <&slow_xtal>;
610 };
612 shdwc@fffffd10 {
613 compatible = "atmel,at91sam9260-shdwc";
614 reg = <0xfffffd10 0x10>;
615 clocks = <&slow_xtal>;
616 };
618 pit: timer@fffffd30 {
619 compatible = "atmel,at91sam9260-pit";
620 reg = <0xfffffd30 0xf>;
621 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
622 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
623 };
625 rtc@fffffd20 {
626 compatible = "atmel,at91sam9260-rtt";
627 reg = <0xfffffd20 0x10>;
628 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
629 clocks = <&slow_xtal>;
630 status = "disabled";
631 };
633 watchdog@fffffd40 {
634 compatible = "atmel,at91sam9260-wdt";
635 reg = <0xfffffd40 0x10>;
636 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
637 clocks = <&slow_xtal>;
638 status = "disabled";
639 };
641 gpbr: syscon@fffffd50 {
642 compatible = "atmel,at91sam9260-gpbr", "syscon";
643 reg = <0xfffffd50 0x10>;
644 status = "disabled";
645 };
646 };
647 };
649 i2c-gpio-0 {
650 compatible = "i2c-gpio";
651 pinctrl-names = "default";
652 pinctrl-0 = <&pinctrl_i2c_bitbang>;
653 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
654 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
655 i2c-gpio,sda-open-drain;
656 i2c-gpio,scl-open-drain;
657 i2c-gpio,delay-us = <2>; /* ~100 kHz */
658 #address-cells = <1>;
659 #size-cells = <0>;
660 status = "disabled";
661 };
662 };