| blob | 0785389f5507755ed0b4cea963f162fb898855e3 |
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
4 *
5 * Copyright (C) 2012 Atmel,
6 * 2012 Hong Xu <hong.xu@atmel.com>
7 */
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
15 / {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel AT91SAM9N12 SoC";
19 compatible = "atmel,at91sam9n12";
20 interrupt-parent = <&aic>;
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 ssc0 = &ssc0;
37 pwm0 = &pwm0;
38 };
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 reg = <0>;
47 };
48 };
50 memory@20000000 {
51 device_type = "memory";
52 reg = <0x20000000 0x10000000>;
53 };
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67 };
69 sram: sram@300000 {
70 compatible = "mmio-sram";
71 reg = <0x00300000 0x8000>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges = <0 0x00300000 0x8000>;
75 };
77 ahb {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges;
83 apb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
92 interrupt-controller;
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <31>;
95 };
97 matrix: matrix@ffffde00 {
98 compatible = "atmel,at91sam9n12-matrix", "syscon";
99 reg = <0xffffde00 0x100>;
100 };
102 pmecc: ecc-engine@ffffe000 {
103 compatible = "atmel,at91sam9g45-pmecc";
104 reg = <0xffffe000 0x600>,
105 <0xffffe600 0x200>;
106 };
108 ramc0: ramc@ffffe800 {
109 compatible = "atmel,at91sam9g45-ddramc";
110 reg = <0xffffe800 0x200>;
111 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
112 clock-names = "ddrck";
113 };
115 smc: smc@ffffea00 {
116 compatible = "atmel,at91sam9260-smc", "syscon";
117 reg = <0xffffea00 0x200>;
118 };
120 pmc: pmc@fffffc00 {
121 compatible = "atmel,at91sam9n12-pmc", "syscon";
122 reg = <0xfffffc00 0x200>;
123 #clock-cells = <2>;
124 clocks = <&clk32k>, <&main_xtal>;
125 clock-names = "slow_clk", "main_xtal";
126 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
127 };
129 rstc@fffffe00 {
130 compatible = "atmel,at91sam9g45-rstc";
131 reg = <0xfffffe00 0x10>;
132 clocks = <&clk32k>;
133 };
135 pit: timer@fffffe30 {
136 compatible = "atmel,at91sam9260-pit";
137 reg = <0xfffffe30 0xf>;
138 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
139 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
140 };
142 shdwc@fffffe10 {
143 compatible = "atmel,at91sam9x5-shdwc";
144 reg = <0xfffffe10 0x10>;
145 clocks = <&clk32k>;
146 };
148 sckc@fffffe50 {
149 compatible = "atmel,at91sam9x5-sckc";
150 reg = <0xfffffe50 0x4>;
152 slow_osc: slow_osc {
153 compatible = "atmel,at91sam9x5-clk-slow-osc";
154 #clock-cells = <0>;
155 clocks = <&slow_xtal>;
156 };
158 slow_rc_osc: slow_rc_osc {
159 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
160 #clock-cells = <0>;
161 clock-frequency = <32768>;
162 clock-accuracy = <50000000>;
163 };
165 clk32k: slck {
166 compatible = "atmel,at91sam9x5-clk-slow";
167 #clock-cells = <0>;
168 clocks = <&slow_rc_osc>, <&slow_osc>;
169 };
170 };
172 mmc0: mmc@f0008000 {
173 compatible = "atmel,hsmci";
174 reg = <0xf0008000 0x600>;
175 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
176 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
177 dma-names = "rxtx";
178 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
179 clock-names = "mci_clk";
180 #address-cells = <1>;
181 #size-cells = <0>;
182 status = "disabled";
183 };
185 tcb0: timer@f8008000 {
186 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 reg = <0xf8008000 0x100>;
190 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
191 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
192 clock-names = "t0_clk", "slow_clk";
193 };
195 tcb1: timer@f800c000 {
196 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 reg = <0xf800c000 0x100>;
200 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
201 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
202 clock-names = "t0_clk", "slow_clk";
203 };
205 hlcdc: hlcdc@f8038000 {
206 compatible = "atmel,at91sam9n12-hlcdc";
207 reg = <0xf8038000 0x2000>;
208 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
209 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
210 clock-names = "periph_clk", "sys_clk", "slow_clk";
211 status = "disabled";
213 hlcdc-display-controller {
214 compatible = "atmel,hlcdc-display-controller";
215 #address-cells = <1>;
216 #size-cells = <0>;
218 port@0 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 reg = <0>;
222 };
223 };
225 hlcdc_pwm: hlcdc-pwm {
226 compatible = "atmel,hlcdc-pwm";
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_lcd_pwm>;
229 #pwm-cells = <3>;
230 };
231 };
233 dma: dma-controller@ffffec00 {
234 compatible = "atmel,at91sam9g45-dma";
235 reg = <0xffffec00 0x200>;
236 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
237 #dma-cells = <2>;
238 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
239 clock-names = "dma_clk";
240 };
242 pinctrl@fffff400 {
243 #address-cells = <1>;
244 #size-cells = <1>;
245 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
246 ranges = <0xfffff400 0xfffff400 0x800>;
248 atmel,mux-mask = <
249 /* A B C */
250 0xffffffff 0xffe07983 0x00000000 /* pioA */
251 0x00040000 0x00047e0f 0x00000000 /* pioB */
252 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
253 0x003fffff 0x003f8000 0x00000000 /* pioD */
254 >;
256 /* shared pinctrl settings */
257 dbgu {
258 pinctrl_dbgu: dbgu-0 {
259 atmel,pins =
260 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
261 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
262 };
263 };
265 lcd {
266 pinctrl_lcd_base: lcd-base-0 {
267 atmel,pins =
268 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
269 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
270 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
271 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
272 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
273 };
275 pinctrl_lcd_pwm: lcd-pwm-0 {
276 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
277 };
279 pinctrl_lcd_rgb888: lcd-rgb-3 {
280 atmel,pins =
281 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
282 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
283 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
284 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
285 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
286 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
287 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
288 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
289 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
290 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
291 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
292 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
293 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
294 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
295 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
296 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
297 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
298 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
299 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
300 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
301 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
302 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
303 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
304 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
305 };
306 };
308 usart0 {
309 pinctrl_usart0: usart0-0 {
310 atmel,pins =
311 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
312 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
313 };
315 pinctrl_usart0_rts: usart0_rts-0 {
316 atmel,pins =
317 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
318 };
320 pinctrl_usart0_cts: usart0_cts-0 {
321 atmel,pins =
322 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
323 };
324 };
326 usart1 {
327 pinctrl_usart1: usart1-0 {
328 atmel,pins =
329 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
330 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
331 };
332 };
334 usart2 {
335 pinctrl_usart2: usart2-0 {
336 atmel,pins =
337 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
338 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
339 };
341 pinctrl_usart2_rts: usart2_rts-0 {
342 atmel,pins =
343 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
344 };
346 pinctrl_usart2_cts: usart2_cts-0 {
347 atmel,pins =
348 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
349 };
350 };
352 usart3 {
353 pinctrl_usart3: usart3-0 {
354 atmel,pins =
355 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
356 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
357 };
359 pinctrl_usart3_rts: usart3_rts-0 {
360 atmel,pins =
361 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
362 };
364 pinctrl_usart3_cts: usart3_cts-0 {
365 atmel,pins =
366 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
367 };
368 };
370 uart0 {
371 pinctrl_uart0: uart0-0 {
372 atmel,pins =
373 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
374 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
375 };
376 };
378 uart1 {
379 pinctrl_uart1: uart1-0 {
380 atmel,pins =
381 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
382 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
383 };
384 };
386 nand {
387 pinctrl_nand_rb: nand-rb-0 {
388 atmel,pins =
389 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
390 };
392 pinctrl_nand_cs: nand-cs-0 {
393 atmel,pins =
394 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
395 };
396 };
398 mmc0 {
399 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
400 atmel,pins =
401 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
402 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
403 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
404 };
406 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
407 atmel,pins =
408 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
409 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
410 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
411 };
413 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
414 atmel,pins =
415 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
416 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
417 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
418 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
419 };
420 };
422 ssc0 {
423 pinctrl_ssc0_tx: ssc0_tx-0 {
424 atmel,pins =
425 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
426 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
427 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
428 };
430 pinctrl_ssc0_rx: ssc0_rx-0 {
431 atmel,pins =
432 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
433 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
434 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
435 };
436 };
438 spi0 {
439 pinctrl_spi0: spi0-0 {
440 atmel,pins =
441 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
442 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
443 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
444 };
445 };
447 spi1 {
448 pinctrl_spi1: spi1-0 {
449 atmel,pins =
450 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
451 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
452 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
453 };
454 };
456 i2c0 {
457 pinctrl_i2c0: i2c0-0 {
458 atmel,pins =
459 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
460 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
461 };
462 };
464 i2c1 {
465 pinctrl_i2c1: i2c1-0 {
466 atmel,pins =
467 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
468 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
469 };
470 };
472 tcb0 {
473 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
474 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
475 };
477 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
478 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
479 };
481 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
482 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
483 };
485 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
486 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
487 };
489 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
490 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
491 };
493 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
494 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
495 };
497 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
498 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
499 };
501 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
502 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
503 };
505 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
506 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
507 };
508 };
510 tcb1 {
511 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
512 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
513 };
515 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
516 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
517 };
519 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
520 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
521 };
523 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
524 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
525 };
527 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
528 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
529 };
531 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
532 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
533 };
535 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
536 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
537 };
539 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
540 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
541 };
543 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
544 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
545 };
546 };
548 pioA: gpio@fffff400 {
549 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
550 reg = <0xfffff400 0x200>;
551 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
552 #gpio-cells = <2>;
553 gpio-controller;
554 interrupt-controller;
555 #interrupt-cells = <2>;
556 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
557 };
559 pioB: gpio@fffff600 {
560 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
561 reg = <0xfffff600 0x200>;
562 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
563 #gpio-cells = <2>;
564 gpio-controller;
565 interrupt-controller;
566 #interrupt-cells = <2>;
567 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
568 };
570 pioC: gpio@fffff800 {
571 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
572 reg = <0xfffff800 0x200>;
573 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
574 #gpio-cells = <2>;
575 gpio-controller;
576 interrupt-controller;
577 #interrupt-cells = <2>;
578 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
579 };
581 pioD: gpio@fffffa00 {
582 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
583 reg = <0xfffffa00 0x200>;
584 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
585 #gpio-cells = <2>;
586 gpio-controller;
587 interrupt-controller;
588 #interrupt-cells = <2>;
589 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
590 };
591 };
593 dbgu: serial@fffff200 {
594 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
595 reg = <0xfffff200 0x200>;
596 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_dbgu>;
599 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
600 clock-names = "usart";
601 status = "disabled";
602 };
604 ssc0: ssc@f0010000 {
605 compatible = "atmel,at91sam9g45-ssc";
606 reg = <0xf0010000 0x4000>;
607 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
608 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
609 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
610 dma-names = "tx", "rx";
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
613 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
614 clock-names = "pclk";
615 status = "disabled";
616 };
618 usart0: serial@f801c000 {
619 compatible = "atmel,at91sam9260-usart";
620 reg = <0xf801c000 0x4000>;
621 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_usart0>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
625 clock-names = "usart";
626 status = "disabled";
627 };
629 usart1: serial@f8020000 {
630 compatible = "atmel,at91sam9260-usart";
631 reg = <0xf8020000 0x4000>;
632 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_usart1>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
636 clock-names = "usart";
637 status = "disabled";
638 };
640 usart2: serial@f8024000 {
641 compatible = "atmel,at91sam9260-usart";
642 reg = <0xf8024000 0x4000>;
643 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_usart2>;
646 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
647 clock-names = "usart";
648 status = "disabled";
649 };
651 usart3: serial@f8028000 {
652 compatible = "atmel,at91sam9260-usart";
653 reg = <0xf8028000 0x4000>;
654 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_usart3>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
658 clock-names = "usart";
659 status = "disabled";
660 };
662 i2c0: i2c@f8010000 {
663 compatible = "atmel,at91sam9x5-i2c";
664 reg = <0xf8010000 0x100>;
665 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
666 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
667 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
668 dma-names = "tx", "rx";
669 #address-cells = <1>;
670 #size-cells = <0>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_i2c0>;
673 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
674 status = "disabled";
675 };
677 i2c1: i2c@f8014000 {
678 compatible = "atmel,at91sam9x5-i2c";
679 reg = <0xf8014000 0x100>;
680 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
681 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
682 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
683 dma-names = "tx", "rx";
684 #address-cells = <1>;
685 #size-cells = <0>;
686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_i2c1>;
688 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
689 status = "disabled";
690 };
692 spi0: spi@f0000000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "atmel,at91rm9200-spi";
696 reg = <0xf0000000 0x100>;
697 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
698 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
699 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
700 dma-names = "tx", "rx";
701 pinctrl-names = "default";
702 pinctrl-0 = <&pinctrl_spi0>;
703 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
704 clock-names = "spi_clk";
705 status = "disabled";
706 };
708 spi1: spi@f0004000 {
709 #address-cells = <1>;
710 #size-cells = <0>;
711 compatible = "atmel,at91rm9200-spi";
712 reg = <0xf0004000 0x100>;
713 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
714 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
715 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
716 dma-names = "tx", "rx";
717 pinctrl-names = "default";
718 pinctrl-0 = <&pinctrl_spi1>;
719 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
720 clock-names = "spi_clk";
721 status = "disabled";
722 };
724 watchdog@fffffe40 {
725 compatible = "atmel,at91sam9260-wdt";
726 reg = <0xfffffe40 0x10>;
727 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
728 clocks = <&clk32k>;
729 atmel,watchdog-type = "hardware";
730 atmel,reset-type = "all";
731 atmel,dbg-halt;
732 status = "disabled";
733 };
735 rtc@fffffeb0 {
736 compatible = "atmel,at91rm9200-rtc";
737 reg = <0xfffffeb0 0x40>;
738 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
739 clocks = <&clk32k>;
740 status = "disabled";
741 };
743 pwm0: pwm@f8034000 {
744 compatible = "atmel,at91sam9rl-pwm";
745 reg = <0xf8034000 0x300>;
746 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
747 #pwm-cells = <3>;
748 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
749 status = "disabled";
750 };
752 usb1: gadget@f803c000 {
753 compatible = "atmel,at91sam9260-udc";
754 reg = <0xf803c000 0x4000>;
755 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
756 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>;
757 clock-names = "pclk", "hclk";
758 status = "disabled";
759 };
760 };
762 usb0: ohci@500000 {
763 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
764 reg = <0x00500000 0x00100000>;
765 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
766 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
767 clock-names = "ohci_clk", "hclk", "uhpck";
768 status = "disabled";
769 };
771 ebi: ebi@10000000 {
772 compatible = "atmel,at91sam9x5-ebi";
773 #address-cells = <2>;
774 #size-cells = <1>;
775 atmel,smc = <&smc>;
776 atmel,matrix = <&matrix>;
777 reg = <0x10000000 0x60000000>;
778 ranges = <0x0 0x0 0x10000000 0x10000000
779 0x1 0x0 0x20000000 0x10000000
780 0x2 0x0 0x30000000 0x10000000
781 0x3 0x0 0x40000000 0x10000000
782 0x4 0x0 0x50000000 0x10000000
783 0x5 0x0 0x60000000 0x10000000>;
784 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
785 status = "disabled";
787 nand_controller: nand-controller {
788 compatible = "atmel,at91sam9g45-nand-controller";
789 ecc-engine = <&pmecc>;
790 #address-cells = <2>;
791 #size-cells = <1>;
792 ranges;
793 status = "disabled";
794 };
795 };
796 };
798 i2c-gpio-0 {
799 compatible = "i2c-gpio";
800 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
801 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
802 >;
803 i2c-gpio,sda-open-drain;
804 i2c-gpio,scl-open-drain;
805 i2c-gpio,delay-us = <2>; /* ~100 kHz */
806 #address-cells = <1>;
807 #size-cells = <0>;
808 status = "disabled";
809 };
810 };