| blob | 7702e048e110f6270968c2ef111e0692ca47a804 |
1 /*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm814.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/dm814x.h>
12 / {
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 chosen { };
19 aliases {
20 i2c0 = &i2c1;
21 i2c1 = &i2c2;
22 serial0 = &uart1;
23 serial1 = &uart2;
24 serial2 = &uart3;
25 ethernet0 = &cpsw_emac0;
26 ethernet1 = &cpsw_emac1;
27 usb0 = &usb0;
28 usb1 = &usb1;
29 phy0 = &usb0_phy;
30 phy1 = &usb1_phy;
31 };
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36 cpu@0 {
37 compatible = "arm,cortex-a8";
38 device_type = "cpu";
39 reg = <0>;
40 };
41 };
43 pmu {
44 compatible = "arm,cortex-a8-pmu";
45 interrupts = <3>;
46 };
48 /*
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
51 */
52 soc {
53 compatible = "ti,omap-infra";
54 mpu {
55 compatible = "ti,omap3-mpu";
56 ti,hwmods = "mpu";
57 };
58 };
60 ocp {
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65 ti,hwmods = "l3_main";
67 usb: usb@47400000 {
68 compatible = "ti,am33xx-usb";
69 reg = <0x47400000 0x1000>;
70 ranges;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ti,hwmods = "usb_otg_hs";
75 usb0_phy: usb-phy@47401300 {
76 compatible = "ti,am335x-usb-phy";
77 reg = <0x47401300 0x100>;
78 reg-names = "phy";
79 ti,ctrl_mod = <&usb_ctrl_mod>;
80 #phy-cells = <0>;
81 };
83 usb0: usb@47401000 {
84 compatible = "ti,musb-am33xx";
85 reg = <0x47401400 0x400
86 0x47401000 0x200>;
87 reg-names = "mc", "control";
89 interrupts = <18>;
90 interrupt-names = "mc";
91 dr_mode = "otg";
92 mentor,multipoint = <1>;
93 mentor,num-eps = <16>;
94 mentor,ram-bits = <12>;
95 mentor,power = <500>;
96 phys = <&usb0_phy>;
98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
99 &cppi41dma 2 0 &cppi41dma 3 0
100 &cppi41dma 4 0 &cppi41dma 5 0
101 &cppi41dma 6 0 &cppi41dma 7 0
102 &cppi41dma 8 0 &cppi41dma 9 0
103 &cppi41dma 10 0 &cppi41dma 11 0
104 &cppi41dma 12 0 &cppi41dma 13 0
105 &cppi41dma 14 0 &cppi41dma 0 1
106 &cppi41dma 1 1 &cppi41dma 2 1
107 &cppi41dma 3 1 &cppi41dma 4 1
108 &cppi41dma 5 1 &cppi41dma 6 1
109 &cppi41dma 7 1 &cppi41dma 8 1
110 &cppi41dma 9 1 &cppi41dma 10 1
111 &cppi41dma 11 1 &cppi41dma 12 1
112 &cppi41dma 13 1 &cppi41dma 14 1>;
113 dma-names =
114 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
115 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
116 "rx14", "rx15",
117 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
118 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
119 "tx14", "tx15";
120 };
122 usb1: usb@47401800 {
123 compatible = "ti,musb-am33xx";
124 reg = <0x47401c00 0x400
125 0x47401800 0x200>;
126 reg-names = "mc", "control";
127 interrupts = <19>;
128 interrupt-names = "mc";
129 dr_mode = "otg";
130 mentor,multipoint = <1>;
131 mentor,num-eps = <16>;
132 mentor,ram-bits = <12>;
133 mentor,power = <500>;
134 phys = <&usb1_phy>;
136 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
137 &cppi41dma 17 0 &cppi41dma 18 0
138 &cppi41dma 19 0 &cppi41dma 20 0
139 &cppi41dma 21 0 &cppi41dma 22 0
140 &cppi41dma 23 0 &cppi41dma 24 0
141 &cppi41dma 25 0 &cppi41dma 26 0
142 &cppi41dma 27 0 &cppi41dma 28 0
143 &cppi41dma 29 0 &cppi41dma 15 1
144 &cppi41dma 16 1 &cppi41dma 17 1
145 &cppi41dma 18 1 &cppi41dma 19 1
146 &cppi41dma 20 1 &cppi41dma 21 1
147 &cppi41dma 22 1 &cppi41dma 23 1
148 &cppi41dma 24 1 &cppi41dma 25 1
149 &cppi41dma 26 1 &cppi41dma 27 1
150 &cppi41dma 28 1 &cppi41dma 29 1>;
151 dma-names =
152 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
153 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
154 "rx14", "rx15",
155 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
156 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
157 "tx14", "tx15";
158 };
160 cppi41dma: dma-controller@47402000 {
161 compatible = "ti,am3359-cppi41";
162 reg = <0x47400000 0x1000
163 0x47402000 0x1000
164 0x47403000 0x1000
165 0x47404000 0x4000>;
166 reg-names = "glue", "controller", "scheduler", "queuemgr";
167 interrupts = <17>;
168 interrupt-names = "glue";
169 #dma-cells = <2>;
170 #dma-channels = <30>;
171 #dma-requests = <256>;
172 };
173 };
175 /*
176 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
177 * It shows the module target agent registers though, so the
178 * actual device is typically 0x1000 before the target agent
179 * except in cases where the module is larger than 0x1000.
180 */
181 l4ls: l4ls@48000000 {
182 compatible = "ti,dm814-l4ls", "simple-bus";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 ranges = <0 0x48000000 0x2000000>;
187 i2c1: i2c@28000 {
188 compatible = "ti,omap4-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
191 ti,hwmods = "i2c1";
192 reg = <0x28000 0x1000>;
193 interrupts = <70>;
194 };
196 elm: elm@80000 {
197 compatible = "ti,814-elm";
198 ti,hwmods = "elm";
199 reg = <0x80000 0x2000>;
200 interrupts = <4>;
201 };
203 gpio1: gpio@32000 {
204 compatible = "ti,omap4-gpio";
205 ti,hwmods = "gpio1";
206 ti,gpio-always-on;
207 reg = <0x32000 0x2000>;
208 interrupts = <96>;
209 gpio-controller;
210 #gpio-cells = <2>;
211 interrupt-controller;
212 #interrupt-cells = <2>;
213 };
215 gpio2: gpio@4c000 {
216 compatible = "ti,omap4-gpio";
217 ti,hwmods = "gpio2";
218 ti,gpio-always-on;
219 reg = <0x4c000 0x2000>;
220 interrupts = <98>;
221 gpio-controller;
222 #gpio-cells = <2>;
223 interrupt-controller;
224 #interrupt-cells = <2>;
225 };
227 gpio3: gpio@1ac000 {
228 compatible = "ti,omap4-gpio";
229 ti,hwmods = "gpio3";
230 ti,gpio-always-on;
231 reg = <0x1ac000 0x2000>;
232 interrupts = <32>;
233 gpio-controller;
234 #gpio-cells = <2>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
237 };
239 gpio4: gpio@1ae000 {
240 compatible = "ti,omap4-gpio";
241 ti,hwmods = "gpio4";
242 ti,gpio-always-on;
243 reg = <0x1ae000 0x2000>;
244 interrupts = <62>;
245 gpio-controller;
246 #gpio-cells = <2>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
249 };
251 i2c2: i2c@2a000 {
252 compatible = "ti,omap4-i2c";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 ti,hwmods = "i2c2";
256 reg = <0x2a000 0x1000>;
257 interrupts = <71>;
258 };
260 mcspi1: spi@30000 {
261 compatible = "ti,omap4-mcspi";
262 reg = <0x30000 0x1000>;
263 #address-cells = <1>;
264 #size-cells = <0>;
265 interrupts = <65>;
266 ti,spi-num-cs = <4>;
267 ti,hwmods = "mcspi1";
268 dmas = <&edma 16 0 &edma 17 0
269 &edma 18 0 &edma 19 0
270 &edma 20 0 &edma 21 0
271 &edma 22 0 &edma 23 0>;
273 dma-names = "tx0", "rx0", "tx1", "rx1",
274 "tx2", "rx2", "tx3", "rx3";
275 };
277 mcspi2: spi@1a0000 {
278 compatible = "ti,omap4-mcspi";
279 reg = <0x1a0000 0x1000>;
280 #address-cells = <1>;
281 #size-cells = <0>;
282 interrupts = <125>;
283 ti,spi-num-cs = <4>;
284 ti,hwmods = "mcspi2";
285 dmas = <&edma 42 0 &edma 43 0
286 &edma 44 0 &edma 45 0>;
287 dma-names = "tx0", "rx0", "tx1", "rx1";
288 };
290 /* Board must configure dmas with edma_xbar for EDMA */
291 mcspi3: spi@1a2000 {
292 compatible = "ti,omap4-mcspi";
293 reg = <0x1a2000 0x1000>;
294 #address-cells = <1>;
295 #size-cells = <0>;
296 interrupts = <126>;
297 ti,spi-num-cs = <4>;
298 ti,hwmods = "mcspi3";
299 };
301 mcspi4: spi@1a4000 {
302 compatible = "ti,omap4-mcspi";
303 reg = <0x1a4000 0x1000>;
304 #address-cells = <1>;
305 #size-cells = <0>;
306 interrupts = <127>;
307 ti,spi-num-cs = <4>;
308 ti,hwmods = "mcspi4";
309 };
311 timer1_target: target-module@2e000 {
312 compatible = "ti,sysc-omap4-timer", "ti,sysc";
313 reg = <0x2e000 0x4>,
314 <0x2e010 0x4>;
315 reg-names = "rev", "sysc";
316 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
317 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318 <SYSC_IDLE_NO>,
319 <SYSC_IDLE_SMART>,
320 <SYSC_IDLE_SMART_WKUP>;
321 clocks = <&timer1_fck>;
322 clock-names = "fck";
323 #address-cells = <1>;
324 #size-cells = <1>;
325 ranges = <0x0 0x2e000 0x1000>;
327 timer1: timer@0 {
328 compatible = "ti,am335x-timer-1ms";
329 reg = <0x0 0x400>;
330 interrupts = <67>;
331 ti,timer-alwon;
332 clocks = <&timer1_fck>;
333 clock-names = "fck";
334 };
335 };
337 uart1: uart@20000 {
338 compatible = "ti,am3352-uart", "ti,omap3-uart";
339 ti,hwmods = "uart1";
340 reg = <0x20000 0x2000>;
341 clock-frequency = <48000000>;
342 interrupts = <72>;
343 dmas = <&edma 26 0 &edma 27 0>;
344 dma-names = "tx", "rx";
345 };
347 uart2: uart@22000 {
348 compatible = "ti,am3352-uart", "ti,omap3-uart";
349 ti,hwmods = "uart2";
350 reg = <0x22000 0x2000>;
351 clock-frequency = <48000000>;
352 interrupts = <73>;
353 dmas = <&edma 28 0 &edma 29 0>;
354 dma-names = "tx", "rx";
355 };
357 uart3: uart@24000 {
358 compatible = "ti,am3352-uart", "ti,omap3-uart";
359 ti,hwmods = "uart3";
360 reg = <0x24000 0x2000>;
361 clock-frequency = <48000000>;
362 interrupts = <74>;
363 dmas = <&edma 30 0 &edma 31 0>;
364 dma-names = "tx", "rx";
365 };
367 timer2_target: target-module@40000 {
368 compatible = "ti,sysc-omap4-timer", "ti,sysc";
369 reg = <0x40000 0x4>,
370 <0x40010 0x4>;
371 reg-names = "rev", "sysc";
372 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
373 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
374 <SYSC_IDLE_NO>,
375 <SYSC_IDLE_SMART>,
376 <SYSC_IDLE_SMART_WKUP>;
377 clocks = <&timer2_fck>;
378 clock-names = "fck";
379 #address-cells = <1>;
380 #size-cells = <1>;
381 ranges = <0x0 0x40000 0x1000>;
383 timer2: timer@0 {
384 compatible = "ti,dm814-timer";
385 reg = <0 0x1000>;
386 interrupts = <68>;
387 clocks = <&timer2_fck>;
388 clock-names = "fck";
389 };
390 };
392 timer3: timer@42000 {
393 compatible = "ti,dm814-timer";
394 reg = <0x42000 0x2000>;
395 interrupts = <69>;
396 ti,hwmods = "timer3";
397 };
399 mmc1: mmc@60000 {
400 compatible = "ti,omap4-hsmmc";
401 ti,hwmods = "mmc1";
402 dmas = <&edma 24 0
403 &edma 25 0>;
404 dma-names = "tx", "rx";
405 interrupts = <64>;
406 interrupt-parent = <&intc>;
407 reg = <0x60000 0x1000>;
408 };
410 rtc: rtc@c0000 {
411 compatible = "ti,am3352-rtc", "ti,da830-rtc";
412 reg = <0xc0000 0x1000>;
413 interrupts = <75 76>;
414 ti,hwmods = "rtc";
415 };
417 mmc2: mmc@1d8000 {
418 compatible = "ti,omap4-hsmmc";
419 ti,hwmods = "mmc2";
420 dmas = <&edma 2 0
421 &edma 3 0>;
422 dma-names = "tx", "rx";
423 interrupts = <28>;
424 interrupt-parent = <&intc>;
425 reg = <0x1d8000 0x1000>;
426 };
428 control: control@140000 {
429 compatible = "ti,dm814-scm", "simple-bus";
430 reg = <0x140000 0x20000>;
431 #address-cells = <1>;
432 #size-cells = <1>;
433 ranges = <0 0x140000 0x20000>;
435 scm_conf: scm_conf@0 {
436 compatible = "syscon", "simple-bus";
437 reg = <0x0 0x800>;
438 #address-cells = <1>;
439 #size-cells = <1>;
440 ranges = <0 0 0x800>;
442 phy_gmii_sel: phy-gmii-sel {
443 compatible = "ti,dm814-phy-gmii-sel";
444 reg = <0x650 0x4>;
445 #phy-cells = <1>;
446 };
448 scm_clocks: clocks {
449 #address-cells = <1>;
450 #size-cells = <0>;
451 };
453 scm_clockdomains: clockdomains {
454 };
455 };
457 usb_ctrl_mod: control@620 {
458 compatible = "ti,am335x-usb-ctrl-module";
459 reg = <0x620 0x10
460 0x648 0x4>;
461 reg-names = "phy_ctrl", "wakeup";
462 };
464 edma_xbar: dma-router@f90 {
465 compatible = "ti,am335x-edma-crossbar";
466 reg = <0xf90 0x40>;
467 #dma-cells = <3>;
468 dma-requests = <32>;
469 dma-masters = <&edma>;
470 };
472 /*
473 * Note that silicon revision 2.1 and older
474 * require input enabled (bit 18 set) for all
475 * 3.3V I/Os to avoid cumulative hardware damage.
476 * For more info, see errata advisory 2.1.87.
477 * We leave bit 18 out of function-mask and rely
478 * on the bootloader for it.
479 */
480 pincntl: pinmux@800 {
481 compatible = "pinctrl-single";
482 reg = <0x800 0x438>;
483 #address-cells = <1>;
484 #size-cells = <0>;
485 #pinctrl-cells = <1>;
486 pinctrl-single,register-width = <32>;
487 pinctrl-single,function-mask = <0x307ff>;
488 };
490 usb1_phy: usb-phy@1b00 {
491 compatible = "ti,am335x-usb-phy";
492 reg = <0x1b00 0x100>;
493 reg-names = "phy";
494 ti,ctrl_mod = <&usb_ctrl_mod>;
495 #phy-cells = <0>;
496 };
497 };
499 prcm: prcm@180000 {
500 compatible = "ti,dm814-prcm", "simple-bus";
501 reg = <0x180000 0x2000>;
502 #address-cells = <1>;
503 #size-cells = <1>;
504 ranges = <0 0x180000 0x2000>;
506 prcm_clocks: clocks {
507 #address-cells = <1>;
508 #size-cells = <0>;
509 };
511 prcm_clockdomains: clockdomains {
512 };
513 };
515 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
516 pllss: pllss@1c5000 {
517 compatible = "ti,dm814-pllss", "simple-bus";
518 reg = <0x1c5000 0x1000>;
519 #address-cells = <1>;
520 #size-cells = <1>;
521 ranges = <0 0x1c5000 0x1000>;
523 pllss_clocks: clocks {
524 #address-cells = <1>;
525 #size-cells = <0>;
526 };
528 pllss_clockdomains: clockdomains {
529 };
530 };
532 wdt1: wdt@1c7000 {
533 compatible = "ti,omap3-wdt";
534 ti,hwmods = "wd_timer";
535 reg = <0x1c7000 0x1000>;
536 interrupts = <91>;
537 };
538 };
540 intc: interrupt-controller@48200000 {
541 compatible = "ti,dm814-intc";
542 interrupt-controller;
543 #interrupt-cells = <1>;
544 reg = <0x48200000 0x1000>;
545 };
547 /* Board must configure evtmux with edma_xbar for EDMA */
548 mmc3: mmc@47810000 {
549 compatible = "ti,omap4-hsmmc";
550 ti,hwmods = "mmc3";
551 interrupts = <29>;
552 interrupt-parent = <&intc>;
553 reg = <0x47810000 0x1000>;
554 };
556 target-module@49000000 {
557 compatible = "ti,sysc-omap4", "ti,sysc";
558 reg = <0x49000000 0x4>;
559 reg-names = "rev";
560 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
561 clock-names = "fck";
562 #address-cells = <1>;
563 #size-cells = <1>;
564 ranges = <0x0 0x49000000 0x10000>;
566 edma: dma@0 {
567 compatible = "ti,edma3-tpcc";
568 reg = <0 0x10000>;
569 reg-names = "edma3_cc";
570 interrupts = <12 13 14>;
571 interrupt-names = "edma3_ccint", "edma3_mperr",
572 "edma3_ccerrint";
573 dma-requests = <64>;
574 #dma-cells = <2>;
576 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
577 <&edma_tptc2 3>, <&edma_tptc3 0>;
579 ti,edma-memcpy-channels = <20 21>;
580 };
581 };
583 target-module@49800000 {
584 compatible = "ti,sysc-omap4", "ti,sysc";
585 reg = <0x49800000 0x4>,
586 <0x49800010 0x4>;
587 reg-names = "rev", "sysc";
588 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
589 ti,sysc-midle = <SYSC_IDLE_FORCE>;
590 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
591 <SYSC_IDLE_SMART>;
592 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
593 clock-names = "fck";
594 #address-cells = <1>;
595 #size-cells = <1>;
596 ranges = <0x0 0x49800000 0x100000>;
598 edma_tptc0: dma@0 {
599 compatible = "ti,edma3-tptc";
600 reg = <0 0x100000>;
601 interrupts = <112>;
602 interrupt-names = "edma3_tcerrint";
603 };
604 };
606 target-module@49900000 {
607 compatible = "ti,sysc-omap4", "ti,sysc";
608 reg = <0x49900000 0x4>,
609 <0x49900010 0x4>;
610 reg-names = "rev", "sysc";
611 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
612 ti,sysc-midle = <SYSC_IDLE_FORCE>;
613 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
614 <SYSC_IDLE_SMART>;
615 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
616 clock-names = "fck";
617 #address-cells = <1>;
618 #size-cells = <1>;
619 ranges = <0x0 0x49900000 0x100000>;
621 edma_tptc1: dma@0 {
622 compatible = "ti,edma3-tptc";
623 reg = <0 0x100000>;
624 interrupts = <113>;
625 interrupt-names = "edma3_tcerrint";
626 };
627 };
629 target-module@49a00000 {
630 compatible = "ti,sysc-omap4", "ti,sysc";
631 reg = <0x49a00000 0x4>,
632 <0x49a00010 0x4>;
633 reg-names = "rev", "sysc";
634 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
635 ti,sysc-midle = <SYSC_IDLE_FORCE>;
636 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
637 <SYSC_IDLE_SMART>;
638 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
639 clock-names = "fck";
640 #address-cells = <1>;
641 #size-cells = <1>;
642 ranges = <0x0 0x49a00000 0x100000>;
644 edma_tptc2: dma@0 {
645 compatible = "ti,edma3-tptc";
646 reg = <0 0x100000>;
647 interrupts = <114>;
648 interrupt-names = "edma3_tcerrint";
649 };
650 };
652 target-module@49b00000 {
653 compatible = "ti,sysc-omap4", "ti,sysc";
654 reg = <0x49b00000 0x4>,
655 <0x49b00010 0x4>;
656 reg-names = "rev", "sysc";
657 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
658 ti,sysc-midle = <SYSC_IDLE_FORCE>;
659 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
660 <SYSC_IDLE_SMART>;
661 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
662 clock-names = "fck";
663 #address-cells = <1>;
664 #size-cells = <1>;
665 ranges = <0x0 0x49b00000 0x100000>;
667 edma_tptc3: dma@0 {
668 compatible = "ti,edma3-tptc";
669 reg = <0 0x100000>;
670 interrupts = <115>;
671 interrupt-names = "edma3_tcerrint";
672 };
673 };
675 /* See TRM "Table 1-318. L4HS Instance Summary" */
676 l4hs: l4hs@4a000000 {
677 compatible = "ti,dm814-l4hs", "simple-bus";
678 #address-cells = <1>;
679 #size-cells = <1>;
680 ranges = <0 0x4a000000 0x1b4040>;
682 target-module@100000 {
683 compatible = "ti,sysc-omap4-simple", "ti,sysc";
684 reg = <0x100900 0x4>,
685 <0x100908 0x4>,
686 <0x100904 0x4>;
687 reg-names = "rev", "sysc", "syss";
688 ti,sysc-mask = <0>;
689 ti,sysc-midle = <SYSC_IDLE_FORCE>,
690 <SYSC_IDLE_NO>;
691 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
692 <SYSC_IDLE_NO>;
693 ti,syss-mask = <1>;
694 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
695 clock-names = "fck";
696 #address-cells = <1>;
697 #size-cells = <1>;
698 ranges = <0 0x100000 0x8000>;
700 mac: ethernet@0 {
701 compatible = "ti,cpsw";
702 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
703 clock-names = "fck", "cpts";
704 cpdma_channels = <8>;
705 ale_entries = <1024>;
706 bd_ram_size = <0x2000>;
707 mac_control = <0x20>;
708 slaves = <2>;
709 active_slave = <0>;
710 cpts_clock_mult = <0x80000000>;
711 cpts_clock_shift = <29>;
712 reg = <0 0x800>,
713 <0x900 0x100>;
714 #address-cells = <1>;
715 #size-cells = <1>;
716 /*
717 * c0_rx_thresh_pend
718 * c0_rx_pend
719 * c0_tx_pend
720 * c0_misc_pend
721 */
722 interrupts = <40 41 42 43>;
723 ranges = <0 0 0x8000>;
724 syscon = <&scm_conf>;
726 davinci_mdio: mdio@800 {
727 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
728 clocks = <&cpsw_125mhz_gclk>;
729 clock-names = "fck";
730 #address-cells = <1>;
731 #size-cells = <0>;
732 bus_freq = <1000000>;
733 reg = <0x800 0x100>;
734 };
736 cpsw_emac0: slave@200 {
737 /* Filled in by U-Boot */
738 mac-address = [ 00 00 00 00 00 00 ];
739 phys = <&phy_gmii_sel 1>;
740 };
742 cpsw_emac1: slave@300 {
743 /* Filled in by U-Boot */
744 mac-address = [ 00 00 00 00 00 00 ];
745 phys = <&phy_gmii_sel 2>;
746 };
747 };
748 };
749 };
751 gpmc: gpmc@50000000 {
752 compatible = "ti,am3352-gpmc";
753 ti,hwmods = "gpmc";
754 ti,no-idle-on-init;
755 reg = <0x50000000 0x2000>;
756 interrupts = <100>;
757 gpmc,num-cs = <7>;
758 gpmc,num-waitpins = <2>;
759 #address-cells = <2>;
760 #size-cells = <1>;
761 interrupt-controller;
762 #interrupt-cells = <2>;
763 gpio-controller;
764 #gpio-cells = <2>;
765 };
766 };
767 };
769 #include "dm814x-clocks.dtsi"
771 /* Preferred always-on timer for clocksource */
772 &timer1_target {
773 ti,no-reset-on-init;
774 ti,no-idle;
775 timer@0 {
776 assigned-clocks = <&timer1_fck>;
777 assigned-clock-parents = <&devosc_ck>;
778 };
779 };
781 /* Preferred timer for clockevent */
782 &timer2_target {
783 ti,no-reset-on-init;
784 ti,no-idle;
785 timer@0 {
786 assigned-clocks = <&timer2_fck>;
787 assigned-clock-parents = <&devosc_ck>;
788 };
789 };