1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include "dra7-evm-common.dtsi"
9 #include "dra76x-mmc-iodelay.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
13 model = "TI DRA762 EVM";
14 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
24 device_type = "memory";
25 reg = <0x0 0x80000000 0x0 0x80000000>;
33 ipu2_cma_pool: ipu2_cma@95800000 {
34 compatible = "shared-dma-pool";
35 reg = <0x0 0x95800000 0x0 0x3800000>;
40 dsp1_cma_pool: dsp1_cma@99000000 {
41 compatible = "shared-dma-pool";
42 reg = <0x0 0x99000000 0x0 0x4000000>;
47 ipu1_cma_pool: ipu1_cma@9d000000 {
48 compatible = "shared-dma-pool";
49 reg = <0x0 0x9d000000 0x0 0x2000000>;
54 dsp2_cma_pool: dsp2_cma@9f000000 {
55 compatible = "shared-dma-pool";
56 reg = <0x0 0x9f000000 0x0 0x800000>;
62 vsys_12v0: fixedregulator-vsys12v0 {
64 compatible = "regulator-fixed";
65 regulator-name = "vsys_12v0";
66 regulator-min-microvolt = <12000000>;
67 regulator-max-microvolt = <12000000>;
72 vsys_5v0: fixedregulator-vsys5v0 {
73 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
74 compatible = "regulator-fixed";
75 regulator-name = "vsys_5v0";
76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <5000000>;
78 vin-supply = <&vsys_12v0>;
83 vio_3v6: fixedregulator-vio_3v6 {
84 compatible = "regulator-fixed";
85 regulator-name = "vio_3v6";
86 regulator-min-microvolt = <3600000>;
87 regulator-max-microvolt = <3600000>;
88 vin-supply = <&vsys_5v0>;
93 vsys_3v3: fixedregulator-vsys3v3 {
94 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
95 compatible = "regulator-fixed";
96 regulator-name = "vsys_3v3";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vsys_12v0>;
104 vio_3v3: fixedregulator-vio_3v3 {
105 compatible = "regulator-fixed";
106 regulator-name = "vio_3v3";
107 regulator-min-microvolt = <3300000>;
108 regulator-max-microvolt = <3300000>;
109 vin-supply = <&vsys_3v3>;
114 vio_3v3_sd: fixedregulator-sd {
115 compatible = "regulator-fixed";
116 regulator-name = "vio_3v3_sd";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 vin-supply = <&vio_3v3>;
121 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
124 vio_1v8: fixedregulator-vio_1v8 {
125 compatible = "regulator-fixed";
126 regulator-name = "vio_1v8";
127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <1800000>;
129 vin-supply = <&smps5_reg>;
132 vmmcwl_fixed: fixedregulator-mmcwl {
133 compatible = "regulator-fixed";
134 regulator-name = "vmmcwl_fixed";
135 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <1800000>;
137 gpio = <&gpio5 8 0>; /* gpio5_8 */
138 startup-delay-us = <70000>;
142 vtt_fixed: fixedregulator-vtt {
143 compatible = "regulator-fixed";
144 regulator-name = "vtt_fixed";
145 regulator-min-microvolt = <1350000>;
146 regulator-max-microvolt = <1350000>;
147 vin-supply = <&vsys_3v3>;
152 aic_dvdd: fixedregulator-aic_dvdd {
154 compatible = "regulator-fixed";
155 regulator-name = "aic_dvdd";
156 vin-supply = <&vio_3v3>;
157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <1800000>;
161 clk_ov5640_fixed: clock {
162 compatible = "fixed-clock";
164 clock-frequency = <24000000>;
168 compatible = "hdmi-connector";
174 hdmi_connector_in: endpoint {
175 remote-endpoint = <&tpd12s015_out>;
181 compatible = "ti,tpd12s015";
183 gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>, /* gpio7_30, CT CP HPD */
184 <&gpio7 31 GPIO_ACTIVE_HIGH>, /* gpio7_31, LS OE */
185 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
188 #address-cells = <1>;
194 tpd12s015_in: endpoint {
195 remote-endpoint = <&hdmi_out>;
202 tpd12s015_out: endpoint {
203 remote-endpoint = <&hdmi_connector_in>;
212 clock-frequency = <400000>;
214 tps65917: tps65917@58 {
215 compatible = "ti,tps65917";
217 ti,system-power-controller;
218 ti,palmas-override-powerhold;
219 interrupt-controller;
220 #interrupt-cells = <2>;
223 compatible = "ti,tps65917-pmic";
225 smps12-in-supply = <&vsys_3v3>;
226 smps3-in-supply = <&vsys_3v3>;
227 smps4-in-supply = <&vsys_3v3>;
228 smps5-in-supply = <&vsys_3v3>;
229 ldo1-in-supply = <&vsys_3v3>;
230 ldo2-in-supply = <&vsys_3v3>;
231 ldo3-in-supply = <&vsys_5v0>;
232 ldo4-in-supply = <&vsys_5v0>;
233 ldo5-in-supply = <&vsys_3v3>;
235 tps65917_regulators: regulators {
238 regulator-name = "smps12";
239 regulator-min-microvolt = <850000>;
240 regulator-max-microvolt = <1250000>;
247 regulator-name = "smps3";
248 regulator-min-microvolt = <850000>;
249 regulator-max-microvolt = <1250000>;
256 regulator-name = "smps4";
257 regulator-min-microvolt = <850000>;
258 regulator-max-microvolt = <1250000>;
265 regulator-name = "smps5";
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
273 /* LDO1_OUT --> VDA_PHY1_1V8 */
274 regulator-name = "ldo1";
275 regulator-min-microvolt = <1800000>;
276 regulator-max-microvolt = <1800000>;
279 regulator-allow-bypass;
283 /* LDO2_OUT --> VDA_PHY2_1V8 */
284 regulator-name = "ldo2";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 regulator-allow-bypass;
293 regulator-name = "ldo3";
294 regulator-min-microvolt = <3300000>;
295 regulator-max-microvolt = <3300000>;
302 regulator-name = "ldo5";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
311 regulator-name = "ldo4";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <3300000>;
320 tps65917_power_button {
321 compatible = "ti,palmas-pwrbutton";
322 interrupt-parent = <&tps65917>;
323 interrupts = <1 IRQ_TYPE_NONE>;
325 ti,palmas-long-press-seconds = <6>;
329 lp87565: lp87565@60 {
330 compatible = "ti,lp87565-q1";
333 buck10-in-supply =<&vsys_3v3>;
334 buck23-in-supply =<&vsys_3v3>;
336 regulators: regulators {
339 regulator-name = "buck10";
340 regulator-min-microvolt = <850000>;
341 regulator-max-microvolt = <1250000>;
348 regulator-name = "buck23";
349 regulator-min-microvolt = <850000>;
350 regulator-max-microvolt = <1250000>;
357 pcf_lcd: pcf8757@20 {
358 compatible = "ti,pcf8575", "nxp,pcf8575";
362 interrupt-controller;
363 #interrupt-cells = <2>;
364 interrupt-parent = <&gpio1>;
365 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
368 pcf_gpio_21: pcf8757@21 {
369 compatible = "ti,pcf8575", "nxp,pcf8575";
373 interrupt-parent = <&gpio1>;
374 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
375 interrupt-controller;
376 #interrupt-cells = <2>;
379 pcf_hdmi: pcf8575@26 {
380 compatible = "ti,pcf8575", "nxp,pcf8575";
385 /* vin6_sel_s0: high: VIN6, low: audio */
387 gpios = <1 GPIO_ACTIVE_HIGH>;
389 line-name = "vin6_sel_s0";
393 tlv320aic3106: tlv320aic3106@19 {
394 #sound-dai-cells = <0>;
395 compatible = "ti,tlv320aic3106";
397 adc-settle-ms = <40>;
398 ai3x-micbias-vg = <1>; /* 2.0V */
402 AVDD-supply = <&vio_3v3>;
403 IOVDD-supply = <&vio_3v3>;
404 DRVDD-supply = <&vio_3v3>;
405 DVDD-supply = <&aic_dvdd>;
411 clock-frequency = <400000>;
414 compatible = "ovti,ov5640";
417 clocks = <&clk_ov5640_fixed>;
418 clock-names = "xclk";
421 csi2_cam0: endpoint {
422 remote-endpoint = <&csi2_phy0>;
431 vdd-supply = <&buck10_reg>;
436 vmmc-supply = <&vio_3v3_sd>;
437 vqmmc-supply = <&ldo4_reg>;
440 * SDCD signal is not being used here - using the fact that GPIO mode
441 * is always hardwired.
443 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
444 pinctrl-names = "default", "hs";
445 pinctrl-0 = <&mmc1_pins_default>;
446 pinctrl-1 = <&mmc1_pins_hs>;
451 vmmc-supply = <&vio_1v8>;
452 vqmmc-supply = <&vio_1v8>;
455 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
456 pinctrl-0 = <&mmc2_pins_default>;
457 pinctrl-1 = <&mmc2_pins_default>;
458 pinctrl-2 = <&mmc2_pins_default>;
459 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
464 vmmc-supply = <&vio_3v6>;
465 vqmmc-supply = <&vmmcwl_fixed>;
466 pinctrl-names = "default", "hs", "sdr12", "sdr25";
467 pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>;
468 pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
469 pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
470 pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
473 /* No RTC on this device */
483 phy-handle = <&dp83867_0>;
484 phy-mode = "rgmii-id";
485 ti,dual-emac-pvid = <1>;
489 phy-handle = <&dp83867_1>;
490 phy-mode = "rgmii-id";
491 ti,dual-emac-pvid = <2>;
495 dp83867_0: ethernet-phy@2 {
497 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
498 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
499 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
500 ti,min-output-impedance;
501 ti,dp83867-rxctrl-strap-quirk;
504 dp83867_1: ethernet-phy@3 {
506 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
507 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
508 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
509 ti,min-output-impedance;
510 ti,dp83867-rxctrl-strap-quirk;
515 phy-supply = <&ldo3_reg>;
519 phy-supply = <&ldo3_reg>;
524 vdda_video-supply = <&ldo5_reg>;
530 vdda-supply = <&ldo1_reg>;
534 remote-endpoint = <&tpd12s015_in>;
540 spi-max-frequency = <96000000>;
542 spi-max-frequency = <96000000>;
552 phys = <&pcie1_phy>, <&pcie2_phy>;
553 phy-names = "pcie-phy0", "pcie-phy1";
558 phys = <&pcie1_phy>, <&pcie2_phy>;
559 phy-names = "pcie-phy0", "pcie-phy1";
563 vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
567 vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
572 max-bitrate = <5000000>;
577 csi2_phy0: endpoint {
578 remote-endpoint = <&csi2_cam0>;
586 memory-region = <&ipu2_cma_pool>;
591 memory-region = <&ipu1_cma_pool>;
596 memory-region = <&dsp1_cma_pool>;
601 memory-region = <&dsp2_cma_pool>;