1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
12 * The decompressor and also some bootloaders rely on a
13 * pre-existing /chosen node to be available to insert the
14 * command line and merge other ATAGS info.
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
57 compatible = "fsl,imx25-asic", "fsl,avic";
59 #interrupt-cells = <1>;
60 reg = <0x68000000 0x8000000>;
65 compatible = "fsl,imx-osc", "fixed-clock";
67 clock-frequency = <24000000>;
74 compatible = "simple-bus";
75 interrupt-parent = <&asic>;
78 bus@43f00000 { /* AIPS1 */
79 compatible = "fsl,aips-bus", "simple-bus";
82 reg = <0x43f00000 0x100000>;
85 aips1: bridge@43f00000 {
86 compatible = "fsl,imx25-aips";
87 reg = <0x43f00000 0x4000>;
93 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
94 reg = <0x43f80000 0x4000>;
102 #address-cells = <1>;
104 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
105 reg = <0x43f84000 0x4000>;
113 compatible = "fsl,imx25-flexcan";
114 reg = <0x43f88000 0x4000>;
116 clocks = <&clks 75>, <&clks 75>;
117 clock-names = "ipg", "per";
122 compatible = "fsl,imx25-flexcan";
123 reg = <0x43f8c000 0x4000>;
125 clocks = <&clks 76>, <&clks 76>;
126 clock-names = "ipg", "per";
130 uart1: serial@43f90000 {
131 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
132 reg = <0x43f90000 0x4000>;
134 clocks = <&clks 120>, <&clks 57>;
135 clock-names = "ipg", "per";
139 uart2: serial@43f94000 {
140 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
141 reg = <0x43f94000 0x4000>;
143 clocks = <&clks 121>, <&clks 57>;
144 clock-names = "ipg", "per";
149 #address-cells = <1>;
151 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
152 reg = <0x43f98000 0x4000>;
160 #address-cells = <1>;
162 reg = <0x43f9c000 0x4000>;
170 #address-cells = <1>;
172 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
173 reg = <0x43fa4000 0x4000>;
174 clocks = <&clks 78>, <&clks 78>;
175 clock-names = "ipg", "per";
181 #address-cells = <1>;
183 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
184 reg = <0x43fa8000 0x4000>;
185 clocks = <&clks 102>;
191 iomuxc: iomuxc@43fac000 {
192 compatible = "fsl,imx25-iomuxc";
193 reg = <0x43fac000 0x4000>;
196 audmux: audmux@43fb0000 {
197 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
198 reg = <0x43fb0000 0x4000>;
204 compatible = "fsl,spba-bus", "simple-bus";
205 #address-cells = <1>;
207 reg = <0x50000000 0x40000>;
211 #address-cells = <1>;
213 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
214 reg = <0x50004000 0x4000>;
216 clocks = <&clks 80>, <&clks 80>;
217 clock-names = "ipg", "per";
221 uart4: serial@50008000 {
222 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
223 reg = <0x50008000 0x4000>;
225 clocks = <&clks 123>, <&clks 57>;
226 clock-names = "ipg", "per";
230 uart3: serial@5000c000 {
231 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
232 reg = <0x5000c000 0x4000>;
234 clocks = <&clks 122>, <&clks 57>;
235 clock-names = "ipg", "per";
240 #address-cells = <1>;
242 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
243 reg = <0x50010000 0x4000>;
244 clocks = <&clks 79>, <&clks 79>;
245 clock-names = "ipg", "per";
251 #sound-dai-cells = <0>;
252 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
253 reg = <0x50014000 0x4000>;
255 clocks = <&clks 118>;
257 dmas = <&sdma 24 1 0>,
259 dma-names = "rx", "tx";
260 fsl,fifo-depth = <15>;
265 reg = <0x50018000 0x4000>;
269 uart5: serial@5002c000 {
270 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
271 reg = <0x5002c000 0x4000>;
273 clocks = <&clks 124>, <&clks 57>;
274 clock-names = "ipg", "per";
278 tscadc: tscadc@50030000 {
279 compatible = "fsl,imx25-tsadc";
280 reg = <0x50030000 0xc>;
282 clocks = <&clks 119>;
284 interrupt-controller;
285 #interrupt-cells = <1>;
286 #address-cells = <1>;
292 compatible = "fsl,imx25-gcq";
293 reg = <0x50030800 0x60>;
294 interrupt-parent = <&tscadc>;
296 #address-cells = <1>;
302 compatible = "fsl,imx25-tcq";
303 reg = <0x50030400 0x60>;
304 interrupt-parent = <&tscadc>;
312 #sound-dai-cells = <0>;
313 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
314 reg = <0x50034000 0x4000>;
316 clocks = <&clks 117>;
318 dmas = <&sdma 28 1 0>,
320 dma-names = "rx", "tx";
321 fsl,fifo-depth = <15>;
325 fec: ethernet@50038000 {
326 compatible = "fsl,imx25-fec";
327 reg = <0x50038000 0x4000>;
329 clocks = <&clks 88>, <&clks 65>;
330 clock-names = "ipg", "ahb";
335 bus@53f00000 { /* AIPS2 */
336 compatible = "fsl,aips-bus", "simple-bus";
337 #address-cells = <1>;
339 reg = <0x53f00000 0x100000>;
342 aips2: bridge@53f00000 {
343 compatible = "fsl,imx25-aips";
344 reg = <0x53f00000 0x4000>;
348 compatible = "fsl,imx25-ccm";
349 reg = <0x53f80000 0x4000>;
354 gpt4: timer@53f84000 {
355 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
356 reg = <0x53f84000 0x4000>;
357 clocks = <&clks 95>, <&clks 47>;
358 clock-names = "ipg", "per";
362 gpt3: timer@53f88000 {
363 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
364 reg = <0x53f88000 0x4000>;
365 clocks = <&clks 94>, <&clks 47>;
366 clock-names = "ipg", "per";
370 gpt2: timer@53f8c000 {
371 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
372 reg = <0x53f8c000 0x4000>;
373 clocks = <&clks 93>, <&clks 47>;
374 clock-names = "ipg", "per";
378 gpt1: timer@53f90000 {
379 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
380 reg = <0x53f90000 0x4000>;
381 clocks = <&clks 92>, <&clks 47>;
382 clock-names = "ipg", "per";
386 epit1: timer@53f94000 {
387 compatible = "fsl,imx25-epit";
388 reg = <0x53f94000 0x4000>;
389 clocks = <&clks 83>, <&clks 43>;
390 clock-names = "ipg", "per";
394 epit2: timer@53f98000 {
395 compatible = "fsl,imx25-epit";
396 reg = <0x53f98000 0x4000>;
397 clocks = <&clks 84>, <&clks 43>;
398 clock-names = "ipg", "per";
402 gpio4: gpio@53f9c000 {
403 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
404 reg = <0x53f9c000 0x4000>;
408 interrupt-controller;
409 #interrupt-cells = <2>;
413 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
415 reg = <0x53fa0000 0x4000>;
416 clocks = <&clks 106>, <&clks 52>;
417 clock-names = "ipg", "per";
421 gpio3: gpio@53fa4000 {
422 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
423 reg = <0x53fa4000 0x4000>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
432 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
434 reg = <0x53fa8000 0x4000>;
435 clocks = <&clks 107>, <&clks 52>;
436 clock-names = "ipg", "per";
440 scc: crypto@53fac000 {
441 compatible = "fsl,imx25-scc";
442 reg = <0x53fac000 0x4000>;
443 clocks = <&clks 111>;
445 interrupts = <49>, <50>;
446 interrupt-names = "scm", "smn";
449 rngb: rngb@53fb0000 {
450 compatible = "fsl,imx25-rngb";
451 reg = <0x53fb0000 0x4000>;
452 clocks = <&clks 109>;
456 esdhc1: mmc@53fb4000 {
457 compatible = "fsl,imx25-esdhc";
458 reg = <0x53fb4000 0x4000>;
460 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
461 clock-names = "ipg", "ahb", "per";
465 esdhc2: mmc@53fb8000 {
466 compatible = "fsl,imx25-esdhc";
467 reg = <0x53fb8000 0x4000>;
469 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
470 clock-names = "ipg", "ahb", "per";
474 lcdc: lcdc@53fbc000 {
475 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
476 reg = <0x53fbc000 0x4000>;
478 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
479 clock-names = "ipg", "ahb", "per";
484 reg = <0x53fc0000 0x4000>;
490 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
492 reg = <0x53fc8000 0x4000>;
493 clocks = <&clks 108>, <&clks 52>;
494 clock-names = "ipg", "per";
498 gpio1: gpio@53fcc000 {
499 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
500 reg = <0x53fcc000 0x4000>;
504 interrupt-controller;
505 #interrupt-cells = <2>;
508 gpio2: gpio@53fd0000 {
509 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
510 reg = <0x53fd0000 0x4000>;
514 interrupt-controller;
515 #interrupt-cells = <2>;
518 sdma: sdma@53fd4000 {
519 compatible = "fsl,imx25-sdma";
520 reg = <0x53fd4000 0x4000>;
521 clocks = <&clks 112>, <&clks 68>;
522 clock-names = "ipg", "ahb";
525 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
529 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
530 reg = <0x53fdc000 0x4000>;
531 clocks = <&clks 126>;
537 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
539 reg = <0x53fe0000 0x4000>;
540 clocks = <&clks 105>, <&clks 52>;
541 clock-names = "ipg", "per";
545 iim: efuse@53ff0000 {
546 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
547 reg = <0x53ff0000 0x4000>;
552 usbotg: usb@53ff4000 {
553 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
554 reg = <0x53ff4000 0x0200>;
556 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
557 clock-names = "ipg", "ahb", "per";
558 fsl,usbmisc = <&usbmisc 0>;
559 fsl,usbphy = <&usbphy0>;
565 usbhost1: usb@53ff4400 {
566 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
567 reg = <0x53ff4400 0x0200>;
569 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
570 clock-names = "ipg", "ahb", "per";
571 fsl,usbmisc = <&usbmisc 1>;
572 fsl,usbphy = <&usbphy1>;
573 maximum-speed = "full-speed";
579 usbmisc: usbmisc@53ff4600 {
581 compatible = "fsl,imx25-usbmisc";
582 reg = <0x53ff4600 0x00f>;
586 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
587 reg = <0x53ffc000 0x4000>;
590 interrupts = <25 56>;
594 iram: sram@78000000 {
595 compatible = "mmio-sram";
596 reg = <0x78000000 0x20000>;
600 compatible = "fsl,emi-bus", "simple-bus";
601 #address-cells = <1>;
603 reg = <0x80000000 0x3b002000>;
607 #address-cells = <1>;
610 compatible = "fsl,imx25-nand";
611 reg = <0xbb000000 0x2000>;
621 compatible = "simple-bus";
622 #address-cells = <1>;
627 compatible = "usb-nop-xceiv";
633 compatible = "usb-nop-xceiv";