1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2019 Logic PD, Inc.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
14 device_type = "memory";
15 reg = <0x10000000 0x80000000>;
18 reg_wl18xx_vmmc: regulator-wl18xx {
19 compatible = "regulator-fixed";
20 regulator-name = "vwl1837";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
24 startup-delay-us = <70000>;
30 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
31 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
32 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
33 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_gpmi_nand>;
44 clock-frequency = <100000>;
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_i2c3>;
50 compatible = "fsl,pfuze100";
55 regulator-min-microvolt = <725000>;
56 regulator-max-microvolt = <1450000>;
57 regulator-name = "vddcore";
60 regulator-ramp-delay = <6250>;
64 regulator-min-microvolt = <725000>;
65 regulator-max-microvolt = <1450000>;
66 regulator-name = "vddsoc";
69 regulator-ramp-delay = <6250>;
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 regulator-name = "gen_3v3";
80 regulator-min-microvolt = <1350000>;
81 regulator-max-microvolt = <1350000>;
82 regulator-name = "sw3a_vddr";
88 regulator-min-microvolt = <1350000>;
89 regulator-max-microvolt = <1350000>;
90 regulator-name = "sw3b_vddr";
96 regulator-min-microvolt = <1800000>;
97 regulator-max-microvolt = <3300000>;
98 regulator-name = "gen_rgmii";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5150000>;
104 regulator-name = "gen_5v0";
108 regulator-min-microvolt = <1000000>;
109 regulator-max-microvolt = <3000000>;
110 regulator-name = "gen_vsns";
121 regulator-min-microvolt = <1500000>;
122 regulator-max-microvolt = <1500000>;
123 regulator-name = "gen_1v5";
127 regulator-name = "vgen2";
128 regulator-min-microvolt = <800000>;
129 regulator-max-microvolt = <1550000>;
133 regulator-name = "gen_vadj_0";
134 regulator-min-microvolt = <1800000>;
135 regulator-max-microvolt = <3300000>;
139 regulator-name = "gen_1v8";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <1800000>;
146 regulator-name = "gen_vadj_1";
147 regulator-min-microvolt = <1800000>;
148 regulator-max-microvolt = <3300000>;
153 regulator-name = "gen_2v5";
154 regulator-min-microvolt = <2500000>;
155 regulator-max-microvolt = <2500000>;
160 regulator-min-microvolt = <2500000>;
161 regulator-max-microvolt = <3000000>;
167 temperature-sensor@49 {
168 compatible = "ti,tmp102";
170 interrupt-parent = <&gpio6>;
171 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
172 #thermal-sensor-cells = <1>;
175 temperature-sensor@4a {
176 compatible = "ti,tmp102";
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_tempsense>;
180 interrupt-parent = <&gpio6>;
181 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
182 #thermal-sensor-cells = <1>;
186 compatible = "atmel,24c64";
188 read-only; /* Manufacturing EEPROM programmed at factory */
193 compatible = "atmel,24c64";
199 /* Reroute power feeding the CPU to come from the external PMIC */
202 vin-supply = <&sw1a_reg>;
207 vin-supply = <&sw1c_reg>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_hog>;
218 pinctrl_gpmi_nand: gpmi-nandgrp {
220 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
221 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
222 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
223 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
224 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
225 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
226 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
227 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
228 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
229 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
230 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
231 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
232 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
233 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
234 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
238 pinctrl_hog: hoggrp {
239 fsl,pins = < /* Enable ARM Debugger */
240 MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
241 MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0
242 MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
243 MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
244 MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
245 MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
246 MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
247 MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
248 MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
249 MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
250 MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
251 MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
252 MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
253 MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
254 MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
255 MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
256 MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
257 MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
258 MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
259 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
263 pinctrl_i2c3: i2c3grp {
265 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
266 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
270 pinctrl_tempsense: tempsensegrp {
272 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
276 pinctrl_uart1: uart1grp {
278 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
279 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
283 pinctrl_uart2: uart2grp {
285 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
286 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
287 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
288 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
289 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
293 pinctrl_usdhc1: usdhc1grp {
295 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
296 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
297 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
298 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
299 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
300 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
304 pinctrl_usdhc3: usdhc3grp {
306 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049
307 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049
308 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
309 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
310 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
311 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
312 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
313 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_uart1>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_uart2>;
335 compatible = "ti,wl1837-st";
336 enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
341 pinctrl-names = "default", "state_100mhz", "state_200mhz";
342 pinctrl-0 = <&pinctrl_usdhc1>;
344 keep-power-in-suspend;
346 vmmc-supply = <&sw2_reg>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&pinctrl_usdhc3>;
355 keep-power-in-suspend;
357 vmmc-supply = <®_wl18xx_vmmc>;
358 #address-cells = <1>;
363 compatible = "ti,wl1837";
365 interrupt-parent = <&gpio7>;
366 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
367 tcxo-clock-frequency = <26000000>;