arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/pwm/pwm.h>
   9
  10 / {
  11         aliases: aliases {
  12                 ethernet1 = &eth1;
  13                 ethernet2 = &eth2;
  14         };
  15
  16         backlight: backlight {
  17                 compatible = "pwm-backlight";
  18                 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
  19                 brightness-levels = <0 32 64 128 255>;
  20                 default-brightness-level = <32>;
  21                 num-interpolated-steps = <8>;
  22                 power-supply = <&sw2_reg>;
  23                 status = "disabled";
  24         };
  25
  26         lcd_display: display {
  27                 compatible = "fsl,imx-parallel-display";
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30                 interface-pix-fmt = "rgb24";
  31                 pinctrl-names = "default";
  32                 pinctrl-0 = <&pinctrl_ipu1>;
  33                 status = "disabled";
  34
  35                 port@0 {
  36                         reg = <0>;
  37
  38                         lcd_display_in: endpoint {
  39                                 remote-endpoint = <&ipu1_di0_disp0>;
  40                         };
  41                 };
  42
  43                 port@1 {
  44                         reg = <1>;
  45
  46                         lcd_display_out: endpoint {
  47                                 remote-endpoint = <&lcd_panel_in>;
  48                         };
  49                 };
  50         };
  51
  52         panel: panel {
  53                 compatible = "dataimage,scf0700c48ggu18";
  54                 power-supply = <&sw2_reg>;
  55                 status = "disabled";
  56
  57                 port {
  58                         lcd_panel_in: endpoint {
  59                                 remote-endpoint = <&lcd_display_out>;
  60                         };
  61                 };
  62         };
  63
  64         reg_pcie: regulator-pcie {
  65                 compatible = "regulator-fixed";
  66                 pinctrl-names = "default";
  67                 pinctrl-0 = <&pinctrl_pcie_reg>;
  68                 regulator-name = "MPCIE_3V3";
  69                 regulator-min-microvolt = <3300000>;
  70                 regulator-max-microvolt = <3300000>;
  71                 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  72                 enable-active-high;
  73                 status = "disabled";
  74         };
  75
  76         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  77                 compatible = "regulator-fixed";
  78                 pinctrl-names = "default";
  79                 pinctrl-0 = <&pinctrl_usbh1_vbus>;
  80                 regulator-name = "usb_h1_vbus";
  81                 regulator-min-microvolt = <5000000>;
  82                 regulator-max-microvolt = <5000000>;
  83                 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
  84                 enable-active-high;
  85                 status = "disabled";
  86         };
  87
  88         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  89                 compatible = "regulator-fixed";
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&pinctrl_usbotg_vbus>;
  92                 regulator-name = "usb_otg_vbus";
  93                 regulator-min-microvolt = <5000000>;
  94                 regulator-max-microvolt = <5000000>;
  95                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  96                 enable-active-high;
  97                 status = "okay";
  98         };
  99 };
 100
 101 &fec {
 102         pinctrl-names = "default";
 103         pinctrl-0 = <&pinctrl_enet>;
 104         phy-mode = "rgmii-id";
 105         phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 106         phy-reset-duration = <20>;
 107         phy-supply = <&sw2_reg>;
 108         phy-handle = <&ethphy0>;
 109         status = "okay";
 110
 111         mdio {
 112                 #address-cells = <1>;
 113                 #size-cells = <0>;
 114
 115                 phy_port2: phy@1 {
 116                         reg = <1>;
 117                 };
 118
 119                 phy_port3: phy@2 {
 120                         reg = <2>;
 121                 };
 122
 123                 switch@10 {
 124                         compatible = "qca,qca8334";
 125                         reg = <10>;
 126
 127                         switch_ports: ports {
 128                                 #address-cells = <1>;
 129                                 #size-cells = <0>;
 130
 131                                 ethphy0: port@0 {
 132                                         reg = <0>;
 133                                         label = "cpu";
 134                                         phy-mode = "rgmii-id";
 135                                         ethernet = <&fec>;
 136
 137                                         fixed-link {
 138                                                 speed = <1000>;
 139                                                 full-duplex;
 140                                         };
 141                                 };
 142
 143                                 eth2: port@2 {
 144                                         reg = <2>;
 145                                         label = "eth2";
 146                                         phy-handle = <&phy_port2>;
 147                                 };
 148
 149                                 eth1: port@3 {
 150                                         reg = <3>;
 151                                         label = "eth1";
 152                                         phy-handle = <&phy_port3>;
 153                                 };
 154                         };
 155                 };
 156         };
 157 };
 158
 159 &hdmi {
 160         pinctrl-names = "default";
 161         pinctrl-0 = <&pinctrl_hdmi_cec>;
 162         ddc-i2c-bus = <&i2c2>;
 163         status = "disabled";
 164 };
 165
 166 &i2c2 {
 167         clock-frequency = <100000>;
 168         pinctrl-names = "default";
 169         pinctrl-0 = <&pinctrl_i2c2>;
 170         status = "okay";
 171
 172         pmic@8 {
 173                 compatible = "fsl,pfuze200";
 174                 pinctrl-names = "default";
 175                 pinctrl-0 = <&pinctrl_pmic>;
 176                 reg = <0x8>;
 177
 178                 regulators {
 179                         sw1a_reg: sw1ab {
 180                                 regulator-min-microvolt = <300000>;
 181                                 regulator-max-microvolt = <1875000>;
 182                                 regulator-boot-on;
 183                                 regulator-always-on;
 184                                 regulator-ramp-delay = <6250>;
 185                         };
 186
 187                         sw2_reg: sw2 {
 188                                 regulator-min-microvolt = <800000>;
 189                                 regulator-max-microvolt = <3300000>;
 190                                 regulator-boot-on;
 191                                 regulator-always-on;
 192                         };
 193
 194                         sw3a_reg: sw3a {
 195                                 regulator-min-microvolt = <400000>;
 196                                 regulator-max-microvolt = <1975000>;
 197                                 regulator-boot-on;
 198                                 regulator-always-on;
 199                         };
 200
 201                         sw3b_reg: sw3b {
 202                                 regulator-min-microvolt = <400000>;
 203                                 regulator-max-microvolt = <1975000>;
 204                                 regulator-boot-on;
 205                                 regulator-always-on;
 206                         };
 207
 208                         swbst_reg: swbst {
 209                                 regulator-min-microvolt = <5000000>;
 210                                 regulator-max-microvolt = <5150000>;
 211                         };
 212
 213                         vgen1_reg: vgen1 {
 214                                 regulator-min-microvolt = <800000>;
 215                                 regulator-max-microvolt = <1550000>;
 216                         };
 217
 218                         vgen2_reg: vgen2 {
 219                                 regulator-min-microvolt = <800000>;
 220                                 regulator-max-microvolt = <1550000>;
 221                         };
 222
 223                         vgen3_reg: vgen3 {
 224                                 regulator-min-microvolt = <1800000>;
 225                                 regulator-max-microvolt = <3300000>;
 226                                 regulator-always-on;
 227                         };
 228
 229                         vgen4_reg: vgen4 {
 230                                 regulator-min-microvolt = <1800000>;
 231                                 regulator-max-microvolt = <3300000>;
 232                                 regulator-always-on;
 233                         };
 234
 235                         vgen5_reg: vgen5 {
 236                                 regulator-min-microvolt = <1800000>;
 237                                 regulator-max-microvolt = <3300000>;
 238                                 regulator-always-on;
 239                         };
 240
 241                         vgen6_reg: vgen6 {
 242                                 regulator-min-microvolt = <1800000>;
 243                                 regulator-max-microvolt = <3300000>;
 244                                 regulator-always-on;
 245                         };
 246
 247                         vref_reg: vrefddr {
 248                                 regulator-boot-on;
 249                                 regulator-always-on;
 250                         };
 251
 252                         vsnvs_reg: vsnvs {
 253                                 regulator-min-microvolt = <1000000>;
 254                                 regulator-max-microvolt = <3000000>;
 255                                 regulator-boot-on;
 256                                 regulator-always-on;
 257                         };
 258                 };
 259         };
 260
 261         leds: led-controller@30 {
 262                 compatible = "ti,lp5562";
 263                 reg = <0x30>;
 264                 clock-mode = /bits/ 8 <1>;
 265                 status = "disabled";
 266                 #address-cells = <1>;
 267                 #size-cells = <0>;
 268
 269                 chan@0 {
 270                         chan-name = "R";
 271                         led-cur = /bits/ 8 <0x20>;
 272                         max-cur = /bits/ 8 <0x60>;
 273                         reg = <0>;
 274                 };
 275
 276                 chan@1 {
 277                         chan-name = "G";
 278                         led-cur = /bits/ 8 <0x20>;
 279                         max-cur = /bits/ 8 <0x60>;
 280                         reg = <1>;
 281                 };
 282
 283                 chan@2 {
 284                         chan-name = "B";
 285                         led-cur = /bits/ 8 <0x20>;
 286                         max-cur = /bits/ 8 <0x60>;
 287                         reg = <2>;
 288                 };
 289
 290                 chan@3 {
 291                         chan-name = "W";
 292                         led-cur = /bits/ 8 <0x0>;
 293                         max-cur = /bits/ 8 <0x0>;
 294                         reg = <3>;
 295                 };
 296         };
 297
 298         eeprom@57 {
 299                 compatible = "atmel,24c128";
 300                 reg = <0x57>;
 301                 pagesize = <64>;
 302                 status = "okay";
 303         };
 304
 305         touchscreen: touchscreen@5c {
 306                 compatible = "pixcir,pixcir_tangoc";
 307                 reg = <0x5c>;
 308                 pinctrl-0 = <&pinctrl_touch>;
 309                 interrupt-parent = <&gpio4>;
 310                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
 311                 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
 312                 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 313                 touchscreen-size-x = <800>;
 314                 touchscreen-size-y = <480>;
 315                 status = "disabled";
 316         };
 317 };
 318
 319 &i2c3 {
 320         clock-frequency = <100000>;
 321         pinctrl-names = "default";
 322         pinctrl-0 = <&pinctrl_i2c3>;
 323         status = "okay";
 324
 325         oled_1309: oled@3c {
 326                 compatible = "solomon,ssd1309fb-i2c";
 327                 reg = <0x3c>;
 328                 solomon,height = <64>;
 329                 solomon,width = <128>;
 330                 solomon,page-offset = <0>;
 331                 solomon,segment-no-remap;
 332                 solomon,prechargep2 = <15>;
 333                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 334                 vbat-supply = <&sw2_reg>;
 335                 status = "disabled";
 336         };
 337
 338         oled_1305: oled@3d {
 339                 compatible = "solomon,ssd1305fb-i2c";
 340                 reg = <0x3d>;
 341                 solomon,height = <64>;
 342                 solomon,width = <128>;
 343                 solomon,page-offset = <0>;
 344                 solomon,prechargep2 = <15>;
 345                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 346                 vbat-supply = <&sw2_reg>;
 347                 status = "disabled";
 348         };
 349
 350         gpio_oled: gpio@41 {
 351                 compatible = "nxp,pca9536";
 352                 gpio-controller;
 353                 #gpio-cells = <2>;
 354                 reg = <0x41>;
 355                 vcc-supply = <&sw2_reg>;
 356                 status = "disabled";
 357         };
 358
 359         touchkeys: keys@5a {
 360                 compatible = "fsl,mpr121-touchkey";
 361                 reg = <0x5a>;
 362                 vdd-supply = <&sw2_reg>;
 363                 autorepeat;
 364                 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
 365                                 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
 366                                 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
 367                 poll-interval = <50>;
 368                 status = "disabled";
 369         };
 370 };
 371
 372 &iomuxc {
 373         pinctrl_enet: enetgrp {
 374                 fsl,pins = <
 375                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b020
 376                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b020
 377                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b020
 378                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b020
 379                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b020
 380                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b020
 381                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b020
 382                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b020
 383                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b020
 384                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b020
 385                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b020
 386                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b020
 387                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b020
 388                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b020
 389                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b010
 390                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x1b010
 391                         MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b098
 392                 >;
 393         };
 394
 395         pinctrl_hdmi_cec: hdmicecgrp {
 396                 fsl,pins = <
 397                         MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE    0x1b898
 398                 >;
 399         };
 400
 401         pinctrl_i2c2: i2c2grp {
 402                 fsl,pins = <
 403                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b899
 404                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b899
 405                 >;
 406         };
 407
 408         pinctrl_i2c3: i2c3grp {
 409                 fsl,pins = <
 410                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b899
 411                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b899
 412                 >;
 413         };
 414
 415         pinctrl_ipu1: ipu1grp {
 416                 fsl,pins = <
 417                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x10
 418                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x10
 419                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x10
 420                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x10
 421                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x10
 422                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x10
 423                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x10
 424                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x10
 425                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x10
 426                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x10
 427                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x10
 428                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x10
 429                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x10
 430                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x10
 431                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x10
 432                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x10
 433                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x10
 434                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x10
 435                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x10
 436                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x10
 437                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x10
 438                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18       0x10
 439                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19       0x10
 440                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20       0x10
 441                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21       0x10
 442                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22       0x10
 443                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23       0x10
 444                 >;
 445         };
 446
 447         pinctrl_pcie: pciegrp {
 448                 fsl,pins = <
 449                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b098
 450                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b098
 451                         MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20     0x1b098
 452                 >;
 453         };
 454
 455         pinctrl_pcie_reg: pciereggrp {
 456                 fsl,pins = <
 457                         MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b098
 458                 >;
 459         };
 460
 461         pinctrl_pmic: pmicgrp {
 462                 fsl,pins = <
 463                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b098
 464                 >;
 465         };
 466
 467         pinctrl_pwm1: pwm1grp {
 468                 fsl,pins = <
 469                         MX6QDL_PAD_GPIO_9__PWM1_OUT     0x8
 470                 >;
 471         };
 472
 473         pinctrl_touch: touchgrp {
 474                 fsl,pins = <
 475                         MX6QDL_PAD_GPIO_19__GPIO4_IO05  0x1b098
 476                         MX6QDL_PAD_GPIO_2__GPIO1_IO02   0x1b098
 477                 >;
 478         };
 479
 480         pinctrl_uart1: uart1grp {
 481                 fsl,pins = <
 482                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0a8
 483                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0a8
 484                 >;
 485         };
 486
 487         pinctrl_uart2: uart2grp {
 488                 fsl,pins = <
 489                         MX6QDL_PAD_GPIO_7__UART2_TX_DATA        0x1b098
 490                         MX6QDL_PAD_GPIO_8__UART2_RX_DATA        0x1b098
 491                 >;
 492         };
 493
 494         pinctrl_usbh1: usbh1grp {
 495                 fsl,pins = <
 496                         MX6QDL_PAD_EIM_D30__USB_H1_OC   0x1b098
 497                 >;
 498         };
 499
 500         pinctrl_usbh1_vbus: usbh1-vbus {
 501                 fsl,pins = <
 502                         MX6QDL_PAD_ENET_TXD1__GPIO1_IO29        0x98
 503                 >;
 504         };
 505
 506         pinctrl_usbotg: usbotggrp {
 507                 fsl,pins = <
 508                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x1b098
 509                         MX6QDL_PAD_EIM_D21__USB_OTG_OC          0x1b098
 510                 >;
 511         };
 512
 513         pinctrl_usbotg_vbus: usbotg-vbus {
 514                 fsl,pins = <
 515                         MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x98
 516                 >;
 517         };
 518
 519         pinctrl_usdhc3: usdhc3grp {
 520                 fsl,pins = <
 521                         MX6QDL_PAD_EIM_A16__GPIO2_IO22  0x1b018
 522                         MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x1b018
 523                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 524                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 525                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 526                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 527                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 528                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 529                 >;
 530         };
 531
 532         pinctrl_usdhc4: usdhc4grp {
 533                 fsl,pins = <
 534                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x1f069
 535                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x10069
 536                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17069
 537                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17069
 538                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17069
 539                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17069
 540                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17069
 541                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17069
 542                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17069
 543                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17069
 544                 >;
 545         };
 546
 547         pinctrl_wdog: wdoggrp {
 548                 fsl,pins = <
 549                         MX6QDL_PAD_GPIO_1__WDOG2_B      0x1b0b0
 550                 >;
 551         };
 552 };
 553
 554 &ipu1_di0_disp0 {
 555         remote-endpoint = <&lcd_display_in>;
 556 };
 557
 558 &pcie {
 559         pinctrl-names = "default";
 560         pinctrl-0 = <&pinctrl_pcie>;
 561         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 562         vpcie-supply = <&reg_pcie>;
 563         status = "disabled";
 564 };
 565
 566 &pwm1 {
 567         pinctrl-names = "default";
 568         pinctrl-0 = <&pinctrl_pwm1>;
 569         status = "disabled";
 570 };
 571
 572 &uart1 {
 573         pinctrl-names = "default";
 574         pinctrl-0 = <&pinctrl_uart1>;
 575         status = "okay";
 576 };
 577
 578 &uart2 {
 579         pinctrl-names = "default";
 580         pinctrl-0 = <&pinctrl_uart2>;
 581         status = "okay";
 582 };
 583
 584 &usbh1 {
 585         pinctrl-names = "default";
 586         pinctrl-0 = <&pinctrl_usbh1>;
 587         vbus-supply = <&reg_usb_h1_vbus>;
 588         over-current-active-low;
 589         status = "disabled";
 590 };
 591
 592 &usbotg {
 593         pinctrl-names = "default";
 594         pinctrl-0 = <&pinctrl_usbotg>;
 595         vbus-supply = <&reg_usb_otg_vbus>;
 596         over-current-active-low;
 597         srp-disable;
 598         hnp-disable;
 599         adp-disable;
 600         status = "okay";
 601 };
 602
 603 &usbphy1 {
 604         fsl,tx-d-cal = <106>;
 605         status = "okay";
 606 };
 607
 608 &usbphy2 {
 609         fsl,tx-d-cal = <109>;
 610         status = "disabled";
 611 };
 612
 613 &usdhc3 {
 614         pinctrl-names = "default";
 615         pinctrl-0 = <&pinctrl_usdhc3>;
 616         bus-width = <4>;
 617         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
 618         wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
 619         no-1-8-v;
 620         keep-power-in-suspend;
 621         wakeup-source;
 622         vmmc-supply = <&sw2_reg>;
 623         status = "disabled";
 624 };
 625
 626 &usdhc4 {
 627         pinctrl-names = "default";
 628         pinctrl-0 = <&pinctrl_usdhc4>;
 629         bus-width = <8>;
 630         non-removable;
 631         no-1-8-v;
 632         keep-power-in-suspend;
 633         vmmc-supply = <&sw2_reg>;
 634         status = "okay";
 635 };
 636
 637 &wdog1 {
 638         status = "disabled";
 639 };
 640
 641 &wdog2 {
 642         pinctrl-names = "default";
 643         pinctrl-0 = <&pinctrl_wdog>;
 644         fsl,ext-reset-output;
 645         status = "okay";
 646 };