arch/arm/boot/dts/omap3-tao3530.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   4  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
   5  */
   6 /dts-v1/;
   7
   8 #include "omap34xx.dtsi"
   9
  10 /* Secure omaps have some devices inaccessible depending on the firmware */
  11 &aes1_target {
  12         status = "disabled";
  13 };
  14
  15 &aes2_target {
  16         status = "disabled";
  17 };
  18
  19 &sham {
  20         status = "disabled";
  21 };
  22
  23 / {
  24         cpus {
  25                 cpu@0 {
  26                         cpu0-supply = <&vcc>;
  27                 };
  28         };
  29
  30         memory@80000000 {
  31                 device_type = "memory";
  32                 reg = <0x80000000 0x10000000>; /* 256 MB */
  33         };
  34
  35         /* HS USB Port 2 Power */
  36         hsusb2_power: hsusb2_power_reg {
  37                 compatible = "regulator-fixed";
  38                 regulator-name = "hsusb2_vbus";
  39                 regulator-min-microvolt = <3300000>;
  40                 regulator-max-microvolt = <3300000>;
  41                 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
  42                 startup-delay-us = <70000>;
  43         };
  44
  45         /* HS USB Host PHY on PORT 2 */
  46         hsusb2_phy: hsusb2_phy {
  47                 compatible = "usb-nop-xceiv";
  48                 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;       /* gpio_162 */
  49                 vcc-supply = <&hsusb2_power>;
  50                 #phy-cells = <0>;
  51         };
  52
  53         sound {
  54                 compatible = "ti,omap-twl4030";
  55                 ti,model = "omap3beagle";
  56
  57                 /* McBSP2 is used for onboard sound, same as on beagle */
  58                 ti,mcbsp = <&mcbsp2>;
  59         };
  60
  61         /* Regulator to enable/switch the vcc of the Wifi module */
  62         mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "regulator-mmc2-sdio-poweron";
  65                 regulator-min-microvolt = <3150000>;
  66                 regulator-max-microvolt = <3150000>;
  67                 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;             /* gpio_157 */
  68                 startup-delay-us = <10000>;
  69         };
  70 };
  71
  72 &omap3_pmx_core {
  73         hsusbb2_pins: pinmux_hsusbb2_pins {
  74                 pinctrl-single,pins = <
  75                         OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)               /* etk_d10.hsusb2_clk */
  76                         OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)               /* etk_d11.hsusb2_stp */
  77                         OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d12.hsusb2_dir */
  78                         OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d13.hsusb2_nxt */
  79                         OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d14.hsusb2_data0 */
  80                         OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d15.hsusb2_data1 */
  81                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
  82                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
  83                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
  84                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
  85                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
  86                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
  87                 >;
  88         };
  89
  90         mmc1_pins: pinmux_mmc1_pins {
  91                 pinctrl-single,pins = <
  92                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  93                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  94                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  95                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  96                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  97                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  98                         OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
  99                         OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
 100                         OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
 101                         OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
 102                 >;
 103         };
 104
 105         mmc2_pins: pinmux_mmc2_pins {
 106                 pinctrl-single,pins = <
 107                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
 108                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
 109                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
 110                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
 111                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
 112                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
 113                 >;
 114         };
 115
 116         /* wlan GPIO output for WLAN_EN */
 117         wlan_gpio: pinmux_wlan_gpio {
 118                 pinctrl-single,pins = <
 119                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr gpio_157 */
 120                 >;
 121         };
 122
 123         uart3_pins: pinmux_uart3_pins {
 124                 pinctrl-single,pins = <
 125                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
 126                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx.uart3_tx_irtx */
 127                 >;
 128         };
 129
 130         i2c3_pins: pinmux_i2c3_pins {
 131                 pinctrl-single,pins = <
 132                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */
 133                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */
 134                 >;
 135         };
 136
 137         mcspi1_pins: pinmux_mcspi1_pins {
 138                 pinctrl-single,pins = <
 139                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
 140                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
 141                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
 142                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
 143                 >;
 144         };
 145
 146         mcspi3_pins: pinmux_mcspi3_pins {
 147                 pinctrl-single,pins = <
 148                         OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1)       /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
 149                         OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
 150                         OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1)       /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
 151                         OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1)        /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
 152                 >;
 153         };
 154
 155         mcbsp3_pins: pinmux_mcbsp3_pins {
 156                 pinctrl-single,pins = <
 157                         OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)       /* mcbsp3_dx.uart2_cts */
 158                         OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)        /* mcbsp3_dr.uart2_rts */
 159                         OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)        /* mcbsp3_clk.uart2_tx */
 160                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)        /* mcbsp3_fsx.uart2_rx */
 161                 >;
 162         };
 163 };
 164
 165 /* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
 166 &mcbsp1 {
 167         status = "disabled";
 168 };
 169
 170 &mcbsp2 {
 171         status = "okay";
 172 };
 173
 174 &i2c1 {
 175         clock-frequency = <2600000>;
 176
 177         twl: twl@48 {
 178                 reg = <0x48>;
 179                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 180                 interrupt-parent = <&intc>;
 181
 182                 twl_audio: audio {
 183                         compatible = "ti,twl4030-audio";
 184                         codec {
 185                         };
 186                 };
 187         };
 188 };
 189
 190 &i2c3 {
 191         clock-frequency = <100000>;
 192
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&i2c3_pins>;
 195 };
 196
 197 &mcspi1 {
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&mcspi1_pins>;
 200
 201         spidev@0 {
 202                 compatible = "spidev";
 203                 spi-max-frequency = <48000000>;
 204                 reg = <0>;
 205                 spi-cpha;
 206         };
 207 };
 208
 209 &mcspi3 {
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&mcspi3_pins>;
 212
 213         spidev@0 {
 214                 compatible = "spidev";
 215                 spi-max-frequency = <48000000>;
 216                 reg = <0>;
 217                 spi-cpha;
 218         };
 219 };
 220
 221 #include "twl4030.dtsi"
 222 #include "twl4030_omap3.dtsi"
 223
 224 &mmc1 {
 225         pinctrl-names = "default";
 226         pinctrl-0 = <&mmc1_pins>;
 227         vmmc-supply = <&vmmc1>;
 228         vqmmc-supply = <&vsim>;
 229         cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
 230         bus-width = <8>;
 231 };
 232
 233 // WiFi (Marvell 88W8686) on MMC2/SDIO
 234 &mmc2 {
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&mmc2_pins>;
 237         vmmc-supply = <&mmc2_sdio_poweron>;
 238         non-removable;
 239         bus-width = <4>;
 240         cap-power-off-card;
 241 };
 242
 243 &mmc3 {
 244         status = "disabled";
 245 };
 246
 247 &usbhshost {
 248         port2-mode = "ehci-phy";
 249 };
 250
 251 &usbhsehci {
 252         phys = <0 &hsusb2_phy>;
 253 };
 254
 255 &twl_gpio {
 256         ti,use-leds;
 257         /* pullups: BIT(1) */
 258         ti,pullups = <0x000002>;
 259         /*
 260          * pulldowns:
 261          * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
 262          * BIT(15), BIT(16), BIT(17)
 263          */
 264         ti,pulldowns = <0x03a1c4>;
 265 };
 266
 267 &uart3 {
 268         pinctrl-names = "default";
 269         pinctrl-0 = <&uart3_pins>;
 270 };
 271
 272 &mcbsp3 {
 273         status = "okay";
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&mcbsp3_pins>;
 276 };
 277
 278 &gpmc {
 279         ranges = <0 0 0x30000000 0x01000000>;   /* CS0: 16MB for NAND */
 280
 281         nand@0,0 {
 282                 compatible = "ti,omap2-nand";
 283                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 284                 interrupt-parent = <&gpmc>;
 285                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 286                              <1 IRQ_TYPE_NONE>; /* termcount */
 287                 nand-bus-width = <16>;
 288                 gpmc,device-width = <2>;        /* GPMC_DEVWIDTH_16BIT */
 289                 ti,nand-ecc-opt = "sw";
 290
 291                 gpmc,cs-on-ns = <0>;
 292                 gpmc,cs-rd-off-ns = <36>;
 293                 gpmc,cs-wr-off-ns = <36>;
 294                 gpmc,adv-on-ns = <6>;
 295                 gpmc,adv-rd-off-ns = <24>;
 296                 gpmc,adv-wr-off-ns = <36>;
 297                 gpmc,oe-on-ns = <6>;
 298                 gpmc,oe-off-ns = <48>;
 299                 gpmc,we-on-ns = <6>;
 300                 gpmc,we-off-ns = <30>;
 301                 gpmc,rd-cycle-ns = <72>;
 302                 gpmc,wr-cycle-ns = <72>;
 303                 gpmc,access-ns = <54>;
 304                 gpmc,wr-access-ns = <30>;
 305
 306                 #address-cells = <1>;
 307                 #size-cells = <1>;
 308
 309                 x-loader@0 {
 310                         label = "X-Loader";
 311                         reg = <0 0x80000>;
 312                 };
 313
 314                 bootloaders@80000 {
 315                         label = "U-Boot";
 316                         reg = <0x80000 0x1e0000>;
 317                 };
 318
 319                 bootloaders_env@260000 {
 320                         label = "U-Boot Env";
 321                         reg = <0x260000 0x20000>;
 322                 };
 323
 324                 kernel@280000 {
 325                         label = "Kernel";
 326                         reg = <0x280000 0x400000>;
 327                 };
 328
 329                 filesystem@680000 {
 330                         label = "File System";
 331                         reg = <0x680000 0xf980000>;
 332                 };
 333         };
 334 };
 335
 336 &usb_otg_hs {
 337         interface-type = <0>;
 338         usb-phy = <&usb2_phy>;
 339         phys = <&usb2_phy>;
 340         phy-names = "usb2-phy";
 341         mode = <3>;
 342         power = <50>;
 343 };
 344
 345 &vaux2 {
 346         regulator-name = "vdd_ehci";
 347         regulator-min-microvolt = <1800000>;
 348         regulator-max-microvolt = <1800000>;
 349         regulator-always-on;
 350 };