arch/arm/boot/dts/pxa27x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* The pxa3xx skeleton simply augments the 2xx version */
   3 #include "pxa2xx.dtsi"
   4 #include "dt-bindings/clock/pxa-clock.h"
   5
   6 / {
   7         model = "Marvell PXA27x familiy SoC";
   8         compatible = "marvell,pxa27x";
   9
  10         pxabus {
  11                 pdma: dma-controller@40000000 {
  12                         compatible = "marvell,pdma-1.0";
  13                         reg = <0x40000000 0x10000>;
  14                         interrupts = <25>;
  15                         #dma-channels = <32>;
  16                         #dma-cells = <2>;
  17                         #dma-requests = <75>;
  18                         status = "okay";
  19                 };
  20
  21                 pxairq: interrupt-controller@40d00000 {
  22                         marvell,intc-priority;
  23                         marvell,intc-nr-irqs = <34>;
  24                 };
  25
  26                 pinctrl: pinctrl@40e00000 {
  27                         reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
  28                                0x40f00020 0x10>;
  29                         compatible = "marvell,pxa27x-pinctrl";
  30                 };
  31
  32                 gpio: gpio@40e00000 {
  33                         compatible = "intel,pxa27x-gpio";
  34                         gpio-ranges = <&pinctrl 0 0 128>;
  35                         clocks = <&clks CLK_NONE>;
  36                 };
  37
  38                 usb0: usb@4c000000 {
  39                         compatible = "marvell,pxa-ohci";
  40                         reg = <0x4c000000 0x10000>;
  41                         interrupts = <3>;
  42                         clocks = <&clks CLK_USBHOST>;
  43                         status = "disabled";
  44                 };
  45
  46                 pwm0: pwm@40b00000 {
  47                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  48                         reg = <0x40b00000 0x10>;
  49                         #pwm-cells = <1>;
  50                         clocks = <&clks CLK_PWM0>;
  51                 };
  52
  53                 pwm1: pwm@40b00010 {
  54                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  55                         reg = <0x40b00010 0x10>;
  56                         #pwm-cells = <1>;
  57                         clocks = <&clks CLK_PWM1>;
  58                 };
  59
  60                 pwm2: pwm@40c00000 {
  61                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  62                         reg = <0x40c00000 0x10>;
  63                         #pwm-cells = <1>;
  64                         clocks = <&clks CLK_PWM0>;
  65                 };
  66
  67                 pwm3: pwm@40c00010 {
  68                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  69                         reg = <0x40c00010 0x10>;
  70                         #pwm-cells = <1>;
  71                         clocks = <&clks CLK_PWM1>;
  72                 };
  73
  74                 pwri2c: i2c@40f00180 {
  75                         compatible = "mrvl,pxa-i2c";
  76                         reg = <0x40f00180 0x24>;
  77                         interrupts = <6>;
  78                         clocks = <&clks CLK_PWRI2C>;
  79                         #address-cells = <0x1>;
  80                         #size-cells = <0>;
  81                         status = "disabled";
  82                 };
  83
  84                 pxa27x_udc: udc@40600000 {
  85                         compatible = "marvell,pxa270-udc";
  86                         reg = <0x40600000 0x10000>;
  87                         interrupts = <11>;
  88                         clocks = <&clks CLK_USB>;
  89                         status = "disabled";
  90                 };
  91
  92                 keypad: keypad@41500000 {
  93                         compatible = "marvell,pxa27x-keypad";
  94                         reg = <0x41500000 0x4c>;
  95                         interrupts = <4>;
  96                         clocks = <&clks CLK_KEYPAD>;
  97                         status = "disabled";
  98                 };
  99
 100                 pxa_camera: imaging@50000000 {
 101                         compatible = "marvell,pxa270-qci";
 102                         reg = <0x50000000 0x1000>;
 103                         interrupts = <33>;
 104                         dmas = <&pdma 68 0      /* Y channel */
 105                                 &pdma 69 0      /* U channel */
 106                                 &pdma 70 0>;    /* V channel */
 107                         dma-names = "CI_Y", "CI_U", "CI_V";
 108
 109                         clocks = <&clks CLK_CAMERA>;
 110                         clock-names = "ciclk";
 111                         clock-frequency = <5000000>;
 112                         clock-output-names = "qci_mclk";
 113
 114                         status = "disabled";
 115                 };
 116
 117                 rtc@40900000 {
 118                         clocks = <&clks CLK_OSC32k768>;
 119                 };
 120         };
 121
 122         clocks {
 123                /*
 124                 * The muxing of external clocks/internal dividers for osc* clock
 125                 * sources has been hidden under the carpet by now.
 126                 */
 127                 #address-cells = <1>;
 128                 #size-cells = <1>;
 129                 ranges;
 130
 131                 clks: pxa2xx_clks@41300004 {
 132                         compatible = "marvell,pxa270-clocks";
 133                         #clock-cells = <1>;
 134                         status = "okay";
 135                 };
 136         };
 137
 138         timer@40a00000 {
 139                 compatible = "marvell,pxa-timer";
 140                 reg = <0x40a00000 0x20>;
 141                 interrupts = <26>;
 142                 clocks = <&clks CLK_OSTIMER>;
 143                 status = "okay";
 144         };
 145
 146         pxa270_opp_table: opp_table0 {
 147                 compatible = "operating-points-v2";
 148
 149                 opp-104000000 {
 150                         opp-hz = /bits/ 64 <104000000>;
 151                         opp-microvolt = <900000 900000 1705000>;
 152                         clock-latency-ns = <20>;
 153                 };
 154                 opp-156000000 {
 155                         opp-hz = /bits/ 64 <156000000>;
 156                         opp-microvolt = <1000000 1000000 1705000>;
 157                         clock-latency-ns = <20>;
 158                 };
 159                 opp-208000000 {
 160                         opp-hz = /bits/ 64 <208000000>;
 161                         opp-microvolt = <1180000 1180000 1705000>;
 162                         clock-latency-ns = <20>;
 163                 };
 164                 opp-312000000 {
 165                         opp-hz = /bits/ 64 <312000000>;
 166                         opp-microvolt = <1250000 1250000 1705000>;
 167                         clock-latency-ns = <20>;
 168                 };
 169                 opp-416000000 {
 170                         opp-hz = /bits/ 64 <416000000>;
 171                         opp-microvolt = <1350000 1350000 1705000>;
 172                         clock-latency-ns = <20>;
 173                 };
 174                 opp-520000000 {
 175                         opp-hz = /bits/ 64 <520000000>;
 176                         opp-microvolt = <1450000 1450000 1705000>;
 177                         clock-latency-ns = <20>;
 178                 };
 179                 opp-624000000 {
 180                         opp-hz = /bits/ 64 <624000000>;
 181                         opp-microvolt = <1550000 1550000 1705000>;
 182                         clock-latency-ns = <20>;
 183                 };
 184         };
 185 };