2 * Device Tree Source for Sierra Wireless WP8548 Module
4 * Copyright (C) 2016 BayLibre, SAS.
5 * Author : Neil Armstrong <narmstrong@baylibre.com>
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "qcom-mdm9615.dtsi"
49 model = "Sierra Wireless WP8548 Module";
50 compatible = "swir,wp8548", "qcom,mdm9615";
53 device_type = "memory";
54 reg = <0x48000000 0x7F00000>;
59 pinctrl-0 = <&reset_out_pins>;
60 pinctrl-names = "default";
62 gsbi3_pins: gsbi3_pins {
64 pins = "gpio8", "gpio9", "gpio10", "gpio11";
71 gsbi4_pins: gsbi4_pins {
73 pins = "gpio12", "gpio13", "gpio14", "gpio15";
80 gsbi5_i2c_pins: gsbi5_i2c_pins {
83 function = "gsbi5_i2c";
90 function = "gsbi5_i2c";
96 gsbi5_uart_pins: gsbi5_uart_pins {
98 pins = "gpio18", "gpio19";
99 function = "gsbi5_uart";
100 drive-strength = <8>;
105 reset_out_pins: reset_out_pins {
109 drive-strength = <2>;
117 usb_vbus_5v_pins: usb_vbus_5v_pins {
122 qcom,drive-strength = <1>;
129 qcom,mode = <GSBI_PROT_SPI>;
134 pinctrl-0 = <&gsbi3_pins>;
135 pinctrl-names = "default";
136 assigned-clocks = <&gcc GSBI3_QUP_CLK>;
137 assigned-clock-rates = <24000000>;
142 qcom,mode = <GSBI_PROT_UART_W_FC>;
147 pinctrl-0 = <&gsbi4_pins>;
148 pinctrl-names = "default";
153 qcom,mode = <GSBI_PROT_I2C_UART>;
158 clock-frequency = <200000>;
159 pinctrl-0 = <&gsbi5_i2c_pins>;
160 pinctrl-names = "default";
165 pinctrl-0 = <&gsbi5_uart_pins>;
166 pinctrl-names = "default";