| blob | cd5e2904068abd69321cdaf9e1c2f355ae7816f6 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 * Copyright (C) 2014 Ulrich Hecht
7 */
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
14 / {
15 compatible = "renesas,r8a7794";
16 #address-cells = <2>;
17 #size-cells = <2>;
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c7;
28 spi0 = &qspi;
29 vin0 = &vin0;
30 vin1 = &vin1;
31 };
33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clka: audio_clka {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43 audio_clkb: audio_clkb {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48 audio_clkc: audio_clkc {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
52 };
54 /* External CAN clock */
55 can_clk: can {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 /* This value must be overridden by the board. */
59 clock-frequency = <0>;
60 };
62 cpus {
63 #address-cells = <1>;
64 #size-cells = <0>;
65 enable-method = "renesas,apmu";
67 cpu0: cpu@0 {
68 device_type = "cpu";
69 compatible = "arm,cortex-a7";
70 reg = <0>;
71 clock-frequency = <1000000000>;
72 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
73 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
74 next-level-cache = <&L2_CA7>;
75 };
77 cpu1: cpu@1 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a7";
80 reg = <1>;
81 clock-frequency = <1000000000>;
82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
84 next-level-cache = <&L2_CA7>;
85 };
87 L2_CA7: cache-controller-0 {
88 compatible = "cache";
89 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
90 cache-unified;
91 cache-level = <2>;
92 };
93 };
95 /* External root clock */
96 extal_clk: extal {
97 compatible = "fixed-clock";
98 #clock-cells = <0>;
99 /* This value must be overridden by the board. */
100 clock-frequency = <0>;
101 };
103 pmu {
104 compatible = "arm,cortex-a7-pmu";
105 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
106 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-affinity = <&cpu0>, <&cpu1>;
108 };
110 /* External SCIF clock */
111 scif_clk: scif {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 /* This value must be overridden by the board. */
115 clock-frequency = <0>;
116 };
118 soc {
119 compatible = "simple-bus";
120 interrupt-parent = <&gic>;
122 #address-cells = <2>;
123 #size-cells = <2>;
124 ranges;
126 rwdt: watchdog@e6020000 {
127 compatible = "renesas,r8a7794-wdt",
128 "renesas,rcar-gen2-wdt";
129 reg = <0 0xe6020000 0 0x0c>;
130 clocks = <&cpg CPG_MOD 402>;
131 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
132 resets = <&cpg 402>;
133 status = "disabled";
134 };
136 gpio0: gpio@e6050000 {
137 compatible = "renesas,gpio-r8a7794",
138 "renesas,rcar-gen2-gpio";
139 reg = <0 0xe6050000 0 0x50>;
140 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
141 #gpio-cells = <2>;
142 gpio-controller;
143 gpio-ranges = <&pfc 0 0 32>;
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 clocks = <&cpg CPG_MOD 912>;
147 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
148 resets = <&cpg 912>;
149 };
151 gpio1: gpio@e6051000 {
152 compatible = "renesas,gpio-r8a7794",
153 "renesas,rcar-gen2-gpio";
154 reg = <0 0xe6051000 0 0x50>;
155 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
156 #gpio-cells = <2>;
157 gpio-controller;
158 gpio-ranges = <&pfc 0 32 26>;
159 #interrupt-cells = <2>;
160 interrupt-controller;
161 clocks = <&cpg CPG_MOD 911>;
162 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
163 resets = <&cpg 911>;
164 };
166 gpio2: gpio@e6052000 {
167 compatible = "renesas,gpio-r8a7794",
168 "renesas,rcar-gen2-gpio";
169 reg = <0 0xe6052000 0 0x50>;
170 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
171 #gpio-cells = <2>;
172 gpio-controller;
173 gpio-ranges = <&pfc 0 64 32>;
174 #interrupt-cells = <2>;
175 interrupt-controller;
176 clocks = <&cpg CPG_MOD 910>;
177 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
178 resets = <&cpg 910>;
179 };
181 gpio3: gpio@e6053000 {
182 compatible = "renesas,gpio-r8a7794",
183 "renesas,rcar-gen2-gpio";
184 reg = <0 0xe6053000 0 0x50>;
185 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 96 32>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
191 clocks = <&cpg CPG_MOD 909>;
192 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
193 resets = <&cpg 909>;
194 };
196 gpio4: gpio@e6054000 {
197 compatible = "renesas,gpio-r8a7794",
198 "renesas,rcar-gen2-gpio";
199 reg = <0 0xe6054000 0 0x50>;
200 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 128 32>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
206 clocks = <&cpg CPG_MOD 908>;
207 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
208 resets = <&cpg 908>;
209 };
211 gpio5: gpio@e6055000 {
212 compatible = "renesas,gpio-r8a7794",
213 "renesas,rcar-gen2-gpio";
214 reg = <0 0xe6055000 0 0x50>;
215 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
216 #gpio-cells = <2>;
217 gpio-controller;
218 gpio-ranges = <&pfc 0 160 28>;
219 #interrupt-cells = <2>;
220 interrupt-controller;
221 clocks = <&cpg CPG_MOD 907>;
222 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
223 resets = <&cpg 907>;
224 };
226 gpio6: gpio@e6055400 {
227 compatible = "renesas,gpio-r8a7794",
228 "renesas,rcar-gen2-gpio";
229 reg = <0 0xe6055400 0 0x50>;
230 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
231 #gpio-cells = <2>;
232 gpio-controller;
233 gpio-ranges = <&pfc 0 192 26>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
236 clocks = <&cpg CPG_MOD 905>;
237 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
238 resets = <&cpg 905>;
239 };
241 pfc: pinctrl@e6060000 {
242 compatible = "renesas,pfc-r8a7794";
243 reg = <0 0xe6060000 0 0x11c>;
244 };
246 cpg: clock-controller@e6150000 {
247 compatible = "renesas,r8a7794-cpg-mssr";
248 reg = <0 0xe6150000 0 0x1000>;
249 clocks = <&extal_clk>, <&usb_extal_clk>;
250 clock-names = "extal", "usb_extal";
251 #clock-cells = <2>;
252 #power-domain-cells = <0>;
253 #reset-cells = <1>;
254 };
256 apmu@e6151000 {
257 compatible = "renesas,r8a7794-apmu", "renesas,apmu";
258 reg = <0 0xe6151000 0 0x188>;
259 cpus = <&cpu0 &cpu1>;
260 };
262 rst: reset-controller@e6160000 {
263 compatible = "renesas,r8a7794-rst";
264 reg = <0 0xe6160000 0 0x0100>;
265 };
267 sysc: system-controller@e6180000 {
268 compatible = "renesas,r8a7794-sysc";
269 reg = <0 0xe6180000 0 0x0200>;
270 #power-domain-cells = <1>;
271 };
273 irqc0: interrupt-controller@e61c0000 {
274 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
275 #interrupt-cells = <2>;
276 interrupt-controller;
277 reg = <0 0xe61c0000 0 0x200>;
278 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
288 clocks = <&cpg CPG_MOD 407>;
289 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
290 resets = <&cpg 407>;
291 };
293 ipmmu_sy0: iommu@e6280000 {
294 compatible = "renesas,ipmmu-r8a7794",
295 "renesas,ipmmu-vmsa";
296 reg = <0 0xe6280000 0 0x1000>;
297 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
299 #iommu-cells = <1>;
300 status = "disabled";
301 };
303 ipmmu_sy1: iommu@e6290000 {
304 compatible = "renesas,ipmmu-r8a7794",
305 "renesas,ipmmu-vmsa";
306 reg = <0 0xe6290000 0 0x1000>;
307 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
308 #iommu-cells = <1>;
309 status = "disabled";
310 };
312 ipmmu_ds: iommu@e6740000 {
313 compatible = "renesas,ipmmu-r8a7794",
314 "renesas,ipmmu-vmsa";
315 reg = <0 0xe6740000 0 0x1000>;
316 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
318 #iommu-cells = <1>;
319 status = "disabled";
320 };
322 ipmmu_mp: iommu@ec680000 {
323 compatible = "renesas,ipmmu-r8a7794",
324 "renesas,ipmmu-vmsa";
325 reg = <0 0xec680000 0 0x1000>;
326 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
327 #iommu-cells = <1>;
328 status = "disabled";
329 };
331 ipmmu_mx: iommu@fe951000 {
332 compatible = "renesas,ipmmu-r8a7794",
333 "renesas,ipmmu-vmsa";
334 reg = <0 0xfe951000 0 0x1000>;
335 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
337 #iommu-cells = <1>;
338 status = "disabled";
339 };
341 ipmmu_gp: iommu@e62a0000 {
342 compatible = "renesas,ipmmu-r8a7794",
343 "renesas,ipmmu-vmsa";
344 reg = <0 0xe62a0000 0 0x1000>;
345 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
347 #iommu-cells = <1>;
348 status = "disabled";
349 };
351 icram0: sram@e63a0000 {
352 compatible = "mmio-sram";
353 reg = <0 0xe63a0000 0 0x12000>;
354 #address-cells = <1>;
355 #size-cells = <1>;
356 ranges = <0 0 0xe63a0000 0x12000>;
357 };
359 icram1: sram@e63c0000 {
360 compatible = "mmio-sram";
361 reg = <0 0xe63c0000 0 0x1000>;
362 #address-cells = <1>;
363 #size-cells = <1>;
364 ranges = <0 0 0xe63c0000 0x1000>;
366 smp-sram@0 {
367 compatible = "renesas,smp-sram";
368 reg = <0 0x100>;
369 };
370 };
372 /* The memory map in the User's Manual maps the cores to
373 * bus numbers
374 */
375 i2c0: i2c@e6508000 {
376 compatible = "renesas,i2c-r8a7794",
377 "renesas,rcar-gen2-i2c";
378 reg = <0 0xe6508000 0 0x40>;
379 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
380 clocks = <&cpg CPG_MOD 931>;
381 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
382 resets = <&cpg 931>;
383 #address-cells = <1>;
384 #size-cells = <0>;
385 i2c-scl-internal-delay-ns = <6>;
386 status = "disabled";
387 };
389 i2c1: i2c@e6518000 {
390 compatible = "renesas,i2c-r8a7794",
391 "renesas,rcar-gen2-i2c";
392 reg = <0 0xe6518000 0 0x40>;
393 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
394 clocks = <&cpg CPG_MOD 930>;
395 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
396 resets = <&cpg 930>;
397 #address-cells = <1>;
398 #size-cells = <0>;
399 i2c-scl-internal-delay-ns = <6>;
400 status = "disabled";
401 };
403 i2c2: i2c@e6530000 {
404 compatible = "renesas,i2c-r8a7794",
405 "renesas,rcar-gen2-i2c";
406 reg = <0 0xe6530000 0 0x40>;
407 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
408 clocks = <&cpg CPG_MOD 929>;
409 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
410 resets = <&cpg 929>;
411 #address-cells = <1>;
412 #size-cells = <0>;
413 i2c-scl-internal-delay-ns = <6>;
414 status = "disabled";
415 };
417 i2c3: i2c@e6540000 {
418 compatible = "renesas,i2c-r8a7794",
419 "renesas,rcar-gen2-i2c";
420 reg = <0 0xe6540000 0 0x40>;
421 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&cpg CPG_MOD 928>;
423 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
424 resets = <&cpg 928>;
425 #address-cells = <1>;
426 #size-cells = <0>;
427 i2c-scl-internal-delay-ns = <6>;
428 status = "disabled";
429 };
431 i2c4: i2c@e6520000 {
432 compatible = "renesas,i2c-r8a7794",
433 "renesas,rcar-gen2-i2c";
434 reg = <0 0xe6520000 0 0x40>;
435 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&cpg CPG_MOD 927>;
437 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
438 resets = <&cpg 927>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 i2c-scl-internal-delay-ns = <6>;
442 status = "disabled";
443 };
445 i2c5: i2c@e6528000 {
446 compatible = "renesas,i2c-r8a7794",
447 "renesas,rcar-gen2-i2c";
448 reg = <0 0xe6528000 0 0x40>;
449 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
450 clocks = <&cpg CPG_MOD 925>;
451 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
452 resets = <&cpg 925>;
453 #address-cells = <1>;
454 #size-cells = <0>;
455 i2c-scl-internal-delay-ns = <6>;
456 status = "disabled";
457 };
459 i2c6: i2c@e6500000 {
460 compatible = "renesas,iic-r8a7794",
461 "renesas,rcar-gen2-iic",
462 "renesas,rmobile-iic";
463 reg = <0 0xe6500000 0 0x425>;
464 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 318>;
466 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
467 <&dmac1 0x61>, <&dmac1 0x62>;
468 dma-names = "tx", "rx", "tx", "rx";
469 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
470 resets = <&cpg 318>;
471 #address-cells = <1>;
472 #size-cells = <0>;
473 status = "disabled";
474 };
476 i2c7: i2c@e6510000 {
477 compatible = "renesas,iic-r8a7794",
478 "renesas,rcar-gen2-iic",
479 "renesas,rmobile-iic";
480 reg = <0 0xe6510000 0 0x425>;
481 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 323>;
483 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
484 <&dmac1 0x65>, <&dmac1 0x66>;
485 dma-names = "tx", "rx", "tx", "rx";
486 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
487 resets = <&cpg 323>;
488 #address-cells = <1>;
489 #size-cells = <0>;
490 status = "disabled";
491 };
493 hsusb: usb@e6590000 {
494 compatible = "renesas,usbhs-r8a7794",
495 "renesas,rcar-gen2-usbhs";
496 reg = <0 0xe6590000 0 0x100>;
497 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
498 clocks = <&cpg CPG_MOD 704>;
499 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
500 resets = <&cpg 704>;
501 renesas,buswait = <4>;
502 phys = <&usb0 1>;
503 phy-names = "usb";
504 status = "disabled";
505 };
507 usbphy: usb-phy@e6590100 {
508 compatible = "renesas,usb-phy-r8a7794",
509 "renesas,rcar-gen2-usb-phy";
510 reg = <0 0xe6590100 0 0x100>;
511 #address-cells = <1>;
512 #size-cells = <0>;
513 clocks = <&cpg CPG_MOD 704>;
514 clock-names = "usbhs";
515 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
516 resets = <&cpg 704>;
517 status = "disabled";
519 usb0: usb-channel@0 {
520 reg = <0>;
521 #phy-cells = <1>;
522 };
523 usb2: usb-channel@2 {
524 reg = <2>;
525 #phy-cells = <1>;
526 };
527 };
529 dmac0: dma-controller@e6700000 {
530 compatible = "renesas,dmac-r8a7794",
531 "renesas,rcar-dmac";
532 reg = <0 0xe6700000 0 0x20000>;
533 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
549 interrupt-names = "error",
550 "ch0", "ch1", "ch2", "ch3",
551 "ch4", "ch5", "ch6", "ch7",
552 "ch8", "ch9", "ch10", "ch11",
553 "ch12", "ch13", "ch14";
554 clocks = <&cpg CPG_MOD 219>;
555 clock-names = "fck";
556 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
557 resets = <&cpg 219>;
558 #dma-cells = <1>;
559 dma-channels = <15>;
560 };
562 dmac1: dma-controller@e6720000 {
563 compatible = "renesas,dmac-r8a7794",
564 "renesas,rcar-dmac";
565 reg = <0 0xe6720000 0 0x20000>;
566 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
567 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
568 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
569 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
570 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
571 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
572 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
573 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
574 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
575 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
576 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
577 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
578 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
579 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
580 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
581 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
582 interrupt-names = "error",
583 "ch0", "ch1", "ch2", "ch3",
584 "ch4", "ch5", "ch6", "ch7",
585 "ch8", "ch9", "ch10", "ch11",
586 "ch12", "ch13", "ch14";
587 clocks = <&cpg CPG_MOD 218>;
588 clock-names = "fck";
589 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
590 resets = <&cpg 218>;
591 #dma-cells = <1>;
592 dma-channels = <15>;
593 };
595 avb: ethernet@e6800000 {
596 compatible = "renesas,etheravb-r8a7794",
597 "renesas,etheravb-rcar-gen2";
598 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
599 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
600 clocks = <&cpg CPG_MOD 812>;
601 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
602 resets = <&cpg 812>;
603 #address-cells = <1>;
604 #size-cells = <0>;
605 status = "disabled";
606 };
608 qspi: spi@e6b10000 {
609 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
610 reg = <0 0xe6b10000 0 0x2c>;
611 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
612 clocks = <&cpg CPG_MOD 917>;
613 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
614 <&dmac1 0x17>, <&dmac1 0x18>;
615 dma-names = "tx", "rx", "tx", "rx";
616 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
617 resets = <&cpg 917>;
618 num-cs = <1>;
619 #address-cells = <1>;
620 #size-cells = <0>;
621 status = "disabled";
622 };
624 scifa0: serial@e6c40000 {
625 compatible = "renesas,scifa-r8a7794",
626 "renesas,rcar-gen2-scifa", "renesas,scifa";
627 reg = <0 0xe6c40000 0 64>;
628 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&cpg CPG_MOD 204>;
630 clock-names = "fck";
631 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
632 <&dmac1 0x21>, <&dmac1 0x22>;
633 dma-names = "tx", "rx", "tx", "rx";
634 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
635 resets = <&cpg 204>;
636 status = "disabled";
637 };
639 scifa1: serial@e6c50000 {
640 compatible = "renesas,scifa-r8a7794",
641 "renesas,rcar-gen2-scifa", "renesas,scifa";
642 reg = <0 0xe6c50000 0 64>;
643 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&cpg CPG_MOD 203>;
645 clock-names = "fck";
646 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
647 <&dmac1 0x25>, <&dmac1 0x26>;
648 dma-names = "tx", "rx", "tx", "rx";
649 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
650 resets = <&cpg 203>;
651 status = "disabled";
652 };
654 scifa2: serial@e6c60000 {
655 compatible = "renesas,scifa-r8a7794",
656 "renesas,rcar-gen2-scifa", "renesas,scifa";
657 reg = <0 0xe6c60000 0 64>;
658 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
659 clocks = <&cpg CPG_MOD 202>;
660 clock-names = "fck";
661 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
662 <&dmac1 0x27>, <&dmac1 0x28>;
663 dma-names = "tx", "rx", "tx", "rx";
664 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
665 resets = <&cpg 202>;
666 status = "disabled";
667 };
669 scifa3: serial@e6c70000 {
670 compatible = "renesas,scifa-r8a7794",
671 "renesas,rcar-gen2-scifa", "renesas,scifa";
672 reg = <0 0xe6c70000 0 64>;
673 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
674 clocks = <&cpg CPG_MOD 1106>;
675 clock-names = "fck";
676 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
677 <&dmac1 0x1b>, <&dmac1 0x1c>;
678 dma-names = "tx", "rx", "tx", "rx";
679 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
680 resets = <&cpg 1106>;
681 status = "disabled";
682 };
684 scifa4: serial@e6c78000 {
685 compatible = "renesas,scifa-r8a7794",
686 "renesas,rcar-gen2-scifa", "renesas,scifa";
687 reg = <0 0xe6c78000 0 64>;
688 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&cpg CPG_MOD 1107>;
690 clock-names = "fck";
691 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
692 <&dmac1 0x1f>, <&dmac1 0x20>;
693 dma-names = "tx", "rx", "tx", "rx";
694 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
695 resets = <&cpg 1107>;
696 status = "disabled";
697 };
699 scifa5: serial@e6c80000 {
700 compatible = "renesas,scifa-r8a7794",
701 "renesas,rcar-gen2-scifa", "renesas,scifa";
702 reg = <0 0xe6c80000 0 64>;
703 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
704 clocks = <&cpg CPG_MOD 1108>;
705 clock-names = "fck";
706 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
707 <&dmac1 0x23>, <&dmac1 0x24>;
708 dma-names = "tx", "rx", "tx", "rx";
709 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
710 resets = <&cpg 1108>;
711 status = "disabled";
712 };
714 scifb0: serial@e6c20000 {
715 compatible = "renesas,scifb-r8a7794",
716 "renesas,rcar-gen2-scifb", "renesas,scifb";
717 reg = <0 0xe6c20000 0 0x100>;
718 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
719 clocks = <&cpg CPG_MOD 206>;
720 clock-names = "fck";
721 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
722 <&dmac1 0x3d>, <&dmac1 0x3e>;
723 dma-names = "tx", "rx", "tx", "rx";
724 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
725 resets = <&cpg 206>;
726 status = "disabled";
727 };
729 scifb1: serial@e6c30000 {
730 compatible = "renesas,scifb-r8a7794",
731 "renesas,rcar-gen2-scifb", "renesas,scifb";
732 reg = <0 0xe6c30000 0 0x100>;
733 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&cpg CPG_MOD 207>;
735 clock-names = "fck";
736 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
737 <&dmac1 0x19>, <&dmac1 0x1a>;
738 dma-names = "tx", "rx", "tx", "rx";
739 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
740 resets = <&cpg 207>;
741 status = "disabled";
742 };
744 scifb2: serial@e6ce0000 {
745 compatible = "renesas,scifb-r8a7794",
746 "renesas,rcar-gen2-scifb", "renesas,scifb";
747 reg = <0 0xe6ce0000 0 0x100>;
748 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
749 clocks = <&cpg CPG_MOD 216>;
750 clock-names = "fck";
751 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
752 <&dmac1 0x1d>, <&dmac1 0x1e>;
753 dma-names = "tx", "rx", "tx", "rx";
754 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
755 resets = <&cpg 216>;
756 status = "disabled";
757 };
759 scif0: serial@e6e60000 {
760 compatible = "renesas,scif-r8a7794",
761 "renesas,rcar-gen2-scif",
762 "renesas,scif";
763 reg = <0 0xe6e60000 0 64>;
764 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
765 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
766 <&scif_clk>;
767 clock-names = "fck", "brg_int", "scif_clk";
768 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
769 <&dmac1 0x29>, <&dmac1 0x2a>;
770 dma-names = "tx", "rx", "tx", "rx";
771 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
772 resets = <&cpg 721>;
773 status = "disabled";
774 };
776 scif1: serial@e6e68000 {
777 compatible = "renesas,scif-r8a7794",
778 "renesas,rcar-gen2-scif",
779 "renesas,scif";
780 reg = <0 0xe6e68000 0 64>;
781 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
783 <&scif_clk>;
784 clock-names = "fck", "brg_int", "scif_clk";
785 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
786 <&dmac1 0x2d>, <&dmac1 0x2e>;
787 dma-names = "tx", "rx", "tx", "rx";
788 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
789 resets = <&cpg 720>;
790 status = "disabled";
791 };
793 scif2: serial@e6e58000 {
794 compatible = "renesas,scif-r8a7794",
795 "renesas,rcar-gen2-scif", "renesas,scif";
796 reg = <0 0xe6e58000 0 64>;
797 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
799 <&scif_clk>;
800 clock-names = "fck", "brg_int", "scif_clk";
801 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
802 <&dmac1 0x2b>, <&dmac1 0x2c>;
803 dma-names = "tx", "rx", "tx", "rx";
804 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
805 resets = <&cpg 719>;
806 status = "disabled";
807 };
809 scif3: serial@e6ea8000 {
810 compatible = "renesas,scif-r8a7794",
811 "renesas,rcar-gen2-scif", "renesas,scif";
812 reg = <0 0xe6ea8000 0 64>;
813 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
814 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
815 <&scif_clk>;
816 clock-names = "fck", "brg_int", "scif_clk";
817 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
818 <&dmac1 0x2f>, <&dmac1 0x30>;
819 dma-names = "tx", "rx", "tx", "rx";
820 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
821 resets = <&cpg 718>;
822 status = "disabled";
823 };
825 scif4: serial@e6ee0000 {
826 compatible = "renesas,scif-r8a7794",
827 "renesas,rcar-gen2-scif", "renesas,scif";
828 reg = <0 0xe6ee0000 0 64>;
829 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
830 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
831 <&scif_clk>;
832 clock-names = "fck", "brg_int", "scif_clk";
833 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
834 <&dmac1 0xfb>, <&dmac1 0xfc>;
835 dma-names = "tx", "rx", "tx", "rx";
836 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
837 resets = <&cpg 715>;
838 status = "disabled";
839 };
841 scif5: serial@e6ee8000 {
842 compatible = "renesas,scif-r8a7794",
843 "renesas,rcar-gen2-scif", "renesas,scif";
844 reg = <0 0xe6ee8000 0 64>;
845 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
847 <&scif_clk>;
848 clock-names = "fck", "brg_int", "scif_clk";
849 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
850 <&dmac1 0xfd>, <&dmac1 0xfe>;
851 dma-names = "tx", "rx", "tx", "rx";
852 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
853 resets = <&cpg 714>;
854 status = "disabled";
855 };
857 hscif0: serial@e62c0000 {
858 compatible = "renesas,hscif-r8a7794",
859 "renesas,rcar-gen2-hscif", "renesas,hscif";
860 reg = <0 0xe62c0000 0 96>;
861 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
862 clocks = <&cpg CPG_MOD 717>,
863 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
864 clock-names = "fck", "brg_int", "scif_clk";
865 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
866 <&dmac1 0x39>, <&dmac1 0x3a>;
867 dma-names = "tx", "rx", "tx", "rx";
868 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
869 resets = <&cpg 717>;
870 status = "disabled";
871 };
873 hscif1: serial@e62c8000 {
874 compatible = "renesas,hscif-r8a7794",
875 "renesas,rcar-gen2-hscif", "renesas,hscif";
876 reg = <0 0xe62c8000 0 96>;
877 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&cpg CPG_MOD 716>,
879 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
880 clock-names = "fck", "brg_int", "scif_clk";
881 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
882 <&dmac1 0x4d>, <&dmac1 0x4e>;
883 dma-names = "tx", "rx", "tx", "rx";
884 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
885 resets = <&cpg 716>;
886 status = "disabled";
887 };
889 hscif2: serial@e62d0000 {
890 compatible = "renesas,hscif-r8a7794",
891 "renesas,rcar-gen2-hscif", "renesas,hscif";
892 reg = <0 0xe62d0000 0 96>;
893 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
895 <&scif_clk>;
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
898 <&dmac1 0x3b>, <&dmac1 0x3c>;
899 dma-names = "tx", "rx", "tx", "rx";
900 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
901 resets = <&cpg 713>;
902 status = "disabled";
903 };
905 can0: can@e6e80000 {
906 compatible = "renesas,can-r8a7794",
907 "renesas,rcar-gen2-can";
908 reg = <0 0xe6e80000 0 0x1000>;
909 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
911 <&can_clk>;
912 clock-names = "clkp1", "clkp2", "can_clk";
913 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
914 resets = <&cpg 916>;
915 status = "disabled";
916 };
918 can1: can@e6e88000 {
919 compatible = "renesas,can-r8a7794",
920 "renesas,rcar-gen2-can";
921 reg = <0 0xe6e88000 0 0x1000>;
922 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
923 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
924 <&can_clk>;
925 clock-names = "clkp1", "clkp2", "can_clk";
926 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
927 resets = <&cpg 915>;
928 status = "disabled";
929 };
931 vin0: video@e6ef0000 {
932 compatible = "renesas,vin-r8a7794",
933 "renesas,rcar-gen2-vin";
934 reg = <0 0xe6ef0000 0 0x1000>;
935 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&cpg CPG_MOD 811>;
937 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
938 resets = <&cpg 811>;
939 status = "disabled";
940 };
942 vin1: video@e6ef1000 {
943 compatible = "renesas,vin-r8a7794",
944 "renesas,rcar-gen2-vin";
945 reg = <0 0xe6ef1000 0 0x1000>;
946 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
947 clocks = <&cpg CPG_MOD 810>;
948 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
949 resets = <&cpg 810>;
950 status = "disabled";
951 };
953 rcar_sound: sound@ec500000 {
954 /*
955 * #sound-dai-cells is required
956 *
957 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
958 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
959 */
960 compatible = "renesas,rcar_sound-r8a7794",
961 "renesas,rcar_sound-gen2";
962 reg = <0 0xec500000 0 0x1000>, /* SCU */
963 <0 0xec5a0000 0 0x100>, /* ADG */
964 <0 0xec540000 0 0x1000>, /* SSIU */
965 <0 0xec541000 0 0x280>, /* SSI */
966 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
967 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
969 clocks = <&cpg CPG_MOD 1005>,
970 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
971 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
972 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
973 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
974 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
975 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
976 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
977 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
978 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
979 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
980 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
981 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
982 <&cpg CPG_CORE R8A7794_CLK_M2>;
983 clock-names = "ssi-all",
984 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
985 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
986 "ssi.1", "ssi.0",
987 "src.6", "src.5", "src.4", "src.3",
988 "src.2", "src.1",
989 "ctu.0", "ctu.1",
990 "mix.0", "mix.1",
991 "dvc.0", "dvc.1",
992 "clk_a", "clk_b", "clk_c", "clk_i";
993 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
994 resets = <&cpg 1005>,
995 <&cpg 1006>, <&cpg 1007>,
996 <&cpg 1008>, <&cpg 1009>,
997 <&cpg 1010>, <&cpg 1011>,
998 <&cpg 1012>, <&cpg 1013>,
999 <&cpg 1014>, <&cpg 1015>;
1000 reset-names = "ssi-all",
1001 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1002 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1003 "ssi.1", "ssi.0";
1005 status = "disabled";
1007 rcar_sound,dvc {
1008 dvc0: dvc-0 {
1009 dmas = <&audma0 0xbc>;
1010 dma-names = "tx";
1011 };
1012 dvc1: dvc-1 {
1013 dmas = <&audma0 0xbe>;
1014 dma-names = "tx";
1015 };
1016 };
1018 rcar_sound,mix {
1019 mix0: mix-0 { };
1020 mix1: mix-1 { };
1021 };
1023 rcar_sound,ctu {
1024 ctu00: ctu-0 { };
1025 ctu01: ctu-1 { };
1026 ctu02: ctu-2 { };
1027 ctu03: ctu-3 { };
1028 ctu10: ctu-4 { };
1029 ctu11: ctu-5 { };
1030 ctu12: ctu-6 { };
1031 ctu13: ctu-7 { };
1032 };
1034 rcar_sound,src {
1035 src-0 {
1036 status = "disabled";
1037 };
1038 src1: src-1 {
1039 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1040 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1041 dma-names = "rx", "tx";
1042 };
1043 src2: src-2 {
1044 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1045 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1046 dma-names = "rx", "tx";
1047 };
1048 src3: src-3 {
1049 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1050 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1051 dma-names = "rx", "tx";
1052 };
1053 src4: src-4 {
1054 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1055 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1056 dma-names = "rx", "tx";
1057 };
1058 src5: src-5 {
1059 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1060 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1061 dma-names = "rx", "tx";
1062 };
1063 src6: src-6 {
1064 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1065 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1066 dma-names = "rx", "tx";
1067 };
1068 };
1070 rcar_sound,ssi {
1071 ssi0: ssi-0 {
1072 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1073 dmas = <&audma0 0x01>, <&audma0 0x02>,
1074 <&audma0 0x15>, <&audma0 0x16>;
1075 dma-names = "rx", "tx", "rxu", "txu";
1076 };
1077 ssi1: ssi-1 {
1078 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1079 dmas = <&audma0 0x03>, <&audma0 0x04>,
1080 <&audma0 0x49>, <&audma0 0x4a>;
1081 dma-names = "rx", "tx", "rxu", "txu";
1082 };
1083 ssi2: ssi-2 {
1084 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1085 dmas = <&audma0 0x05>, <&audma0 0x06>,
1086 <&audma0 0x63>, <&audma0 0x64>;
1087 dma-names = "rx", "tx", "rxu", "txu";
1088 };
1089 ssi3: ssi-3 {
1090 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1091 dmas = <&audma0 0x07>, <&audma0 0x08>,
1092 <&audma0 0x6f>, <&audma0 0x70>;
1093 dma-names = "rx", "tx", "rxu", "txu";
1094 };
1095 ssi4: ssi-4 {
1096 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1097 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1098 <&audma0 0x71>, <&audma0 0x72>;
1099 dma-names = "rx", "tx", "rxu", "txu";
1100 };
1101 ssi5: ssi-5 {
1102 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1103 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1104 <&audma0 0x73>, <&audma0 0x74>;
1105 dma-names = "rx", "tx", "rxu", "txu";
1106 };
1107 ssi6: ssi-6 {
1108 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1109 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1110 <&audma0 0x75>, <&audma0 0x76>;
1111 dma-names = "rx", "tx", "rxu", "txu";
1112 };
1113 ssi7: ssi-7 {
1114 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1115 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1116 <&audma0 0x79>, <&audma0 0x7a>;
1117 dma-names = "rx", "tx", "rxu", "txu";
1118 };
1119 ssi8: ssi-8 {
1120 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1121 dmas = <&audma0 0x11>, <&audma0 0x12>,
1122 <&audma0 0x7b>, <&audma0 0x7c>;
1123 dma-names = "rx", "tx", "rxu", "txu";
1124 };
1125 ssi9: ssi-9 {
1126 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1127 dmas = <&audma0 0x13>, <&audma0 0x14>,
1128 <&audma0 0x7d>, <&audma0 0x7e>;
1129 dma-names = "rx", "tx", "rxu", "txu";
1130 };
1131 };
1132 };
1134 audma0: dma-controller@ec700000 {
1135 compatible = "renesas,dmac-r8a7794",
1136 "renesas,rcar-dmac";
1137 reg = <0 0xec700000 0 0x10000>;
1138 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1139 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1140 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1141 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1142 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1143 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1144 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1145 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1146 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1147 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1148 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1149 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1150 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1151 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1152 interrupt-names = "error",
1153 "ch0", "ch1", "ch2", "ch3", "ch4",
1154 "ch5", "ch6", "ch7", "ch8", "ch9",
1155 "ch10", "ch11",
1156 "ch12";
1157 clocks = <&cpg CPG_MOD 502>;
1158 clock-names = "fck";
1159 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1160 resets = <&cpg 502>;
1161 #dma-cells = <1>;
1162 dma-channels = <13>;
1163 };
1165 pci0: pci@ee090000 {
1166 compatible = "renesas,pci-r8a7794",
1167 "renesas,pci-rcar-gen2";
1168 device_type = "pci";
1169 reg = <0 0xee090000 0 0xc00>,
1170 <0 0xee080000 0 0x1100>;
1171 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1172 clocks = <&cpg CPG_MOD 703>;
1173 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1174 resets = <&cpg 703>;
1175 status = "disabled";
1177 bus-range = <0 0>;
1178 #address-cells = <3>;
1179 #size-cells = <2>;
1180 #interrupt-cells = <1>;
1181 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1182 interrupt-map-mask = <0xf800 0 0 0x7>;
1183 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1184 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1185 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1187 usb@1,0 {
1188 reg = <0x800 0 0 0 0>;
1189 phys = <&usb0 0>;
1190 phy-names = "usb";
1191 };
1193 usb@2,0 {
1194 reg = <0x1000 0 0 0 0>;
1195 phys = <&usb0 0>;
1196 phy-names = "usb";
1197 };
1198 };
1200 pci1: pci@ee0d0000 {
1201 compatible = "renesas,pci-r8a7794",
1202 "renesas,pci-rcar-gen2";
1203 device_type = "pci";
1204 reg = <0 0xee0d0000 0 0xc00>,
1205 <0 0xee0c0000 0 0x1100>;
1206 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1207 clocks = <&cpg CPG_MOD 703>;
1208 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1209 resets = <&cpg 703>;
1210 status = "disabled";
1212 bus-range = <1 1>;
1213 #address-cells = <3>;
1214 #size-cells = <2>;
1215 #interrupt-cells = <1>;
1216 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1217 interrupt-map-mask = <0xf800 0 0 0x7>;
1218 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1219 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1220 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1222 usb@1,0 {
1223 reg = <0x10800 0 0 0 0>;
1224 phys = <&usb2 0>;
1225 phy-names = "usb";
1226 };
1228 usb@2,0 {
1229 reg = <0x11000 0 0 0 0>;
1230 phys = <&usb2 0>;
1231 phy-names = "usb";
1232 };
1233 };
1235 sdhi0: mmc@ee100000 {
1236 compatible = "renesas,sdhi-r8a7794",
1237 "renesas,rcar-gen2-sdhi";
1238 reg = <0 0xee100000 0 0x328>;
1239 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1240 clocks = <&cpg CPG_MOD 314>;
1241 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1242 <&dmac1 0xcd>, <&dmac1 0xce>;
1243 dma-names = "tx", "rx", "tx", "rx";
1244 max-frequency = <195000000>;
1245 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1246 resets = <&cpg 314>;
1247 status = "disabled";
1248 };
1250 sdhi1: mmc@ee140000 {
1251 compatible = "renesas,sdhi-r8a7794",
1252 "renesas,rcar-gen2-sdhi";
1253 reg = <0 0xee140000 0 0x100>;
1254 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1255 clocks = <&cpg CPG_MOD 312>;
1256 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1257 <&dmac1 0xc1>, <&dmac1 0xc2>;
1258 dma-names = "tx", "rx", "tx", "rx";
1259 max-frequency = <97500000>;
1260 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1261 resets = <&cpg 312>;
1262 status = "disabled";
1263 };
1265 sdhi2: mmc@ee160000 {
1266 compatible = "renesas,sdhi-r8a7794",
1267 "renesas,rcar-gen2-sdhi";
1268 reg = <0 0xee160000 0 0x100>;
1269 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1270 clocks = <&cpg CPG_MOD 311>;
1271 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1272 <&dmac1 0xd3>, <&dmac1 0xd4>;
1273 dma-names = "tx", "rx", "tx", "rx";
1274 max-frequency = <97500000>;
1275 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1276 resets = <&cpg 311>;
1277 status = "disabled";
1278 };
1280 mmcif0: mmc@ee200000 {
1281 compatible = "renesas,mmcif-r8a7794",
1282 "renesas,sh-mmcif";
1283 reg = <0 0xee200000 0 0x80>;
1284 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1285 clocks = <&cpg CPG_MOD 315>;
1286 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1287 <&dmac1 0xd1>, <&dmac1 0xd2>;
1288 dma-names = "tx", "rx", "tx", "rx";
1289 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1290 resets = <&cpg 315>;
1291 reg-io-width = <4>;
1292 status = "disabled";
1293 };
1295 ether: ethernet@ee700000 {
1296 compatible = "renesas,ether-r8a7794",
1297 "renesas,rcar-gen2-ether";
1298 reg = <0 0xee700000 0 0x400>;
1299 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1300 clocks = <&cpg CPG_MOD 813>;
1301 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1302 resets = <&cpg 813>;
1303 phy-mode = "rmii";
1304 #address-cells = <1>;
1305 #size-cells = <0>;
1306 status = "disabled";
1307 };
1309 gic: interrupt-controller@f1001000 {
1310 compatible = "arm,gic-400";
1311 #interrupt-cells = <3>;
1312 #address-cells = <0>;
1313 interrupt-controller;
1314 reg = <0 0xf1001000 0 0x1000>,
1315 <0 0xf1002000 0 0x2000>,
1316 <0 0xf1004000 0 0x2000>,
1317 <0 0xf1006000 0 0x2000>;
1318 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1319 clocks = <&cpg CPG_MOD 408>;
1320 clock-names = "clk";
1321 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1322 resets = <&cpg 408>;
1323 };
1325 vsp@fe928000 {
1326 compatible = "renesas,vsp1";
1327 reg = <0 0xfe928000 0 0x8000>;
1328 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1329 clocks = <&cpg CPG_MOD 131>;
1330 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1331 resets = <&cpg 131>;
1332 };
1334 vsp@fe930000 {
1335 compatible = "renesas,vsp1";
1336 reg = <0 0xfe930000 0 0x8000>;
1337 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1338 clocks = <&cpg CPG_MOD 128>;
1339 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1340 resets = <&cpg 128>;
1341 };
1343 fdp1@fe940000 {
1344 compatible = "renesas,fdp1";
1345 reg = <0 0xfe940000 0 0x2400>;
1346 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1347 clocks = <&cpg CPG_MOD 119>;
1348 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1349 resets = <&cpg 119>;
1350 };
1352 du: display@feb00000 {
1353 compatible = "renesas,du-r8a7794";
1354 reg = <0 0xfeb00000 0 0x40000>;
1355 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1356 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1357 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1358 clock-names = "du.0", "du.1";
1359 resets = <&cpg 724>;
1360 reset-names = "du.0";
1361 status = "disabled";
1363 ports {
1364 #address-cells = <1>;
1365 #size-cells = <0>;
1367 port@0 {
1368 reg = <0>;
1369 du_out_rgb0: endpoint {
1370 };
1371 };
1372 port@1 {
1373 reg = <1>;
1374 du_out_rgb1: endpoint {
1375 };
1376 };
1377 };
1378 };
1380 prr: chipid@ff000044 {
1381 compatible = "renesas,prr";
1382 reg = <0 0xff000044 0 4>;
1383 };
1385 cmt0: timer@ffca0000 {
1386 compatible = "renesas,r8a7794-cmt0",
1387 "renesas,rcar-gen2-cmt0";
1388 reg = <0 0xffca0000 0 0x1004>;
1389 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1390 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1391 clocks = <&cpg CPG_MOD 124>;
1392 clock-names = "fck";
1393 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1394 resets = <&cpg 124>;
1396 status = "disabled";
1397 };
1399 cmt1: timer@e6130000 {
1400 compatible = "renesas,r8a7794-cmt1",
1401 "renesas,rcar-gen2-cmt1";
1402 reg = <0 0xe6130000 0 0x1004>;
1403 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1404 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1405 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1406 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1407 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1408 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1409 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1410 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1411 clocks = <&cpg CPG_MOD 329>;
1412 clock-names = "fck";
1413 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1414 resets = <&cpg 329>;
1416 status = "disabled";
1417 };
1418 };
1420 timer {
1421 compatible = "arm,armv7-timer";
1422 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1423 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1424 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1425 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1426 };
1428 /* External USB clock - can be overridden by the board */
1429 usb_extal_clk: usb_extal {
1430 compatible = "fixed-clock";
1431 #clock-cells = <0>;
1432 clock-frequency = <48000000>;
1433 };
1434 };