| blob | 353ba7b09a0c09f2cadb93ed4c3145daa940af9f |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
22 / {
23 #address-cells = <1>;
24 #size-cells = <1>;
26 aliases {
27 csis0 = &csis0;
28 dmc0 = &dmc0;
29 dmc1 = &dmc1;
30 fimc0 = &fimc0;
31 fimc1 = &fimc1;
32 fimc2 = &fimc2;
33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 i2c2 = &i2c2;
36 i2s0 = &i2s0;
37 i2s1 = &i2s1;
38 i2s2 = &i2s2;
39 pinctrl0 = &pinctrl0;
40 spi0 = &spi0;
41 spi1 = &spi1;
42 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
48 cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a8";
51 reg = <0>;
52 };
53 };
55 xxti: oscillator-0 {
56 compatible = "fixed-clock";
57 clock-frequency = <0>;
58 clock-output-names = "xxti";
59 #clock-cells = <0>;
60 };
62 xusbxti: oscillator-1 {
63 compatible = "fixed-clock";
64 clock-frequency = <0>;
65 clock-output-names = "xusbxti";
66 #clock-cells = <0>;
67 };
69 soc {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
75 onenand: onenand@b0600000 {
76 compatible = "samsung,s5pv210-onenand";
77 reg = <0xb0600000 0x2000>,
78 <0xb0000000 0x20000>,
79 <0xb0040000 0x20000>;
80 interrupt-parent = <&vic1>;
81 interrupts = <31>;
82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
83 clock-names = "bus", "onenand";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 status = "disabled";
87 };
89 chipid@e0000000 {
90 compatible = "samsung,s5pv210-chipid";
91 reg = <0xe0000000 0x1000>;
92 };
94 clocks: clock-controller@e0100000 {
95 compatible = "samsung,s5pv210-clock";
96 reg = <0xe0100000 0x10000>;
97 clock-names = "xxti", "xusbxti";
98 clocks = <&xxti>, <&xusbxti>;
99 #clock-cells = <1>;
100 };
102 pmu_syscon: syscon@e0108000 {
103 compatible = "samsung-s5pv210-pmu", "syscon";
104 reg = <0xe0108000 0x8000>;
105 };
107 pinctrl0: pinctrl@e0200000 {
108 compatible = "samsung,s5pv210-pinctrl";
109 reg = <0xe0200000 0x1000>;
110 interrupt-parent = <&vic0>;
111 interrupts = <30>;
113 wakeup-interrupt-controller {
114 compatible = "samsung,s5pv210-wakeup-eint";
115 interrupts = <16>;
116 interrupt-parent = <&vic0>;
117 };
118 };
120 pdma0: dma@e0900000 {
121 compatible = "arm,pl330", "arm,primecell";
122 reg = <0xe0900000 0x1000>;
123 interrupt-parent = <&vic0>;
124 interrupts = <19>;
125 clocks = <&clocks CLK_PDMA0>;
126 clock-names = "apb_pclk";
127 #dma-cells = <1>;
128 #dma-channels = <8>;
129 #dma-requests = <32>;
130 };
132 pdma1: dma@e0a00000 {
133 compatible = "arm,pl330", "arm,primecell";
134 reg = <0xe0a00000 0x1000>;
135 interrupt-parent = <&vic0>;
136 interrupts = <20>;
137 clocks = <&clocks CLK_PDMA1>;
138 clock-names = "apb_pclk";
139 #dma-cells = <1>;
140 #dma-channels = <8>;
141 #dma-requests = <32>;
142 };
144 adc: adc@e1700000 {
145 compatible = "samsung,s5pv210-adc";
146 reg = <0xe1700000 0x1000>;
147 interrupt-parent = <&vic2>;
148 interrupts = <23>, <24>;
149 clocks = <&clocks CLK_TSADC>;
150 clock-names = "adc";
151 #io-channel-cells = <1>;
152 status = "disabled";
153 };
155 spi0: spi@e1300000 {
156 compatible = "samsung,s5pv210-spi";
157 reg = <0xe1300000 0x1000>;
158 interrupt-parent = <&vic1>;
159 interrupts = <15>;
160 dmas = <&pdma0 7>, <&pdma0 6>;
161 dma-names = "tx", "rx";
162 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
163 clock-names = "spi", "spi_busclk0";
164 pinctrl-names = "default";
165 pinctrl-0 = <&spi0_bus>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 status = "disabled";
169 };
171 spi1: spi@e1400000 {
172 compatible = "samsung,s5pv210-spi";
173 reg = <0xe1400000 0x1000>;
174 interrupt-parent = <&vic1>;
175 interrupts = <16>;
176 dmas = <&pdma1 7>, <&pdma1 6>;
177 dma-names = "tx", "rx";
178 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
179 clock-names = "spi", "spi_busclk0";
180 pinctrl-names = "default";
181 pinctrl-0 = <&spi1_bus>;
182 #address-cells = <1>;
183 #size-cells = <0>;
184 status = "disabled";
185 };
187 keypad: keypad@e1600000 {
188 compatible = "samsung,s5pv210-keypad";
189 reg = <0xe1600000 0x1000>;
190 interrupt-parent = <&vic2>;
191 interrupts = <25>;
192 clocks = <&clocks CLK_KEYIF>;
193 clock-names = "keypad";
194 status = "disabled";
195 };
197 i2c0: i2c@e1800000 {
198 compatible = "samsung,s3c2440-i2c";
199 reg = <0xe1800000 0x1000>;
200 interrupt-parent = <&vic1>;
201 interrupts = <14>;
202 clocks = <&clocks CLK_I2C0>;
203 clock-names = "i2c";
204 pinctrl-names = "default";
205 pinctrl-0 = <&i2c0_bus>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 status = "disabled";
209 };
211 i2c2: i2c@e1a00000 {
212 compatible = "samsung,s3c2440-i2c";
213 reg = <0xe1a00000 0x1000>;
214 interrupt-parent = <&vic1>;
215 interrupts = <19>;
216 clocks = <&clocks CLK_I2C2>;
217 clock-names = "i2c";
218 pinctrl-0 = <&i2c2_bus>;
219 pinctrl-names = "default";
220 #address-cells = <1>;
221 #size-cells = <0>;
222 status = "disabled";
223 };
225 clk_audss: clock-controller@eee10000 {
226 compatible = "samsung,s5pv210-audss-clock";
227 reg = <0xeee10000 0x1000>;
228 clock-names = "hclk", "xxti",
229 "fout_epll",
230 "sclk_audio0";
231 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
232 <&clocks FOUT_EPLL>,
233 <&clocks SCLK_AUDIO0>;
234 #clock-cells = <1>;
235 };
237 i2s0: i2s@eee30000 {
238 compatible = "samsung,s5pv210-i2s";
239 reg = <0xeee30000 0x1000>;
240 interrupt-parent = <&vic2>;
241 interrupts = <16>;
242 dma-names = "rx", "tx", "tx-sec";
243 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
244 clock-names = "iis",
245 "i2s_opclk0",
246 "i2s_opclk1";
247 clocks = <&clk_audss CLK_I2S>,
248 <&clk_audss CLK_I2S>,
249 <&clk_audss CLK_DOUT_AUD_BUS>;
250 samsung,idma-addr = <0xc0010000>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&i2s0_bus>;
253 #sound-dai-cells = <0>;
254 status = "disabled";
255 };
257 i2s1: i2s@e2100000 {
258 compatible = "samsung,s3c6410-i2s";
259 reg = <0xe2100000 0x1000>;
260 interrupt-parent = <&vic2>;
261 interrupts = <17>;
262 dma-names = "rx", "tx";
263 dmas = <&pdma1 12>, <&pdma1 13>;
264 clock-names = "iis", "i2s_opclk0";
265 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&i2s1_bus>;
268 #sound-dai-cells = <0>;
269 status = "disabled";
270 };
272 i2s2: i2s@e2a00000 {
273 compatible = "samsung,s3c6410-i2s";
274 reg = <0xe2a00000 0x1000>;
275 interrupt-parent = <&vic2>;
276 interrupts = <18>;
277 dma-names = "rx", "tx";
278 dmas = <&pdma1 14>, <&pdma1 15>;
279 clock-names = "iis", "i2s_opclk0";
280 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&i2s2_bus>;
283 #sound-dai-cells = <0>;
284 status = "disabled";
285 };
287 pwm: pwm@e2500000 {
288 compatible = "samsung,s5pc100-pwm";
289 reg = <0xe2500000 0x1000>;
290 interrupt-parent = <&vic0>;
291 interrupts = <21>, <22>, <23>, <24>, <25>;
292 clock-names = "timers";
293 clocks = <&clocks CLK_PWM>;
294 #pwm-cells = <3>;
295 };
297 watchdog: watchdog@e2700000 {
298 compatible = "samsung,s3c6410-wdt";
299 reg = <0xe2700000 0x1000>;
300 interrupt-parent = <&vic0>;
301 interrupts = <26>;
302 clock-names = "watchdog";
303 clocks = <&clocks CLK_WDT>;
304 };
306 rtc: rtc@e2800000 {
307 compatible = "samsung,s3c6410-rtc";
308 reg = <0xe2800000 0x100>;
309 interrupt-parent = <&vic0>;
310 interrupts = <28>, <29>;
311 clocks = <&clocks CLK_RTC>;
312 clock-names = "rtc";
313 status = "disabled";
314 };
316 uart0: serial@e2900000 {
317 compatible = "samsung,s5pv210-uart";
318 reg = <0xe2900000 0x400>;
319 interrupt-parent = <&vic1>;
320 interrupts = <10>;
321 clock-names = "uart", "clk_uart_baud0",
322 "clk_uart_baud1";
323 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
324 <&clocks SCLK_UART0>;
325 status = "disabled";
326 };
328 uart1: serial@e2900400 {
329 compatible = "samsung,s5pv210-uart";
330 reg = <0xe2900400 0x400>;
331 interrupt-parent = <&vic1>;
332 interrupts = <11>;
333 clock-names = "uart", "clk_uart_baud0",
334 "clk_uart_baud1";
335 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
336 <&clocks SCLK_UART1>;
337 status = "disabled";
338 };
340 uart2: serial@e2900800 {
341 compatible = "samsung,s5pv210-uart";
342 reg = <0xe2900800 0x400>;
343 interrupt-parent = <&vic1>;
344 interrupts = <12>;
345 clock-names = "uart", "clk_uart_baud0",
346 "clk_uart_baud1";
347 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
348 <&clocks SCLK_UART2>;
349 status = "disabled";
350 };
352 uart3: serial@e2900c00 {
353 compatible = "samsung,s5pv210-uart";
354 reg = <0xe2900c00 0x400>;
355 interrupt-parent = <&vic1>;
356 interrupts = <13>;
357 clock-names = "uart", "clk_uart_baud0",
358 "clk_uart_baud1";
359 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
360 <&clocks SCLK_UART3>;
361 status = "disabled";
362 };
364 sdhci0: sdhci@eb000000 {
365 compatible = "samsung,s3c6410-sdhci";
366 reg = <0xeb000000 0x100000>;
367 interrupt-parent = <&vic1>;
368 interrupts = <26>;
369 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
370 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
371 <&clocks SCLK_MMC0>;
372 status = "disabled";
373 };
375 sdhci1: sdhci@eb100000 {
376 compatible = "samsung,s3c6410-sdhci";
377 reg = <0xeb100000 0x100000>;
378 interrupt-parent = <&vic1>;
379 interrupts = <27>;
380 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
381 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
382 <&clocks SCLK_MMC1>;
383 status = "disabled";
384 };
386 sdhci2: sdhci@eb200000 {
387 compatible = "samsung,s3c6410-sdhci";
388 reg = <0xeb200000 0x100000>;
389 interrupt-parent = <&vic1>;
390 interrupts = <28>;
391 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
392 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
393 <&clocks SCLK_MMC2>;
394 status = "disabled";
395 };
397 sdhci3: sdhci@eb300000 {
398 compatible = "samsung,s3c6410-sdhci";
399 reg = <0xeb300000 0x100000>;
400 interrupt-parent = <&vic3>;
401 interrupts = <2>;
402 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
403 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
404 <&clocks SCLK_MMC3>;
405 status = "disabled";
406 };
408 hsotg: hsotg@ec000000 {
409 compatible = "samsung,s3c6400-hsotg";
410 reg = <0xec000000 0x20000>;
411 interrupt-parent = <&vic1>;
412 interrupts = <24>;
413 clocks = <&clocks CLK_USB_OTG>;
414 clock-names = "otg";
415 phy-names = "usb2-phy";
416 phys = <&usbphy 0>;
417 status = "disabled";
418 };
420 usbphy: usbphy@ec100000 {
421 compatible = "samsung,s5pv210-usb2-phy";
422 reg = <0xec100000 0x100>;
423 samsung,pmureg-phandle = <&pmu_syscon>;
424 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
425 clock-names = "phy", "ref";
426 #phy-cells = <1>;
427 status = "disabled";
428 };
430 ehci: ehci@ec200000 {
431 compatible = "samsung,exynos4210-ehci";
432 reg = <0xec200000 0x100>;
433 interrupts = <23>;
434 interrupt-parent = <&vic1>;
435 clocks = <&clocks CLK_USB_HOST>;
436 clock-names = "usbhost";
437 #address-cells = <1>;
438 #size-cells = <0>;
439 status = "disabled";
441 port@0 {
442 reg = <0>;
443 phys = <&usbphy 1>;
444 };
445 };
447 ohci: ohci@ec300000 {
448 compatible = "samsung,exynos4210-ohci";
449 reg = <0xec300000 0x100>;
450 interrupts = <23>;
451 interrupt-parent = <&vic1>;
452 clocks = <&clocks CLK_USB_HOST>;
453 clock-names = "usbhost";
454 #address-cells = <1>;
455 #size-cells = <0>;
456 status = "disabled";
458 port@0 {
459 reg = <0>;
460 phys = <&usbphy 1>;
461 };
462 };
464 mfc: codec@f1700000 {
465 compatible = "samsung,mfc-v5";
466 reg = <0xf1700000 0x10000>;
467 interrupt-parent = <&vic2>;
468 interrupts = <14>;
469 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
470 clock-names = "sclk_mfc", "mfc";
471 };
473 vic0: interrupt-controller@f2000000 {
474 compatible = "arm,pl192-vic";
475 interrupt-controller;
476 reg = <0xf2000000 0x1000>;
477 #interrupt-cells = <1>;
478 };
480 vic1: interrupt-controller@f2100000 {
481 compatible = "arm,pl192-vic";
482 interrupt-controller;
483 reg = <0xf2100000 0x1000>;
484 #interrupt-cells = <1>;
485 };
487 vic2: interrupt-controller@f2200000 {
488 compatible = "arm,pl192-vic";
489 interrupt-controller;
490 reg = <0xf2200000 0x1000>;
491 #interrupt-cells = <1>;
492 };
494 vic3: interrupt-controller@f2300000 {
495 compatible = "arm,pl192-vic";
496 interrupt-controller;
497 reg = <0xf2300000 0x1000>;
498 #interrupt-cells = <1>;
499 };
501 fimd: fimd@f8000000 {
502 compatible = "samsung,s5pv210-fimd";
503 interrupt-parent = <&vic2>;
504 reg = <0xf8000000 0x20000>;
505 interrupt-names = "fifo", "vsync", "lcd_sys";
506 interrupts = <0>, <1>, <2>;
507 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
508 clock-names = "sclk_fimd", "fimd";
509 status = "disabled";
510 };
512 dmc0: dmc@f0000000 {
513 compatible = "samsung,s5pv210-dmc";
514 reg = <0xf0000000 0x1000>;
515 };
517 dmc1: dmc@f1400000 {
518 compatible = "samsung,s5pv210-dmc";
519 reg = <0xf1400000 0x1000>;
520 };
522 g2d: g2d@fa000000 {
523 compatible = "samsung,s5pv210-g2d";
524 reg = <0xfa000000 0x1000>;
525 interrupt-parent = <&vic2>;
526 interrupts = <9>;
527 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
528 clock-names = "sclk_fimg2d", "fimg2d";
529 };
531 mdma1: mdma@fa200000 {
532 compatible = "arm,pl330", "arm,primecell";
533 reg = <0xfa200000 0x1000>;
534 interrupt-parent = <&vic0>;
535 interrupts = <18>;
536 clocks = <&clocks CLK_MDMA>;
537 clock-names = "apb_pclk";
538 #dma-cells = <1>;
539 #dma-channels = <8>;
540 #dma-requests = <1>;
541 };
543 rotator: rotator@fa300000 {
544 compatible = "samsung,s5pv210-rotator";
545 reg = <0xfa300000 0x1000>;
546 interrupt-parent = <&vic2>;
547 interrupts = <4>;
548 clocks = <&clocks CLK_ROTATOR>;
549 clock-names = "rotator";
550 };
552 i2c1: i2c@fab00000 {
553 compatible = "samsung,s3c2440-i2c";
554 reg = <0xfab00000 0x1000>;
555 interrupt-parent = <&vic2>;
556 interrupts = <13>;
557 clocks = <&clocks CLK_I2C1>;
558 clock-names = "i2c";
559 pinctrl-names = "default";
560 pinctrl-0 = <&i2c1_bus>;
561 #address-cells = <1>;
562 #size-cells = <0>;
563 status = "disabled";
564 };
566 camera: camera {
567 compatible = "samsung,fimc", "simple-bus";
568 pinctrl-names = "default";
569 pinctrl-0 = <>;
570 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
571 clock-names = "sclk_cam0", "sclk_cam1";
572 #address-cells = <1>;
573 #size-cells = <1>;
574 #clock-cells = <1>;
575 clock-output-names = "cam_a_clkout", "cam_b_clkout";
576 ranges;
578 csis0: csis@fa600000 {
579 compatible = "samsung,s5pv210-csis";
580 reg = <0xfa600000 0x4000>;
581 interrupt-parent = <&vic2>;
582 interrupts = <29>;
583 clocks = <&clocks CLK_CSIS>,
584 <&clocks SCLK_CSIS>;
585 clock-names = "clk_csis",
586 "sclk_csis";
587 bus-width = <4>;
588 status = "disabled";
589 #address-cells = <1>;
590 #size-cells = <0>;
591 };
593 fimc0: fimc@fb200000 {
594 compatible = "samsung,s5pv210-fimc";
595 reg = <0xfb200000 0x1000>;
596 interrupts = <5>;
597 interrupt-parent = <&vic2>;
598 clocks = <&clocks CLK_FIMC0>,
599 <&clocks SCLK_FIMC0>;
600 clock-names = "fimc",
601 "sclk_fimc";
602 samsung,pix-limits = <4224 8192 1920 4224>;
603 samsung,min-pix-alignment = <16 8>;
604 samsung,cam-if;
605 };
607 fimc1: fimc@fb300000 {
608 compatible = "samsung,s5pv210-fimc";
609 reg = <0xfb300000 0x1000>;
610 interrupt-parent = <&vic2>;
611 interrupts = <6>;
612 clocks = <&clocks CLK_FIMC1>,
613 <&clocks SCLK_FIMC1>;
614 clock-names = "fimc",
615 "sclk_fimc";
616 samsung,pix-limits = <4224 8192 1920 4224>;
617 samsung,min-pix-alignment = <1 1>;
618 samsung,mainscaler-ext;
619 samsung,cam-if;
620 samsung,lcd-wb;
621 };
623 fimc2: fimc@fb400000 {
624 compatible = "samsung,s5pv210-fimc";
625 reg = <0xfb400000 0x1000>;
626 interrupt-parent = <&vic2>;
627 interrupts = <7>;
628 clocks = <&clocks CLK_FIMC2>,
629 <&clocks SCLK_FIMC2>;
630 clock-names = "fimc",
631 "sclk_fimc";
632 samsung,pix-limits = <1920 8192 1280 1920>;
633 samsung,min-pix-alignment = <16 8>;
634 samsung,rotators = <0>;
635 samsung,cam-if;
636 };
637 };
639 jpeg_codec: jpeg-codec@fb600000 {
640 compatible = "samsung,s5pv210-jpeg";
641 reg = <0xfb600000 0x1000>;
642 interrupt-parent = <&vic2>;
643 interrupts = <8>;
644 clocks = <&clocks CLK_JPEG>;
645 clock-names = "jpeg";
646 };
647 };
648 };
650 #include "s5pv210-pinctrl.dtsi"