arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/input/input.h>
   3 #include "tegra30.dtsi"
   4
   5 /**
   6  * This file contains common DT entry for all fab version of Cardhu.
   7  * There is multiple fab version of Cardhu starting from A01 to A07.
   8  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
   9  * A02 will have different sets of GPIOs for fixed regulator compare to
  10  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
  11  * compatible with fab version A04. Based on Cardhu fab version, the
  12  * related dts file need to be chosen like for Cardhu fab version A02,
  13  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  14  * tegra30-cardhu-a04.dts.
  15  * The identification of board is done in two ways, by looking the sticker
  16  * on PCB and by reading board id eeprom.
  17  * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
  18  * number is the fab version like here it is 002 and hence fab version A02.
  19  * The (downstream internal) U-Boot of Cardhu display the board-id as
  20  * follows:
  21  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  22  * In this Fab version is 02 i.e. A02.
  23  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  24  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  25  * wide.
  26  */
  27
  28 / {
  29         model = "NVIDIA Tegra30 Cardhu evaluation board";
  30         compatible = "nvidia,cardhu", "nvidia,tegra30";
  31
  32         aliases {
  33                 rtc0 = "/i2c@7000d000/tps65911@2d";
  34                 rtc1 = "/rtc@7000e000";
  35                 serial0 = &uarta;
  36                 serial1 = &uartc;
  37         };
  38
  39         chosen {
  40                 stdout-path = "serial0:115200n8";
  41         };
  42
  43         memory@80000000 {
  44                 reg = <0x80000000 0x40000000>;
  45         };
  46
  47         pcie@3000 {
  48                 status = "okay";
  49
  50                 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
  51                 avdd-pexb-supply = <&ldo1_reg>;
  52                 vdd-pexb-supply = <&ldo1_reg>;
  53                 avdd-pex-pll-supply = <&ldo1_reg>;
  54                 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
  55                 vddio-pex-ctl-supply = <&sys_3v3_reg>;
  56                 avdd-plle-supply = <&ldo2_reg>;
  57
  58                 pci@1,0 {
  59                         nvidia,num-lanes = <4>;
  60                 };
  61
  62                 pci@2,0 {
  63                         nvidia,num-lanes = <1>;
  64                 };
  65
  66                 pci@3,0 {
  67                         status = "okay";
  68                         nvidia,num-lanes = <1>;
  69                 };
  70         };
  71
  72         host1x@50000000 {
  73                 dc@54200000 {
  74                         rgb {
  75                                 status = "okay";
  76
  77                                 nvidia,panel = <&panel>;
  78                         };
  79                 };
  80         };
  81
  82         pinmux@70000868 {
  83                 pinctrl-names = "default";
  84                 pinctrl-0 = <&state_default>;
  85
  86                 state_default: pinmux {
  87                         sdmmc1_clk_pz0 {
  88                                 nvidia,pins = "sdmmc1_clk_pz0";
  89                                 nvidia,function = "sdmmc1";
  90                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  91                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  92                         };
  93                         sdmmc1_cmd_pz1 {
  94                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  95                                                 "sdmmc1_dat0_py7",
  96                                                 "sdmmc1_dat1_py6",
  97                                                 "sdmmc1_dat2_py5",
  98                                                 "sdmmc1_dat3_py4";
  99                                 nvidia,function = "sdmmc1";
 100                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 101                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 102                         };
 103                         sdmmc3_clk_pa6 {
 104                                 nvidia,pins = "sdmmc3_clk_pa6";
 105                                 nvidia,function = "sdmmc3";
 106                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 107                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 108                         };
 109                         sdmmc3_cmd_pa7 {
 110                                 nvidia,pins =   "sdmmc3_cmd_pa7",
 111                                                 "sdmmc3_dat0_pb7",
 112                                                 "sdmmc3_dat1_pb6",
 113                                                 "sdmmc3_dat2_pb5",
 114                                                 "sdmmc3_dat3_pb4";
 115                                 nvidia,function = "sdmmc3";
 116                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 117                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 118                         };
 119                         sdmmc4_clk_pcc4 {
 120                                 nvidia,pins =   "sdmmc4_clk_pcc4",
 121                                                 "sdmmc4_rst_n_pcc3";
 122                                 nvidia,function = "sdmmc4";
 123                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 125                         };
 126                         sdmmc4_dat0_paa0 {
 127                                 nvidia,pins =   "sdmmc4_dat0_paa0",
 128                                                 "sdmmc4_dat1_paa1",
 129                                                 "sdmmc4_dat2_paa2",
 130                                                 "sdmmc4_dat3_paa3",
 131                                                 "sdmmc4_dat4_paa4",
 132                                                 "sdmmc4_dat5_paa5",
 133                                                 "sdmmc4_dat6_paa6",
 134                                                 "sdmmc4_dat7_paa7";
 135                                 nvidia,function = "sdmmc4";
 136                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 137                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 138                         };
 139                         dap2_fs_pa2 {
 140                                 nvidia,pins =   "dap2_fs_pa2",
 141                                                 "dap2_sclk_pa3",
 142                                                 "dap2_din_pa4",
 143                                                 "dap2_dout_pa5";
 144                                 nvidia,function = "i2s1";
 145                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 146                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 147                         };
 148                         sdio3 {
 149                                 nvidia,pins = "drive_sdio3";
 150                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 151                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 152                                 nvidia,pull-down-strength = <46>;
 153                                 nvidia,pull-up-strength = <42>;
 154                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
 155                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
 156                         };
 157                         uart3_txd_pw6 {
 158                                 nvidia,pins =   "uart3_txd_pw6",
 159                                                 "uart3_cts_n_pa1",
 160                                                 "uart3_rts_n_pc0",
 161                                                 "uart3_rxd_pw7";
 162                                 nvidia,function = "uartc";
 163                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 164                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 165                         };
 166                 };
 167         };
 168
 169         serial@70006000 {
 170                 status = "okay";
 171         };
 172
 173         serial@70006200 {
 174                 compatible = "nvidia,tegra30-hsuart";
 175                 status = "okay";
 176         };
 177
 178         pwm@7000a000 {
 179                 status = "okay";
 180         };
 181
 182         panelddc: i2c@7000c000 {
 183                 status = "okay";
 184                 clock-frequency = <100000>;
 185         };
 186
 187         i2c@7000c400 {
 188                 status = "okay";
 189                 clock-frequency = <100000>;
 190         };
 191
 192         i2c@7000c500 {
 193                 status = "okay";
 194                 clock-frequency = <100000>;
 195
 196                 /* ALS and Proximity sensor */
 197                 isl29028@44 {
 198                         compatible = "isil,isl29028";
 199                         reg = <0x44>;
 200                         interrupt-parent = <&gpio>;
 201                         interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
 202                 };
 203
 204                 i2cmux@70 {
 205                         compatible = "nxp,pca9546";
 206                         #address-cells = <1>;
 207                         #size-cells = <0>;
 208                         reg = <0x70>;
 209                         reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
 210                 };
 211         };
 212
 213         i2c@7000c700 {
 214                 status = "okay";
 215                 clock-frequency = <100000>;
 216         };
 217
 218         i2c@7000d000 {
 219                 status = "okay";
 220                 clock-frequency = <100000>;
 221
 222                 wm8903: wm8903@1a {
 223                         compatible = "wlf,wm8903";
 224                         reg = <0x1a>;
 225                         interrupt-parent = <&gpio>;
 226                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
 227
 228                         gpio-controller;
 229                         #gpio-cells = <2>;
 230
 231                         micdet-cfg = <0>;
 232                         micdet-delay = <100>;
 233                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 234                 };
 235
 236                 pmic: tps65911@2d {
 237                         compatible = "ti,tps65911";
 238                         reg = <0x2d>;
 239
 240                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 241                         #interrupt-cells = <2>;
 242                         interrupt-controller;
 243
 244                         ti,system-power-controller;
 245
 246                         #gpio-cells = <2>;
 247                         gpio-controller;
 248
 249                         vcc1-supply = <&vdd_ac_bat_reg>;
 250                         vcc2-supply = <&vdd_ac_bat_reg>;
 251                         vcc3-supply = <&vio_reg>;
 252                         vcc4-supply = <&vdd_5v0_reg>;
 253                         vcc5-supply = <&vdd_ac_bat_reg>;
 254                         vcc6-supply = <&vdd2_reg>;
 255                         vcc7-supply = <&vdd_ac_bat_reg>;
 256                         vccio-supply = <&vdd_ac_bat_reg>;
 257
 258                         regulators {
 259                                 vdd1_reg: vdd1 {
 260                                         regulator-name = "vddio_ddr_1v2";
 261                                         regulator-min-microvolt = <1200000>;
 262                                         regulator-max-microvolt = <1200000>;
 263                                         regulator-always-on;
 264                                 };
 265
 266                                 vdd2_reg: vdd2 {
 267                                         regulator-name = "vdd_1v5_gen";
 268                                         regulator-min-microvolt = <1500000>;
 269                                         regulator-max-microvolt = <1500000>;
 270                                         regulator-always-on;
 271                                 };
 272
 273                                 vddctrl_reg: vddctrl {
 274                                         regulator-name = "vdd_cpu,vdd_sys";
 275                                         regulator-min-microvolt = <1000000>;
 276                                         regulator-max-microvolt = <1000000>;
 277                                         regulator-always-on;
 278                                 };
 279
 280                                 vio_reg: vio {
 281                                         regulator-name = "vdd_1v8_gen";
 282                                         regulator-min-microvolt = <1800000>;
 283                                         regulator-max-microvolt = <1800000>;
 284                                         regulator-always-on;
 285                                 };
 286
 287                                 ldo1_reg: ldo1 {
 288                                         regulator-name = "vdd_pexa,vdd_pexb";
 289                                         regulator-min-microvolt = <1050000>;
 290                                         regulator-max-microvolt = <1050000>;
 291                                 };
 292
 293                                 ldo2_reg: ldo2 {
 294                                         regulator-name = "vdd_sata,avdd_plle";
 295                                         regulator-min-microvolt = <1050000>;
 296                                         regulator-max-microvolt = <1050000>;
 297                                 };
 298
 299                                 /* LDO3 is not connected to anything */
 300
 301                                 ldo4_reg: ldo4 {
 302                                         regulator-name = "vdd_rtc";
 303                                         regulator-min-microvolt = <1200000>;
 304                                         regulator-max-microvolt = <1200000>;
 305                                         regulator-always-on;
 306                                 };
 307
 308                                 ldo5_reg: ldo5 {
 309                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 310                                         regulator-min-microvolt = <3300000>;
 311                                         regulator-max-microvolt = <3300000>;
 312                                         regulator-always-on;
 313                                 };
 314
 315                                 ldo6_reg: ldo6 {
 316                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 317                                         regulator-min-microvolt = <1200000>;
 318                                         regulator-max-microvolt = <1200000>;
 319                                 };
 320
 321                                 ldo7_reg: ldo7 {
 322                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 323                                         regulator-min-microvolt = <1200000>;
 324                                         regulator-max-microvolt = <1200000>;
 325                                         regulator-always-on;
 326                                 };
 327
 328                                 ldo8_reg: ldo8 {
 329                                         regulator-name = "vdd_ddr_hs";
 330                                         regulator-min-microvolt = <1000000>;
 331                                         regulator-max-microvolt = <1000000>;
 332                                         regulator-always-on;
 333                                 };
 334                         };
 335                 };
 336
 337                 temperature-sensor@4c {
 338                         compatible = "onnn,nct1008";
 339                         reg = <0x4c>;
 340                         vcc-supply = <&sys_3v3_reg>;
 341                         interrupt-parent = <&gpio>;
 342                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
 343                 };
 344
 345                 tps62361@60 {
 346                         compatible = "ti,tps62361";
 347                         reg = <0x60>;
 348
 349                         regulator-name = "tps62361-vout";
 350                         regulator-min-microvolt = <500000>;
 351                         regulator-max-microvolt = <1500000>;
 352                         regulator-boot-on;
 353                         regulator-always-on;
 354                         ti,vsel0-state-high;
 355                         ti,vsel1-state-high;
 356                 };
 357         };
 358
 359         spi@7000da00 {
 360                 status = "okay";
 361                 spi-max-frequency = <25000000>;
 362                 spi-flash@1 {
 363                         compatible = "winbond,w25q32", "jedec,spi-nor";
 364                         reg = <1>;
 365                         spi-max-frequency = <20000000>;
 366                 };
 367         };
 368
 369         pmc@7000e400 {
 370                 status = "okay";
 371                 nvidia,invert-interrupt;
 372                 nvidia,suspend-mode = <1>;
 373                 nvidia,cpu-pwr-good-time = <2000>;
 374                 nvidia,cpu-pwr-off-time = <200>;
 375                 nvidia,core-pwr-good-time = <3845 3845>;
 376                 nvidia,core-pwr-off-time = <0>;
 377                 nvidia,core-power-req-active-high;
 378                 nvidia,sys-clock-req-active-high;
 379         };
 380
 381         ahub@70080000 {
 382                 i2s@70080400 {
 383                         status = "okay";
 384                 };
 385         };
 386
 387         mmc@78000000 {
 388                 status = "okay";
 389                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 390                 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 391                 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
 392                 bus-width = <4>;
 393         };
 394
 395         mmc@78000600 {
 396                 status = "okay";
 397                 bus-width = <8>;
 398                 non-removable;
 399         };
 400
 401         usb@7d008000 {
 402                 status = "okay";
 403         };
 404
 405         usb-phy@7d008000 {
 406                 vbus-supply = <&usb3_vbus_reg>;
 407                 status = "okay";
 408         };
 409
 410         backlight: backlight {
 411                 compatible = "pwm-backlight";
 412
 413                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 414                 power-supply = <&vdd_bl_reg>;
 415                 pwms = <&pwm 0 5000000>;
 416
 417                 brightness-levels = <0 4 8 16 32 64 128 255>;
 418                 default-brightness-level = <6>;
 419         };
 420
 421         clk32k_in: clock@0 {
 422                 compatible = "fixed-clock";
 423                 clock-frequency = <32768>;
 424                 #clock-cells = <0>;
 425         };
 426
 427         panel: panel {
 428                 compatible = "chunghwa,claa101wb01";
 429                 ddc-i2c-bus = <&panelddc>;
 430
 431                 power-supply = <&vdd_pnl1_reg>;
 432                 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
 433
 434                 backlight = <&backlight>;
 435         };
 436
 437         vdd_ac_bat_reg: regulator@0 {
 438                 compatible = "regulator-fixed";
 439                 regulator-name = "vdd_ac_bat";
 440                 regulator-min-microvolt = <5000000>;
 441                 regulator-max-microvolt = <5000000>;
 442                 regulator-always-on;
 443         };
 444
 445         cam_1v8_reg: regulator@1 {
 446                 compatible = "regulator-fixed";
 447                 regulator-name = "cam_1v8";
 448                 regulator-min-microvolt = <1800000>;
 449                 regulator-max-microvolt = <1800000>;
 450                 enable-active-high;
 451                 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
 452                 vin-supply = <&vio_reg>;
 453         };
 454
 455         cp_5v_reg: regulator@2 {
 456                 compatible = "regulator-fixed";
 457                 regulator-name = "cp_5v";
 458                 regulator-min-microvolt = <5000000>;
 459                 regulator-max-microvolt = <5000000>;
 460                 regulator-boot-on;
 461                 regulator-always-on;
 462                 enable-active-high;
 463                 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 464         };
 465
 466         emmc_3v3_reg: regulator@3 {
 467                 compatible = "regulator-fixed";
 468                 regulator-name = "emmc_3v3";
 469                 regulator-min-microvolt = <3300000>;
 470                 regulator-max-microvolt = <3300000>;
 471                 regulator-always-on;
 472                 regulator-boot-on;
 473                 enable-active-high;
 474                 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
 475                 vin-supply = <&sys_3v3_reg>;
 476         };
 477
 478         modem_3v3_reg: regulator@4 {
 479                 compatible = "regulator-fixed";
 480                 regulator-name = "modem_3v3";
 481                 regulator-min-microvolt = <3300000>;
 482                 regulator-max-microvolt = <3300000>;
 483                 enable-active-high;
 484                 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
 485         };
 486
 487         pex_hvdd_3v3_reg: regulator@5 {
 488                 compatible = "regulator-fixed";
 489                 regulator-name = "pex_hvdd_3v3";
 490                 regulator-min-microvolt = <3300000>;
 491                 regulator-max-microvolt = <3300000>;
 492                 enable-active-high;
 493                 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
 494                 vin-supply = <&sys_3v3_reg>;
 495         };
 496
 497         vdd_cam1_ldo_reg: regulator@6 {
 498                 compatible = "regulator-fixed";
 499                 regulator-name = "vdd_cam1_ldo";
 500                 regulator-min-microvolt = <2800000>;
 501                 regulator-max-microvolt = <2800000>;
 502                 enable-active-high;
 503                 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
 504                 vin-supply = <&sys_3v3_reg>;
 505         };
 506
 507         vdd_cam2_ldo_reg: regulator@7 {
 508                 compatible = "regulator-fixed";
 509                 regulator-name = "vdd_cam2_ldo";
 510                 regulator-min-microvolt = <2800000>;
 511                 regulator-max-microvolt = <2800000>;
 512                 enable-active-high;
 513                 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
 514                 vin-supply = <&sys_3v3_reg>;
 515         };
 516
 517         vdd_cam3_ldo_reg: regulator@8 {
 518                 compatible = "regulator-fixed";
 519                 regulator-name = "vdd_cam3_ldo";
 520                 regulator-min-microvolt = <3300000>;
 521                 regulator-max-microvolt = <3300000>;
 522                 enable-active-high;
 523                 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
 524                 vin-supply = <&sys_3v3_reg>;
 525         };
 526
 527         vdd_com_reg: regulator@9 {
 528                 compatible = "regulator-fixed";
 529                 regulator-name = "vdd_com";
 530                 regulator-min-microvolt = <3300000>;
 531                 regulator-max-microvolt = <3300000>;
 532                 regulator-always-on;
 533                 regulator-boot-on;
 534                 enable-active-high;
 535                 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 536                 vin-supply = <&sys_3v3_reg>;
 537         };
 538
 539         vdd_fuse_3v3_reg: regulator@10 {
 540                 compatible = "regulator-fixed";
 541                 regulator-name = "vdd_fuse_3v3";
 542                 regulator-min-microvolt = <3300000>;
 543                 regulator-max-microvolt = <3300000>;
 544                 enable-active-high;
 545                 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
 546                 vin-supply = <&sys_3v3_reg>;
 547         };
 548
 549         vdd_pnl1_reg: regulator@11 {
 550                 compatible = "regulator-fixed";
 551                 regulator-name = "vdd_pnl1";
 552                 regulator-min-microvolt = <3300000>;
 553                 regulator-max-microvolt = <3300000>;
 554                 regulator-always-on;
 555                 regulator-boot-on;
 556                 enable-active-high;
 557                 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
 558                 vin-supply = <&sys_3v3_reg>;
 559         };
 560
 561         vdd_vid_reg: regulator@12 {
 562                 compatible = "regulator-fixed";
 563                 regulator-name = "vddio_vid";
 564                 regulator-min-microvolt = <5000000>;
 565                 regulator-max-microvolt = <5000000>;
 566                 enable-active-high;
 567                 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
 568                 gpio-open-drain;
 569                 vin-supply = <&vdd_5v0_reg>;
 570         };
 571
 572         sound {
 573                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 574                              "nvidia,tegra-audio-wm8903";
 575                 nvidia,model = "NVIDIA Tegra Cardhu";
 576
 577                 nvidia,audio-routing =
 578                         "Headphone Jack", "HPOUTR",
 579                         "Headphone Jack", "HPOUTL",
 580                         "Int Spk", "ROP",
 581                         "Int Spk", "RON",
 582                         "Int Spk", "LOP",
 583                         "Int Spk", "LON",
 584                         "Mic Jack", "MICBIAS",
 585                         "IN1L", "Mic Jack";
 586
 587                 nvidia,i2s-controller = <&tegra_i2s1>;
 588                 nvidia,audio-codec = <&wm8903>;
 589
 590                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 591                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 592                         GPIO_ACTIVE_HIGH>;
 593
 594                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 595                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 596                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
 597                 clock-names = "pll_a", "pll_a_out0", "mclk";
 598
 599                 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
 600                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
 601
 602                 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 603                                          <&tegra_car TEGRA30_CLK_EXTERN1>;
 604         };
 605
 606         gpio-keys {
 607                 compatible = "gpio-keys";
 608
 609                 power {
 610                         label = "Power";
 611                         interrupt-parent = <&pmic>;
 612                         interrupts = <2 0>;
 613                         linux,code = <KEY_POWER>;
 614                         debounce-interval = <100>;
 615                         wakeup-source;
 616                 };
 617
 618                 volume-down {
 619                         label = "Volume Down";
 620                         gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
 621                         linux,code = <KEY_VOLUMEDOWN>;
 622                         debounce-interval = <10>;
 623                 };
 624
 625                 volume-up {
 626                         label = "Volume Up";
 627                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
 628                         linux,code = <KEY_VOLUMEUP>;
 629                         debounce-interval = <10>;
 630                 };
 631         };
 632 };