arch/mips/boot/dts/ingenic/ci20.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include "jz4780.dtsi"
   5 #include <dt-bindings/clock/ingenic,tcu.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
  10
  11 / {
  12         compatible = "img,ci20", "ingenic,jz4780";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 serial1 = &uart1;
  17                 serial3 = &uart3;
  18                 serial4 = &uart4;
  19         };
  20
  21         chosen {
  22                 stdout-path = &uart4;
  23         };
  24
  25         memory {
  26                 device_type = "memory";
  27                 reg = <0x0 0x10000000
  28                        0x30000000 0x30000000>;
  29         };
  30
  31         gpio-keys {
  32                 compatible = "gpio-keys";
  33
  34                 sw1 {
  35                         label = "ci20:sw1";
  36                         linux,code = <KEY_F13>;
  37                         gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
  38                         wakeup-source;
  39                 };
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 led0 {
  46                         label = "ci20:red:led0";
  47                         gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
  48                         linux,default-trigger = "none";
  49                 };
  50
  51                 led1 {
  52                         label = "ci20:red:led1";
  53                         gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
  54                         linux,default-trigger = "nand-disk";
  55                 };
  56
  57                 led2 {
  58                         label = "ci20:red:led2";
  59                         gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
  60                         linux,default-trigger = "cpu1";
  61                 };
  62
  63                 led3 {
  64                         label = "ci20:red:led3";
  65                         gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
  66                         linux,default-trigger = "cpu0";
  67                 };
  68         };
  69
  70         eth0_power: fixedregulator@0 {
  71                 compatible = "regulator-fixed";
  72
  73                 regulator-name = "eth0_power";
  74                 regulator-min-microvolt = <3300000>;
  75                 regulator-max-microvolt = <3300000>;
  76
  77                 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
  78                 enable-active-high;
  79         };
  80
  81         ir: ir {
  82                 compatible = "gpio-ir-receiver";
  83                 gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
  84         };
  85
  86         wlan0_power: fixedregulator@1 {
  87                 compatible = "regulator-fixed";
  88
  89                 regulator-name = "wlan0_power";
  90
  91                 gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
  92                 enable-active-high;
  93         };
  94
  95         otg_power: fixedregulator@2 {
  96                 compatible = "regulator-fixed";
  97
  98                 regulator-name = "otg_power";
  99                 regulator-min-microvolt = <5000000>;
 100                 regulator-max-microvolt = <5000000>;
 101
 102                 gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
 103                 enable-active-high;
 104         };
 105 };
 106
 107 &ext {
 108         clock-frequency = <48000000>;
 109 };
 110
 111 &cgu {
 112         /*
 113          * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
 114          * precision.
 115          */
 116         assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>;
 117         assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>;
 118         assigned-clock-rates = <48000000>;
 119 };
 120
 121 &mmc0 {
 122         status = "okay";
 123
 124         bus-width = <4>;
 125         max-frequency = <50000000>;
 126
 127         pinctrl-names = "default";
 128         pinctrl-0 = <&pins_mmc0>;
 129
 130         cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
 131 };
 132
 133 &mmc1 {
 134         status = "okay";
 135
 136         bus-width = <4>;
 137         max-frequency = <50000000>;
 138         non-removable;
 139
 140         pinctrl-names = "default";
 141         pinctrl-0 = <&pins_mmc1>;
 142
 143         brcmf: wifi@1 {
 144 /*              reg = <4>;*/
 145                 compatible = "brcm,bcm4330-fmac";
 146                 vcc-supply = <&wlan0_power>;
 147                 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
 148                 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
 149         };
 150 };
 151
 152 &uart0 {
 153         status = "okay";
 154
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&pins_uart0>;
 157 };
 158
 159 &uart1 {
 160         status = "okay";
 161
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pins_uart1>;
 164 };
 165
 166 &uart2 {
 167         status = "okay";
 168
 169         pinctrl-names = "default";
 170         pinctrl-0 = <&pins_uart2>;
 171         uart-has-rtscts;
 172
 173         bluetooth {
 174                 compatible = "brcm,bcm4330-bt";
 175                 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
 176                 vcc-supply = <&wlan0_power>;
 177                 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
 178                 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
 179                 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
 180         };
 181 };
 182
 183 &uart3 {
 184         status = "okay";
 185
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&pins_uart3>;
 188 };
 189
 190 &uart4 {
 191         status = "okay";
 192
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&pins_uart4>;
 195 };
 196
 197 &i2c0 {
 198         status = "okay";
 199
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&pins_i2c0>;
 202
 203         clock-frequency = <400000>;
 204
 205         act8600: act8600@5a {
 206                 compatible = "active-semi,act8600";
 207                 reg = <0x5a>;
 208                 status = "okay";
 209
 210                 regulators {
 211                         vddcore: SUDCDC1 {
 212                                 regulator-name = "DCDC_REG1";
 213                                 regulator-min-microvolt = <1100000>;
 214                                 regulator-max-microvolt = <1100000>;
 215                                 regulator-always-on;
 216                         };
 217                         vddmem: SUDCDC2 {
 218                                 regulator-name = "DCDC_REG2";
 219                                 regulator-min-microvolt = <1500000>;
 220                                 regulator-max-microvolt = <1500000>;
 221                                 regulator-always-on;
 222                         };
 223                         vcc_33: SUDCDC3 {
 224                                 regulator-name = "DCDC_REG3";
 225                                 regulator-min-microvolt = <3300000>;
 226                                 regulator-max-microvolt = <3300000>;
 227                                 regulator-always-on;
 228                         };
 229                         vcc_50: SUDCDC4 {
 230                                 regulator-name = "SUDCDC_REG4";
 231                                 regulator-min-microvolt = <5000000>;
 232                                 regulator-max-microvolt = <5000000>;
 233                                 regulator-always-on;
 234                         };
 235                         vcc_25: LDO_REG5 {
 236                                 regulator-name = "LDO_REG5";
 237                                 regulator-min-microvolt = <2500000>;
 238                                 regulator-max-microvolt = <2500000>;
 239                                 regulator-always-on;
 240                         };
 241                         wifi_io: LDO_REG6 {
 242                                 regulator-name = "LDO_REG6";
 243                                 regulator-min-microvolt = <2500000>;
 244                                 regulator-max-microvolt = <2500000>;
 245                                 regulator-always-on;
 246                         };
 247                         vcc_28: LDO_REG7 {
 248                                 regulator-name = "LDO_REG7";
 249                                 regulator-min-microvolt = <2800000>;
 250                                 regulator-max-microvolt = <2800000>;
 251                                 regulator-always-on;
 252                         };
 253                         vcc_15: LDO_REG8 {
 254                                 regulator-name = "LDO_REG8";
 255                                 regulator-min-microvolt = <1500000>;
 256                                 regulator-max-microvolt = <1500000>;
 257                                 regulator-always-on;
 258                         };
 259                         vrtc_18: LDO_REG9 {
 260                                 regulator-name = "LDO_REG9";
 261                                 /* Despite the datasheet stating 3.3V
 262                                  * for REG9 and the driver expecting that,
 263                                  * REG9 outputs 1.8V.
 264                                  * Likely the CI20 uses a proprietary
 265                                  * factory programmed chip variant.
 266                                  * Since this is a simple on/off LDO the
 267                                  * exact values do not matter.
 268                                  */
 269                                 regulator-min-microvolt = <3300000>;
 270                                 regulator-max-microvolt = <3300000>;
 271                                 regulator-always-on;
 272                         };
 273                         vcc_11: LDO_REG10 {
 274                                 regulator-name = "LDO_REG10";
 275                                 regulator-min-microvolt = <1200000>;
 276                                 regulator-max-microvolt = <1200000>;
 277                                 regulator-always-on;
 278                         };
 279                 };
 280         };
 281 };
 282
 283 &i2c1 {
 284         status = "okay";
 285
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pins_i2c1>;
 288
 289 };
 290
 291 &i2c2 {
 292         status = "okay";
 293
 294         pinctrl-names = "default";
 295         pinctrl-0 = <&pins_i2c2>;
 296
 297 };
 298
 299 &i2c3 {
 300         status = "okay";
 301
 302         pinctrl-names = "default";
 303         pinctrl-0 = <&pins_i2c3>;
 304
 305 };
 306
 307 &i2c4 {
 308         status = "okay";
 309
 310         pinctrl-names = "default";
 311         pinctrl-0 = <&pins_i2c4>;
 312
 313         clock-frequency = <400000>;
 314
 315                 rtc@51 {
 316                         compatible = "nxp,pcf8563";
 317                         reg = <0x51>;
 318
 319                         interrupt-parent = <&gpf>;
 320                         interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
 321                 };
 322 };
 323
 324 &nemc {
 325         status = "okay";
 326
 327         nandc: nand-controller@1 {
 328                 compatible = "ingenic,jz4780-nand";
 329                 reg = <1 0 0x1000000>;
 330
 331                 #address-cells = <1>;
 332                 #size-cells = <0>;
 333
 334                 ingenic,bch-controller = <&bch>;
 335
 336                 ingenic,nemc-tAS = <10>;
 337                 ingenic,nemc-tAH = <5>;
 338                 ingenic,nemc-tBP = <10>;
 339                 ingenic,nemc-tAW = <15>;
 340                 ingenic,nemc-tSTRV = <100>;
 341
 342                 /*
 343                  * Only CLE/ALE are needed for the devices that are connected, rather
 344                  * than the full address line set.
 345                  */
 346                 pinctrl-names = "default";
 347                 pinctrl-0 = <&pins_nemc>;
 348
 349                 nand@1 {
 350                         reg = <1>;
 351
 352                         nand-ecc-step-size = <1024>;
 353                         nand-ecc-strength = <24>;
 354                         nand-ecc-mode = "hw";
 355                         nand-on-flash-bbt;
 356
 357                         pinctrl-names = "default";
 358                         pinctrl-0 = <&pins_nemc_cs1>;
 359
 360                         partitions {
 361                                 compatible = "fixed-partitions";
 362                                 #address-cells = <2>;
 363                                 #size-cells = <2>;
 364
 365                                 partition@0 {
 366                                         label = "u-boot-spl";
 367                                         reg = <0x0 0x0 0x0 0x800000>;
 368                                 };
 369
 370                                 partition@800000 {
 371                                         label = "u-boot";
 372                                         reg = <0x0 0x800000 0x0 0x200000>;
 373                                 };
 374
 375                                 partition@a00000 {
 376                                         label = "u-boot-env";
 377                                         reg = <0x0 0xa00000 0x0 0x200000>;
 378                                 };
 379
 380                                 partition@c00000 {
 381                                         label = "boot";
 382                                         reg = <0x0 0xc00000 0x0 0x4000000>;
 383                                 };
 384
 385                                 partition@4c00000 {
 386                                         label = "system";
 387                                         reg = <0x0 0x4c00000 0x1 0xfb400000>;
 388                                 };
 389                         };
 390                 };
 391         };
 392
 393         dm9000@6 {
 394                 compatible = "davicom,dm9000";
 395                 davicom,no-eeprom;
 396
 397                 pinctrl-names = "default";
 398                 pinctrl-0 = <&pins_nemc_cs6>;
 399
 400                 reg = <6 0 1   /* addr */
 401                        6 2 1>; /* data */
 402
 403                 ingenic,nemc-tAS = <15>;
 404                 ingenic,nemc-tAH = <10>;
 405                 ingenic,nemc-tBP = <20>;
 406                 ingenic,nemc-tAW = <50>;
 407                 ingenic,nemc-tSTRV = <100>;
 408
 409                 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
 410                 vcc-supply = <&eth0_power>;
 411
 412                 interrupt-parent = <&gpe>;
 413                 interrupts = <19 4>;
 414
 415                 nvmem-cells = <&eth0_addr>;
 416                 nvmem-cell-names = "mac-address";
 417         };
 418 };
 419
 420 &bch {
 421         status = "okay";
 422 };
 423
 424 &otg_phy {
 425         status = "okay";
 426
 427         vcc-supply = <&otg_power>;
 428 };
 429
 430 &otg {
 431         status = "okay";
 432 };
 433
 434 &pinctrl {
 435         pins_uart0: uart0 {
 436                 function = "uart0";
 437                 groups = "uart0-data";
 438                 bias-disable;
 439         };
 440
 441         pins_uart1: uart1 {
 442                 function = "uart1";
 443                 groups = "uart1-data";
 444                 bias-disable;
 445         };
 446
 447         pins_uart2: uart2 {
 448                 function = "uart2";
 449                 groups = "uart2-data", "uart2-hwflow";
 450                 bias-disable;
 451         };
 452
 453         pins_uart3: uart3 {
 454                 function = "uart3";
 455                 groups = "uart3-data", "uart3-hwflow";
 456                 bias-disable;
 457         };
 458
 459         pins_uart4: uart4 {
 460                 function = "uart4";
 461                 groups = "uart4-data";
 462                 bias-disable;
 463         };
 464
 465         pins_i2c0: i2c0 {
 466                 function = "i2c0";
 467                 groups = "i2c0-data";
 468                 bias-disable;
 469         };
 470
 471         pins_i2c1: i2c1 {
 472                 function = "i2c1";
 473                 groups = "i2c1-data";
 474                 bias-disable;
 475         };
 476
 477         pins_i2c2: i2c2 {
 478                 function = "i2c2";
 479                 groups = "i2c2-data";
 480                 bias-disable;
 481         };
 482
 483         pins_i2c3: i2c3 {
 484                 function = "i2c3";
 485                 groups = "i2c3-data";
 486                 bias-disable;
 487         };
 488
 489         pins_i2c4: i2c4 {
 490                 function = "i2c4";
 491                 groups = "i2c4-data-e";
 492                 bias-disable;
 493         };
 494
 495         pins_nemc: nemc {
 496                 function = "nemc";
 497                 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
 498                 bias-disable;
 499         };
 500
 501         pins_nemc_cs1: nemc-cs1 {
 502                 function = "nemc-cs1";
 503                 groups = "nemc-cs1";
 504                 bias-disable;
 505         };
 506
 507         pins_nemc_cs6: nemc-cs6 {
 508                 function = "nemc-cs6";
 509                 groups = "nemc-cs6";
 510                 bias-disable;
 511         };
 512
 513         pins_mmc0: mmc0 {
 514                 function = "mmc0";
 515                 groups = "mmc0-1bit-e", "mmc0-4bit-e";
 516                 bias-disable;
 517         };
 518
 519         pins_mmc1: mmc1 {
 520                 function = "mmc1";
 521                 groups = "mmc1-1bit-d", "mmc1-4bit-d";
 522                 bias-disable;
 523         };
 524 };
 525
 526 &tcu {
 527         /*
 528          * 750 kHz for the system timer and 3 MHz for the clocksource,
 529          * use channel #0 for the system timer, #1 for the clocksource.
 530          */
 531         assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
 532                                           <&tcu TCU_CLK_OST>;
 533         assigned-clock-rates = <750000>, <3000000>, <3000000>;
 534 };