arch/mips/boot/dts/ingenic/x1000.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/clock/ingenic,tcu.h>
   3 #include <dt-bindings/clock/x1000-cgu.h>
   4 #include <dt-bindings/dma/x1000-dma.h>
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         compatible = "ingenic,x1000", "ingenic,x1000e";
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu0: cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "ingenic,xburst-fpu1.0-mxu1.1";
  18                         reg = <0>;
  19
  20                         clocks = <&cgu X1000_CLK_CPU>;
  21                         clock-names = "cpu";
  22                 };
  23         };
  24
  25         cpuintc: interrupt-controller {
  26                 #address-cells = <0>;
  27                 #interrupt-cells = <1>;
  28                 interrupt-controller;
  29                 compatible = "mti,cpu-interrupt-controller";
  30         };
  31
  32         intc: interrupt-controller@10001000 {
  33                 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
  34                 reg = <0x10001000 0x50>;
  35
  36                 interrupt-controller;
  37                 #interrupt-cells = <1>;
  38
  39                 interrupt-parent = <&cpuintc>;
  40                 interrupts = <2>;
  41         };
  42
  43         exclk: ext {
  44                 compatible = "fixed-clock";
  45                 #clock-cells = <0>;
  46         };
  47
  48         rtclk: rtc {
  49                 compatible = "fixed-clock";
  50                 #clock-cells = <0>;
  51                 clock-frequency = <32768>;
  52         };
  53
  54         cgu: x1000-cgu@10000000 {
  55                 compatible = "ingenic,x1000-cgu", "simple-mfd";
  56                 reg = <0x10000000 0x100>;
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 ranges = <0x0 0x10000000 0x100>;
  60
  61                 #clock-cells = <1>;
  62
  63                 clocks = <&exclk>, <&rtclk>;
  64                 clock-names = "ext", "rtc";
  65
  66                 otg_phy: usb-phy@3c {
  67                         compatible = "ingenic,x1000-phy";
  68                         reg = <0x3c 0x10>;
  69
  70                         clocks = <&cgu X1000_CLK_OTGPHY>;
  71
  72                         #phy-cells = <0>;
  73
  74                         status = "disabled";
  75                 };
  76
  77                 rng: rng@d8 {
  78                         compatible = "ingenic,x1000-rng";
  79                         reg = <0xd8 0x8>;
  80
  81                         status = "disabled";
  82                 };
  83         };
  84
  85         ost: timer@12000000 {
  86                 compatible = "ingenic,x1000-ost";
  87                 reg = <0x12000000 0x3c>;
  88
  89                 #clock-cells = <1>;
  90
  91                 clocks = <&cgu X1000_CLK_OST>;
  92                 clock-names = "ost";
  93
  94                 interrupt-parent = <&cpuintc>;
  95                 interrupts = <3>;
  96         };
  97
  98         tcu: timer@10002000 {
  99                 compatible = "ingenic,x1000-tcu", "simple-mfd";
 100                 reg = <0x10002000 0x1000>;
 101                 #address-cells = <1>;
 102                 #size-cells = <1>;
 103                 ranges = <0x0 0x10002000 0x1000>;
 104
 105                 #clock-cells = <1>;
 106
 107                 clocks = <&cgu X1000_CLK_RTCLK>,
 108                          <&cgu X1000_CLK_EXCLK>,
 109                          <&cgu X1000_CLK_PCLK>;
 110                 clock-names = "rtc", "ext", "pclk";
 111
 112                 interrupt-controller;
 113                 #interrupt-cells = <1>;
 114
 115                 interrupt-parent = <&intc>;
 116                 interrupts = <27 26 25>;
 117
 118                 wdt: watchdog@0 {
 119                         compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
 120                         reg = <0x0 0x10>;
 121
 122                         clocks = <&tcu TCU_CLK_WDT>;
 123                         clock-names = "wdt";
 124                 };
 125         };
 126
 127         rtc: rtc@10003000 {
 128                 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
 129                 reg = <0x10003000 0x4c>;
 130
 131                 interrupt-parent = <&intc>;
 132                 interrupts = <32>;
 133
 134                 clocks = <&cgu X1000_CLK_RTCLK>;
 135                 clock-names = "rtc";
 136         };
 137
 138         pinctrl: pin-controller@10010000 {
 139                 compatible = "ingenic,x1000-pinctrl";
 140                 reg = <0x10010000 0x800>;
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143
 144                 gpa: gpio@0 {
 145                         compatible = "ingenic,x1000-gpio";
 146                         reg = <0>;
 147
 148                         gpio-controller;
 149                         gpio-ranges = <&pinctrl 0 0 32>;
 150                         #gpio-cells = <2>;
 151
 152                         interrupt-controller;
 153                         #interrupt-cells = <2>;
 154
 155                         interrupt-parent = <&intc>;
 156                         interrupts = <17>;
 157                 };
 158
 159                 gpb: gpio@1 {
 160                         compatible = "ingenic,x1000-gpio";
 161                         reg = <1>;
 162
 163                         gpio-controller;
 164                         gpio-ranges = <&pinctrl 0 32 32>;
 165                         #gpio-cells = <2>;
 166
 167                         interrupt-controller;
 168                         #interrupt-cells = <2>;
 169
 170                         interrupt-parent = <&intc>;
 171                         interrupts = <16>;
 172                 };
 173
 174                 gpc: gpio@2 {
 175                         compatible = "ingenic,x1000-gpio";
 176                         reg = <2>;
 177
 178                         gpio-controller;
 179                         gpio-ranges = <&pinctrl 0 64 32>;
 180                         #gpio-cells = <2>;
 181
 182                         interrupt-controller;
 183                         #interrupt-cells = <2>;
 184
 185                         interrupt-parent = <&intc>;
 186                         interrupts = <15>;
 187                 };
 188
 189                 gpd: gpio@3 {
 190                         compatible = "ingenic,x1000-gpio";
 191                         reg = <3>;
 192
 193                         gpio-controller;
 194                         gpio-ranges = <&pinctrl 0 96 32>;
 195                         #gpio-cells = <2>;
 196
 197                         interrupt-controller;
 198                         #interrupt-cells = <2>;
 199
 200                         interrupt-parent = <&intc>;
 201                         interrupts = <14>;
 202                 };
 203         };
 204
 205         uart0: serial@10030000 {
 206                 compatible = "ingenic,x1000-uart";
 207                 reg = <0x10030000 0x100>;
 208
 209                 interrupt-parent = <&intc>;
 210                 interrupts = <51>;
 211
 212                 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
 213                 clock-names = "baud", "module";
 214
 215                 status = "disabled";
 216         };
 217
 218         uart1: serial@10031000 {
 219                 compatible = "ingenic,x1000-uart";
 220                 reg = <0x10031000 0x100>;
 221
 222                 interrupt-parent = <&intc>;
 223                 interrupts = <50>;
 224
 225                 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
 226                 clock-names = "baud", "module";
 227
 228                 status = "disabled";
 229         };
 230
 231         uart2: serial@10032000 {
 232                 compatible = "ingenic,x1000-uart";
 233                 reg = <0x10032000 0x100>;
 234
 235                 interrupt-parent = <&intc>;
 236                 interrupts = <49>;
 237
 238                 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
 239                 clock-names = "baud", "module";
 240
 241                 status = "disabled";
 242         };
 243
 244         i2c0: i2c-controller@10050000 {
 245                 compatible = "ingenic,x1000-i2c";
 246                 reg = <0x10050000 0x1000>;
 247                 #address-cells = <1>;
 248                 #size-cells = <0>;
 249
 250                 interrupt-parent = <&intc>;
 251                 interrupts = <60>;
 252
 253                 clocks = <&cgu X1000_CLK_I2C0>;
 254
 255                 status = "disabled";
 256         };
 257
 258         i2c1: i2c-controller@10051000 {
 259                 compatible = "ingenic,x1000-i2c";
 260                 reg = <0x10051000 0x1000>;
 261                 #address-cells = <1>;
 262                 #size-cells = <0>;
 263
 264                 interrupt-parent = <&intc>;
 265                 interrupts = <59>;
 266
 267                 clocks = <&cgu X1000_CLK_I2C1>;
 268
 269                 status = "disabled";
 270         };
 271
 272         i2c2: i2c-controller@10052000 {
 273                 compatible = "ingenic,x1000-i2c";
 274                 reg = <0x10052000 0x1000>;
 275                 #address-cells = <1>;
 276                 #size-cells = <0>;
 277
 278                 interrupt-parent = <&intc>;
 279                 interrupts = <58>;
 280
 281                 clocks = <&cgu X1000_CLK_I2C2>;
 282
 283                 status = "disabled";
 284         };
 285
 286         pdma: dma-controller@13420000 {
 287                 compatible = "ingenic,x1000-dma";
 288                 reg = <0x13420000 0x400>, <0x13421000 0x40>;
 289                 #dma-cells = <2>;
 290
 291                 interrupt-parent = <&intc>;
 292                 interrupts = <10>;
 293
 294                 clocks = <&cgu X1000_CLK_PDMA>;
 295         };
 296
 297         msc0: mmc@13450000 {
 298                 compatible = "ingenic,x1000-mmc";
 299                 reg = <0x13450000 0x1000>;
 300
 301                 interrupt-parent = <&intc>;
 302                 interrupts = <37>;
 303
 304                 clocks = <&cgu X1000_CLK_MSC0>;
 305                 clock-names = "mmc";
 306
 307                 cap-sd-highspeed;
 308                 cap-mmc-highspeed;
 309                 cap-sdio-irq;
 310
 311                 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
 312                            <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
 313                 dma-names = "rx", "tx";
 314
 315                 status = "disabled";
 316         };
 317
 318         msc1: mmc@13460000 {
 319                 compatible = "ingenic,x1000-mmc";
 320                 reg = <0x13460000 0x1000>;
 321
 322                 interrupt-parent = <&intc>;
 323                 interrupts = <36>;
 324
 325                 clocks = <&cgu X1000_CLK_MSC1>;
 326                 clock-names = "mmc";
 327
 328                 cap-sd-highspeed;
 329                 cap-mmc-highspeed;
 330                 cap-sdio-irq;
 331
 332                 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
 333                            <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
 334                 dma-names = "rx", "tx";
 335
 336                 status = "disabled";
 337         };
 338
 339         mac: ethernet@134b0000 {
 340                 compatible = "ingenic,x1000-mac", "snps,dwmac";
 341                 reg = <0x134b0000 0x2000>;
 342
 343                 interrupt-parent = <&intc>;
 344                 interrupts = <55>;
 345                 interrupt-names = "macirq";
 346
 347                 clocks = <&cgu X1000_CLK_MAC>;
 348                 clock-names = "stmmaceth";
 349
 350                 status = "disabled";
 351
 352                 mdio: mdio {
 353                         compatible = "snps,dwmac-mdio";
 354                         #address-cells = <1>;
 355                         #size-cells = <0>;
 356
 357                         status = "disabled";
 358                 };
 359         };
 360
 361         otg: usb@13500000 {
 362                 compatible = "ingenic,x1000-otg", "snps,dwc2";
 363                 reg = <0x13500000 0x40000>;
 364
 365                 interrupt-parent = <&intc>;
 366                 interrupts = <21>;
 367
 368                 clocks = <&cgu X1000_CLK_OTG>;
 369                 clock-names = "otg";
 370
 371                 phys = <&otg_phy>;
 372                 phy-names = "usb2-phy";
 373
 374                 g-rx-fifo-size = <768>;
 375                 g-np-tx-fifo-size = <256>;
 376                 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
 377
 378                 status = "disabled";
 379         };
 380 };