arch/mips/loongson64/env.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Based on Ocelot Linux port, which is
   4  * Copyright 2001 MontaVista Software Inc.
   5  * Author: jsun@mvista.com or jsun@junsun.net
   6  *
   7  * Copyright 2003 ICT CAS
   8  * Author: Michael Guo <guoyi@ict.ac.cn>
   9  *
  10  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
  11  * Author: Fuxin Zhang, zhangfx@lemote.com
  12  *
  13  * Copyright (C) 2009 Lemote Inc.
  14  * Author: Wu Zhangjin, wuzhangjin@gmail.com
  15  */
  16 #include <linux/export.h>
  17 #include <linux/pci_ids.h>
  18 #include <asm/bootinfo.h>
  19 #include <loongson.h>
  20 #include <boot_param.h>
  21 #include <builtin_dtbs.h>
  22 #include <workarounds.h>
  23
  24 #define HOST_BRIDGE_CONFIG_ADDR ((void __iomem *)TO_UNCAC(0x1a000000))
  25
  26 u32 cpu_clock_freq;
  27 EXPORT_SYMBOL(cpu_clock_freq);
  28 struct efi_memory_map_loongson *loongson_memmap;
  29 struct loongson_system_configuration loongson_sysconf;
  30
  31 struct board_devices *eboard;
  32 struct interface_info *einter;
  33 struct loongson_special_attribute *especial;
  34
  35 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
  36 u64 loongson_chiptemp[MAX_PACKAGES];
  37 u64 loongson_freqctrl[MAX_PACKAGES];
  38
  39 unsigned long long smp_group[4];
  40
  41 const char *get_system_type(void)
  42 {
  43         return "Generic Loongson64 System";
  44 }
  45
  46 void __init prom_init_env(void)
  47 {
  48         struct boot_params *boot_p;
  49         struct loongson_params *loongson_p;
  50         struct system_loongson *esys;
  51         struct efi_cpuinfo_loongson *ecpu;
  52         struct irq_source_routing_table *eirq_source;
  53         u32 id;
  54         u16 vendor, device;
  55
  56         /* firmware arguments are initialized in head.S */
  57         boot_p = (struct boot_params *)fw_arg2;
  58         loongson_p = &(boot_p->efi.smbios.lp);
  59
  60         esys = (struct system_loongson *)
  61                 ((u64)loongson_p + loongson_p->system_offset);
  62         ecpu = (struct efi_cpuinfo_loongson *)
  63                 ((u64)loongson_p + loongson_p->cpu_offset);
  64         eboard = (struct board_devices *)
  65                 ((u64)loongson_p + loongson_p->boarddev_table_offset);
  66         einter = (struct interface_info *)
  67                 ((u64)loongson_p + loongson_p->interface_offset);
  68         especial = (struct loongson_special_attribute *)
  69                 ((u64)loongson_p + loongson_p->special_offset);
  70         eirq_source = (struct irq_source_routing_table *)
  71                 ((u64)loongson_p + loongson_p->irq_offset);
  72         loongson_memmap = (struct efi_memory_map_loongson *)
  73                 ((u64)loongson_p + loongson_p->memory_offset);
  74
  75         cpu_clock_freq = ecpu->cpu_clock_freq;
  76         loongson_sysconf.cputype = ecpu->cputype;
  77         switch (ecpu->cputype) {
  78         case Legacy_3A:
  79         case Loongson_3A:
  80                 loongson_sysconf.cores_per_node = 4;
  81                 loongson_sysconf.cores_per_package = 4;
  82                 smp_group[0] = 0x900000003ff01000;
  83                 smp_group[1] = 0x900010003ff01000;
  84                 smp_group[2] = 0x900020003ff01000;
  85                 smp_group[3] = 0x900030003ff01000;
  86                 loongson_chipcfg[0] = 0x900000001fe00180;
  87                 loongson_chipcfg[1] = 0x900010001fe00180;
  88                 loongson_chipcfg[2] = 0x900020001fe00180;
  89                 loongson_chipcfg[3] = 0x900030001fe00180;
  90                 loongson_chiptemp[0] = 0x900000001fe0019c;
  91                 loongson_chiptemp[1] = 0x900010001fe0019c;
  92                 loongson_chiptemp[2] = 0x900020001fe0019c;
  93                 loongson_chiptemp[3] = 0x900030001fe0019c;
  94                 loongson_freqctrl[0] = 0x900000001fe001d0;
  95                 loongson_freqctrl[1] = 0x900010001fe001d0;
  96                 loongson_freqctrl[2] = 0x900020001fe001d0;
  97                 loongson_freqctrl[3] = 0x900030001fe001d0;
  98                 loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
  99                 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
 100                 break;
 101         case Legacy_3B:
 102         case Loongson_3B:
 103                 loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
 104                 loongson_sysconf.cores_per_package = 8;
 105                 smp_group[0] = 0x900000003ff01000;
 106                 smp_group[1] = 0x900010003ff05000;
 107                 smp_group[2] = 0x900020003ff09000;
 108                 smp_group[3] = 0x900030003ff0d000;
 109                 loongson_chipcfg[0] = 0x900000001fe00180;
 110                 loongson_chipcfg[1] = 0x900020001fe00180;
 111                 loongson_chipcfg[2] = 0x900040001fe00180;
 112                 loongson_chipcfg[3] = 0x900060001fe00180;
 113                 loongson_chiptemp[0] = 0x900000001fe0019c;
 114                 loongson_chiptemp[1] = 0x900020001fe0019c;
 115                 loongson_chiptemp[2] = 0x900040001fe0019c;
 116                 loongson_chiptemp[3] = 0x900060001fe0019c;
 117                 loongson_freqctrl[0] = 0x900000001fe001d0;
 118                 loongson_freqctrl[1] = 0x900020001fe001d0;
 119                 loongson_freqctrl[2] = 0x900040001fe001d0;
 120                 loongson_freqctrl[3] = 0x900060001fe001d0;
 121                 loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
 122                 loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
 123                 break;
 124         default:
 125                 loongson_sysconf.cores_per_node = 1;
 126                 loongson_sysconf.cores_per_package = 1;
 127                 loongson_chipcfg[0] = 0x900000001fe00180;
 128         }
 129
 130         loongson_sysconf.nr_cpus = ecpu->nr_cpus;
 131         loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
 132         loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
 133         if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
 134                 loongson_sysconf.nr_cpus = NR_CPUS;
 135         loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
 136                 loongson_sysconf.cores_per_node - 1) /
 137                 loongson_sysconf.cores_per_node;
 138
 139         loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
 140         loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
 141         loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
 142         loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
 143         if (loongson_sysconf.dma_mask_bits < 32 ||
 144                 loongson_sysconf.dma_mask_bits > 64)
 145                 loongson_sysconf.dma_mask_bits = 32;
 146
 147         loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
 148         loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
 149         loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
 150
 151         loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
 152         pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
 153                 loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
 154                 loongson_sysconf.vgabios_addr);
 155
 156         memset(loongson_sysconf.ecname, 0, 32);
 157         if (esys->has_ec)
 158                 memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
 159         loongson_sysconf.workarounds |= esys->workarounds;
 160
 161         loongson_sysconf.nr_uarts = esys->nr_uarts;
 162         if (esys->nr_uarts < 1 || esys->nr_uarts > MAX_UARTS)
 163                 loongson_sysconf.nr_uarts = 1;
 164         memcpy(loongson_sysconf.uarts, esys->uarts,
 165                 sizeof(struct uart_device) * loongson_sysconf.nr_uarts);
 166
 167         loongson_sysconf.nr_sensors = esys->nr_sensors;
 168         if (loongson_sysconf.nr_sensors > MAX_SENSORS)
 169                 loongson_sysconf.nr_sensors = 0;
 170         if (loongson_sysconf.nr_sensors)
 171                 memcpy(loongson_sysconf.sensors, esys->sensors,
 172                         sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
 173         pr_info("CpuClock = %u\n", cpu_clock_freq);
 174
 175         /* Read the ID of PCI host bridge to detect bridge type */
 176         id = readl(HOST_BRIDGE_CONFIG_ADDR);
 177         vendor = id & 0xffff;
 178         device = (id >> 16) & 0xffff;
 179
 180         switch (vendor) {
 181         case PCI_VENDOR_ID_LOONGSON:
 182                 pr_info("The bridge chip is LS7A\n");
 183                 loongson_sysconf.bridgetype = LS7A;
 184                 loongson_sysconf.early_config = ls7a_early_config;
 185                 break;
 186         case PCI_VENDOR_ID_AMD:
 187         case PCI_VENDOR_ID_ATI:
 188                 pr_info("The bridge chip is RS780E or SR5690\n");
 189                 loongson_sysconf.bridgetype = RS780E;
 190                 loongson_sysconf.early_config = rs780e_early_config;
 191                 break;
 192         default:
 193                 pr_info("The bridge chip is VIRTUAL\n");
 194                 loongson_sysconf.bridgetype = VIRTUAL;
 195                 loongson_sysconf.early_config = virtual_early_config;
 196                 loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin;
 197                 break;
 198         }
 199
 200         if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
 201                 switch (read_c0_prid() & PRID_REV_MASK) {
 202                 case PRID_REV_LOONGSON3A_R1:
 203                 case PRID_REV_LOONGSON3A_R2_0:
 204                 case PRID_REV_LOONGSON3A_R2_1:
 205                 case PRID_REV_LOONGSON3A_R3_0:
 206                 case PRID_REV_LOONGSON3A_R3_1:
 207                         switch (loongson_sysconf.bridgetype) {
 208                         case LS7A:
 209                                 loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
 210                                 break;
 211                         case RS780E:
 212                                 loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
 213                                 break;
 214                         default:
 215                                 break;
 216                         }
 217                         break;
 218                 case PRID_REV_LOONGSON3B_R1:
 219                 case PRID_REV_LOONGSON3B_R2:
 220                         if (loongson_sysconf.bridgetype == RS780E)
 221                                 loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
 222                         break;
 223                 default:
 224                         break;
 225                 }
 226         } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
 227                 if (loongson_sysconf.bridgetype == LS7A)
 228                         loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
 229         }
 230
 231         if (!loongson_fdt_blob)
 232                 pr_err("Failed to determine built-in Loongson64 dtb\n");
 233 }