1 /* n2-drv.c: Niagara-2 RNG driver.
3 * Copyright (C) 2008, 2011 David S. Miller <davem@davemloft.net>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/workqueue.h>
13 #include <linux/preempt.h>
14 #include <linux/hw_random.h>
17 #include <linux/of_device.h>
19 #include <asm/hypervisor.h>
23 #define DRV_MODULE_NAME "n2rng"
24 #define PFX DRV_MODULE_NAME ": "
25 #define DRV_MODULE_VERSION "0.2"
26 #define DRV_MODULE_RELDATE "July 27, 2011"
28 static char version
[] =
29 DRV_MODULE_NAME
".c:v" DRV_MODULE_VERSION
" (" DRV_MODULE_RELDATE
")\n";
31 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
32 MODULE_DESCRIPTION("Niagara2 RNG driver");
33 MODULE_LICENSE("GPL");
34 MODULE_VERSION(DRV_MODULE_VERSION
);
36 /* The Niagara2 RNG provides a 64-bit read-only random number
37 * register, plus a control register. Access to the RNG is
38 * virtualized through the hypervisor so that both guests and control
39 * nodes can access the device.
41 * The entropy source consists of raw entropy sources, each
42 * constructed from a voltage controlled oscillator whose phase is
43 * jittered by thermal noise sources.
45 * The oscillator in each of the three raw entropy sources run at
46 * different frequencies. Normally, all three generator outputs are
47 * gathered, xored together, and fed into a CRC circuit, the output of
48 * which is the 64-bit read-only register.
50 * Some time is necessary for all the necessary entropy to build up
51 * such that a full 64-bits of entropy are available in the register.
52 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements
53 * an interlock which blocks register reads until sufficient entropy
56 * A control register is provided for adjusting various aspects of RNG
57 * operation, and to enable diagnostic modes. Each of the three raw
58 * entropy sources has an enable bit (RNG_CTL_ES{1,2,3}). Also
59 * provided are fields for controlling the minimum time in cycles
60 * between read accesses to the register (RNG_CTL_WAIT, this controls
61 * the interlock described in the previous paragraph).
63 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
64 * all three entropy sources enabled, and the interlock time set
67 * The CRC polynomial used by the chip is:
69 * P(X) = x64 + x61 + x57 + x56 + x52 + x51 + x50 + x48 + x47 + x46 +
70 * x43 + x42 + x41 + x39 + x38 + x37 + x35 + x32 + x28 + x25 +
71 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
73 * The RNG_CTL_VCO value of each noise cell must be programmed
74 * separately. This is why 4 control register values must be provided
75 * to the hypervisor. During a write, the hypervisor writes them all,
76 * one at a time, to the actual RNG_CTL register. The first three
77 * values are used to setup the desired RNG_CTL_VCO for each entropy
78 * source, for example:
80 * control 0: (1 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES1
81 * control 1: (2 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES2
82 * control 2: (3 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES3
84 * And then the fourth value sets the final chip state and enables
88 static int n2rng_hv_err_trans(unsigned long hv_err
)
109 static unsigned long n2rng_generic_read_control_v2(unsigned long ra
,
112 unsigned long hv_err
, state
, ticks
, watchdog_delta
, watchdog_status
;
113 int block
= 0, busy
= 0;
116 hv_err
= sun4v_rng_ctl_read_v2(ra
, unit
, &state
,
120 if (hv_err
== HV_EOK
)
123 if (hv_err
== HV_EBUSY
) {
124 if (++busy
>= N2RNG_BUSY_LIMIT
)
128 } else if (hv_err
== HV_EWOULDBLOCK
) {
129 if (++block
>= N2RNG_BLOCK_LIMIT
)
140 /* In multi-socket situations, the hypervisor might need to
141 * queue up the RNG control register write if it's for a unit
142 * that is on a cpu socket other than the one we are executing on.
144 * We poll here waiting for a successful read of that control
145 * register to make sure the write has been actually performed.
147 static unsigned long n2rng_control_settle_v2(struct n2rng
*np
, int unit
)
149 unsigned long ra
= __pa(&np
->scratch_control
[0]);
151 return n2rng_generic_read_control_v2(ra
, unit
);
154 static unsigned long n2rng_write_ctl_one(struct n2rng
*np
, int unit
,
156 unsigned long control_ra
,
157 unsigned long watchdog_timeout
,
158 unsigned long *ticks
)
160 unsigned long hv_err
;
162 if (np
->hvapi_major
== 1) {
163 hv_err
= sun4v_rng_ctl_write_v1(control_ra
, state
,
164 watchdog_timeout
, ticks
);
166 hv_err
= sun4v_rng_ctl_write_v2(control_ra
, state
,
167 watchdog_timeout
, unit
);
168 if (hv_err
== HV_EOK
)
169 hv_err
= n2rng_control_settle_v2(np
, unit
);
170 *ticks
= N2RNG_ACCUM_CYCLES_DEFAULT
;
176 static int n2rng_generic_read_data(unsigned long data_ra
)
178 unsigned long ticks
, hv_err
;
179 int block
= 0, hcheck
= 0;
182 hv_err
= sun4v_rng_data_read(data_ra
, &ticks
);
183 if (hv_err
== HV_EOK
)
186 if (hv_err
== HV_EWOULDBLOCK
) {
187 if (++block
>= N2RNG_BLOCK_LIMIT
)
190 } else if (hv_err
== HV_ENOACCESS
) {
192 } else if (hv_err
== HV_EIO
) {
193 if (++hcheck
>= N2RNG_HCHECK_LIMIT
)
201 static unsigned long n2rng_read_diag_data_one(struct n2rng
*np
,
203 unsigned long data_ra
,
204 unsigned long data_len
,
205 unsigned long *ticks
)
207 unsigned long hv_err
;
209 if (np
->hvapi_major
== 1) {
210 hv_err
= sun4v_rng_data_read_diag_v1(data_ra
, data_len
, ticks
);
212 hv_err
= sun4v_rng_data_read_diag_v2(data_ra
, data_len
,
215 *ticks
= N2RNG_ACCUM_CYCLES_DEFAULT
;
220 static int n2rng_generic_read_diag_data(struct n2rng
*np
,
222 unsigned long data_ra
,
223 unsigned long data_len
)
225 unsigned long ticks
, hv_err
;
229 hv_err
= n2rng_read_diag_data_one(np
, unit
,
232 if (hv_err
== HV_EOK
)
235 if (hv_err
== HV_EWOULDBLOCK
) {
236 if (++block
>= N2RNG_BLOCK_LIMIT
)
239 } else if (hv_err
== HV_ENOACCESS
) {
241 } else if (hv_err
== HV_EIO
) {
249 static int n2rng_generic_write_control(struct n2rng
*np
,
250 unsigned long control_ra
,
254 unsigned long hv_err
, ticks
;
255 int block
= 0, busy
= 0;
258 hv_err
= n2rng_write_ctl_one(np
, unit
, state
, control_ra
,
259 np
->wd_timeo
, &ticks
);
260 if (hv_err
== HV_EOK
)
263 if (hv_err
== HV_EWOULDBLOCK
) {
264 if (++block
>= N2RNG_BLOCK_LIMIT
)
267 } else if (hv_err
== HV_EBUSY
) {
268 if (++busy
>= N2RNG_BUSY_LIMIT
)
276 /* Just try to see if we can successfully access the control register
277 * of the RNG on the domain on which we are currently executing.
279 static int n2rng_try_read_ctl(struct n2rng
*np
)
281 unsigned long hv_err
;
284 if (np
->hvapi_major
== 1) {
285 hv_err
= sun4v_rng_get_diag_ctl();
287 /* We purposefully give invalid arguments, HV_NOACCESS
288 * is higher priority than the errors we'd get from
289 * these other cases, and that's the error we are
290 * truly interested in.
292 hv_err
= sun4v_rng_ctl_read_v2(0UL, ~0UL, &x
, &x
, &x
, &x
);
303 return n2rng_hv_err_trans(hv_err
);
306 #define CONTROL_DEFAULT_BASE \
307 ((2 << RNG_CTL_ASEL_SHIFT) | \
308 (N2RNG_ACCUM_CYCLES_DEFAULT << RNG_CTL_WAIT_SHIFT) | \
311 #define CONTROL_DEFAULT_0 \
312 (CONTROL_DEFAULT_BASE | \
313 (1 << RNG_CTL_VCO_SHIFT) | \
315 #define CONTROL_DEFAULT_1 \
316 (CONTROL_DEFAULT_BASE | \
317 (2 << RNG_CTL_VCO_SHIFT) | \
319 #define CONTROL_DEFAULT_2 \
320 (CONTROL_DEFAULT_BASE | \
321 (3 << RNG_CTL_VCO_SHIFT) | \
323 #define CONTROL_DEFAULT_3 \
324 (CONTROL_DEFAULT_BASE | \
325 RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3)
327 static void n2rng_control_swstate_init(struct n2rng
*np
)
331 np
->flags
|= N2RNG_FLAG_CONTROL
;
333 np
->health_check_sec
= N2RNG_HEALTH_CHECK_SEC_DEFAULT
;
334 np
->accum_cycles
= N2RNG_ACCUM_CYCLES_DEFAULT
;
335 np
->wd_timeo
= N2RNG_WD_TIMEO_DEFAULT
;
337 for (i
= 0; i
< np
->num_units
; i
++) {
338 struct n2rng_unit
*up
= &np
->units
[i
];
340 up
->control
[0] = CONTROL_DEFAULT_0
;
341 up
->control
[1] = CONTROL_DEFAULT_1
;
342 up
->control
[2] = CONTROL_DEFAULT_2
;
343 up
->control
[3] = CONTROL_DEFAULT_3
;
346 np
->hv_state
= HV_RNG_STATE_UNCONFIGURED
;
349 static int n2rng_grab_diag_control(struct n2rng
*np
)
351 int i
, busy_count
, err
= -ENODEV
;
354 for (i
= 0; i
< 100; i
++) {
355 err
= n2rng_try_read_ctl(np
);
359 if (++busy_count
> 100) {
360 dev_err(&np
->op
->dev
,
361 "Grab diag control timeout.\n");
371 static int n2rng_init_control(struct n2rng
*np
)
373 int err
= n2rng_grab_diag_control(np
);
375 /* Not in the control domain, that's OK we are only a consumer
376 * of the RNG data, we don't setup and program it.
383 n2rng_control_swstate_init(np
);
388 static int n2rng_data_read(struct hwrng
*rng
, u32
*data
)
390 struct n2rng
*np
= (struct n2rng
*) rng
->priv
;
391 unsigned long ra
= __pa(&np
->test_data
);
394 if (!(np
->flags
& N2RNG_FLAG_READY
)) {
396 } else if (np
->flags
& N2RNG_FLAG_BUFFER_VALID
) {
397 np
->flags
&= ~N2RNG_FLAG_BUFFER_VALID
;
401 int err
= n2rng_generic_read_data(ra
);
403 np
->buffer
= np
->test_data
>> 32;
404 *data
= np
->test_data
& 0xffffffff;
407 dev_err(&np
->op
->dev
, "RNG error, restesting\n");
408 np
->flags
&= ~N2RNG_FLAG_READY
;
409 if (!(np
->flags
& N2RNG_FLAG_SHUTDOWN
))
410 schedule_delayed_work(&np
->work
, 0);
418 /* On a guest node, just make sure we can read random data properly.
419 * If a control node reboots or reloads it's n2rng driver, this won't
420 * work during that time. So we have to keep probing until the device
423 static int n2rng_guest_check(struct n2rng
*np
)
425 unsigned long ra
= __pa(&np
->test_data
);
427 return n2rng_generic_read_data(ra
);
430 static int n2rng_entropy_diag_read(struct n2rng
*np
, unsigned long unit
,
431 u64
*pre_control
, u64 pre_state
,
432 u64
*buffer
, unsigned long buf_len
,
433 u64
*post_control
, u64 post_state
)
435 unsigned long post_ctl_ra
= __pa(post_control
);
436 unsigned long pre_ctl_ra
= __pa(pre_control
);
437 unsigned long buffer_ra
= __pa(buffer
);
440 err
= n2rng_generic_write_control(np
, pre_ctl_ra
, unit
, pre_state
);
444 err
= n2rng_generic_read_diag_data(np
, unit
,
447 (void) n2rng_generic_write_control(np
, post_ctl_ra
, unit
,
453 static u64
advance_polynomial(u64 poly
, u64 val
, int count
)
457 for (i
= 0; i
< count
; i
++) {
458 int highbit_set
= ((s64
)val
< 0);
468 static int n2rng_test_buffer_find(struct n2rng
*np
, u64 val
)
472 /* Purposefully skip over the first word. */
473 for (i
= 1; i
< SELFTEST_BUFFER_WORDS
; i
++) {
474 if (np
->test_buffer
[i
] == val
)
480 static void n2rng_dump_test_buffer(struct n2rng
*np
)
484 for (i
= 0; i
< SELFTEST_BUFFER_WORDS
; i
++)
485 dev_err(&np
->op
->dev
, "Test buffer slot %d [0x%016llx]\n",
486 i
, np
->test_buffer
[i
]);
489 static int n2rng_check_selftest_buffer(struct n2rng
*np
, unsigned long unit
)
491 u64 val
= SELFTEST_VAL
;
492 int err
, matches
, limit
;
495 for (limit
= 0; limit
< SELFTEST_LOOPS_MAX
; limit
++) {
496 matches
+= n2rng_test_buffer_find(np
, val
);
497 if (matches
>= SELFTEST_MATCH_GOAL
)
499 val
= advance_polynomial(SELFTEST_POLY
, val
, 1);
503 if (limit
>= SELFTEST_LOOPS_MAX
) {
505 dev_err(&np
->op
->dev
, "Selftest failed on unit %lu\n", unit
);
506 n2rng_dump_test_buffer(np
);
508 dev_info(&np
->op
->dev
, "Selftest passed on unit %lu\n", unit
);
513 static int n2rng_control_selftest(struct n2rng
*np
, unsigned long unit
)
517 np
->test_control
[0] = (0x2 << RNG_CTL_ASEL_SHIFT
);
518 np
->test_control
[1] = (0x2 << RNG_CTL_ASEL_SHIFT
);
519 np
->test_control
[2] = (0x2 << RNG_CTL_ASEL_SHIFT
);
520 np
->test_control
[3] = ((0x2 << RNG_CTL_ASEL_SHIFT
) |
522 ((SELFTEST_TICKS
- 2) << RNG_CTL_WAIT_SHIFT
));
525 err
= n2rng_entropy_diag_read(np
, unit
, np
->test_control
,
526 HV_RNG_STATE_HEALTHCHECK
,
528 sizeof(np
->test_buffer
),
529 &np
->units
[unit
].control
[0],
534 return n2rng_check_selftest_buffer(np
, unit
);
537 static int n2rng_control_check(struct n2rng
*np
)
541 for (i
= 0; i
< np
->num_units
; i
++) {
542 int err
= n2rng_control_selftest(np
, i
);
549 /* The sanity checks passed, install the final configuration into the
550 * chip, it's ready to use.
552 static int n2rng_control_configure_units(struct n2rng
*np
)
557 for (unit
= 0; unit
< np
->num_units
; unit
++) {
558 struct n2rng_unit
*up
= &np
->units
[unit
];
559 unsigned long ctl_ra
= __pa(&up
->control
[0]);
563 base
= ((np
->accum_cycles
<< RNG_CTL_WAIT_SHIFT
) |
564 (2 << RNG_CTL_ASEL_SHIFT
) |
567 /* XXX This isn't the best. We should fetch a bunch
568 * XXX of words using each entropy source combined XXX
569 * with each VCO setting, and see which combinations
570 * XXX give the best random data.
572 for (esrc
= 0; esrc
< 3; esrc
++)
573 up
->control
[esrc
] = base
|
574 (esrc
<< RNG_CTL_VCO_SHIFT
) |
575 (RNG_CTL_ES1
<< esrc
);
577 up
->control
[3] = base
|
578 (RNG_CTL_ES1
| RNG_CTL_ES2
| RNG_CTL_ES3
);
580 err
= n2rng_generic_write_control(np
, ctl_ra
, unit
,
581 HV_RNG_STATE_CONFIGURED
);
589 static void n2rng_work(struct work_struct
*work
)
591 struct n2rng
*np
= container_of(work
, struct n2rng
, work
.work
);
594 if (!(np
->flags
& N2RNG_FLAG_CONTROL
)) {
595 err
= n2rng_guest_check(np
);
598 err
= n2rng_control_check(np
);
602 err
= n2rng_control_configure_units(np
);
606 np
->flags
|= N2RNG_FLAG_READY
;
607 dev_info(&np
->op
->dev
, "RNG ready\n");
610 if (err
&& !(np
->flags
& N2RNG_FLAG_SHUTDOWN
))
611 schedule_delayed_work(&np
->work
, HZ
* 2);
614 static void n2rng_driver_version(void)
616 static int n2rng_version_printed
;
618 if (n2rng_version_printed
++ == 0)
619 pr_info("%s", version
);
622 static const struct of_device_id n2rng_match
[];
623 static int n2rng_probe(struct platform_device
*op
)
625 const struct of_device_id
*match
;
630 match
= of_match_device(n2rng_match
, &op
->dev
);
633 multi_capable
= (match
->data
!= NULL
);
635 n2rng_driver_version();
636 np
= kzalloc(sizeof(*np
), GFP_KERNEL
);
641 INIT_DELAYED_WORK(&np
->work
, n2rng_work
);
644 np
->flags
|= N2RNG_FLAG_MULTI
;
648 if (sun4v_hvapi_register(HV_GRP_RNG
,
652 if (sun4v_hvapi_register(HV_GRP_RNG
,
655 dev_err(&op
->dev
, "Cannot register suitable "
661 if (np
->flags
& N2RNG_FLAG_MULTI
) {
662 if (np
->hvapi_major
< 2) {
663 dev_err(&op
->dev
, "multi-unit-capable RNG requires "
664 "HVAPI major version 2 or later, got %lu\n",
666 goto out_hvapi_unregister
;
668 np
->num_units
= of_getintprop_default(op
->dev
.of_node
,
670 if (!np
->num_units
) {
671 dev_err(&op
->dev
, "VF RNG lacks rng-#units property\n");
672 goto out_hvapi_unregister
;
677 dev_info(&op
->dev
, "Registered RNG HVAPI major %lu minor %lu\n",
678 np
->hvapi_major
, np
->hvapi_minor
);
680 np
->units
= kzalloc(sizeof(struct n2rng_unit
) * np
->num_units
,
684 goto out_hvapi_unregister
;
686 err
= n2rng_init_control(np
);
690 dev_info(&op
->dev
, "Found %s RNG, units: %d\n",
691 ((np
->flags
& N2RNG_FLAG_MULTI
) ?
692 "multi-unit-capable" : "single-unit"),
695 np
->hwrng
.name
= "n2rng";
696 np
->hwrng
.data_read
= n2rng_data_read
;
697 np
->hwrng
.priv
= (unsigned long) np
;
699 err
= hwrng_register(&np
->hwrng
);
703 platform_set_drvdata(op
, np
);
705 schedule_delayed_work(&np
->work
, 0);
713 out_hvapi_unregister
:
714 sun4v_hvapi_unregister(HV_GRP_RNG
);
722 static int n2rng_remove(struct platform_device
*op
)
724 struct n2rng
*np
= platform_get_drvdata(op
);
726 np
->flags
|= N2RNG_FLAG_SHUTDOWN
;
728 cancel_delayed_work_sync(&np
->work
);
730 hwrng_unregister(&np
->hwrng
);
732 sun4v_hvapi_unregister(HV_GRP_RNG
);
742 static const struct of_device_id n2rng_match
[] = {
744 .name
= "random-number-generator",
745 .compatible
= "SUNW,n2-rng",
748 .name
= "random-number-generator",
749 .compatible
= "SUNW,vf-rng",
753 .name
= "random-number-generator",
754 .compatible
= "SUNW,kt-rng",
759 MODULE_DEVICE_TABLE(of
, n2rng_match
);
761 static struct platform_driver n2rng_driver
= {
764 .owner
= THIS_MODULE
,
765 .of_match_table
= n2rng_match
,
767 .probe
= n2rng_probe
,
768 .remove
= n2rng_remove
,
771 module_platform_driver(n2rng_driver
);