drivers/dma/sh/shdma-r8a73a4.c

   1 /*
   2  * Renesas SuperH DMA Engine support for r8a73a4 (APE6) SoCs
   3  *
   4  * Copyright (C) 2013 Renesas Electronics, Inc.
   5  *
   6  * This is free software; you can redistribute it and/or modify it under the
   7  * terms of version 2 the GNU General Public License as published by the Free
   8  * Software Foundation.
   9  */
  10 #include <linux/sh_dma.h>
  11
  12 #include "shdma-arm.h"
  13
  14 const unsigned int dma_ts_shift[] = SH_DMAE_TS_SHIFT;
  15
  16 static const struct sh_dmae_slave_config dma_slaves[] = {
  17         {
  18                 .chcr           = CHCR_TX(XMIT_SZ_32BIT),
  19                 .mid_rid        = 0xd1,         /* MMC0 Tx */
  20         }, {
  21                 .chcr           = CHCR_RX(XMIT_SZ_32BIT),
  22                 .mid_rid        = 0xd2,         /* MMC0 Rx */
  23         }, {
  24                 .chcr           = CHCR_TX(XMIT_SZ_32BIT),
  25                 .mid_rid        = 0xe1,         /* MMC1 Tx */
  26         }, {
  27                 .chcr           = CHCR_RX(XMIT_SZ_32BIT),
  28                 .mid_rid        = 0xe2,         /* MMC1 Rx */
  29         },
  30 };
  31
  32 #define DMAE_CHANNEL(a, b)                              \
  33         {                                               \
  34                 .offset         = (a) - 0x20,           \
  35                 .dmars          = (a) - 0x20 + 0x40,    \
  36                 .chclr_bit      = (b),                  \
  37                 .chclr_offset   = 0x80 - 0x20,          \
  38         }
  39
  40 static const struct sh_dmae_channel dma_channels[] = {
  41         DMAE_CHANNEL(0x8000, 0),
  42         DMAE_CHANNEL(0x8080, 1),
  43         DMAE_CHANNEL(0x8100, 2),
  44         DMAE_CHANNEL(0x8180, 3),
  45         DMAE_CHANNEL(0x8200, 4),
  46         DMAE_CHANNEL(0x8280, 5),
  47         DMAE_CHANNEL(0x8300, 6),
  48         DMAE_CHANNEL(0x8380, 7),
  49         DMAE_CHANNEL(0x8400, 8),
  50         DMAE_CHANNEL(0x8480, 9),
  51         DMAE_CHANNEL(0x8500, 10),
  52         DMAE_CHANNEL(0x8580, 11),
  53         DMAE_CHANNEL(0x8600, 12),
  54         DMAE_CHANNEL(0x8680, 13),
  55         DMAE_CHANNEL(0x8700, 14),
  56         DMAE_CHANNEL(0x8780, 15),
  57         DMAE_CHANNEL(0x8800, 16),
  58         DMAE_CHANNEL(0x8880, 17),
  59         DMAE_CHANNEL(0x8900, 18),
  60         DMAE_CHANNEL(0x8980, 19),
  61 };
  62
  63 const struct sh_dmae_pdata r8a73a4_dma_pdata = {
  64         .slave          = dma_slaves,
  65         .slave_num      = ARRAY_SIZE(dma_slaves),
  66         .channel        = dma_channels,
  67         .channel_num    = ARRAY_SIZE(dma_channels),
  68         .ts_low_shift   = TS_LOW_SHIFT,
  69         .ts_low_mask    = TS_LOW_BIT << TS_LOW_SHIFT,
  70         .ts_high_shift  = TS_HI_SHIFT,
  71         .ts_high_mask   = TS_HI_BIT << TS_HI_SHIFT,
  72         .ts_shift       = dma_ts_shift,
  73         .ts_shift_num   = ARRAY_SIZE(dma_ts_shift),
  74         .dmaor_init     = DMAOR_DME,
  75         .chclr_present  = 1,
  76         .chclr_bitwise  = 1,
  77 };