drivers/gpu/drm/gma500/mdfld_tpo_vid.c

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  * jim liu <jim.liu@intel.com>
  25  * Jackie Li<yaodong.li@intel.com>
  26  */
  27
  28 #include "mdfld_dsi_dpi.h"
  29
  30 static struct drm_display_mode *tpo_vid_get_config_mode(struct drm_device *dev)
  31 {
  32         struct drm_display_mode *mode;
  33         struct drm_psb_private *dev_priv = dev->dev_private;
  34         struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
  35         bool use_gct = false;
  36
  37         mode = kzalloc(sizeof(*mode), GFP_KERNEL);
  38         if (!mode)
  39                 return NULL;
  40
  41         if (use_gct) {
  42                 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
  43                 mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
  44                 mode->hsync_start = mode->hdisplay +
  45                                 ((ti->hsync_offset_hi << 8) |
  46                                 ti->hsync_offset_lo);
  47                 mode->hsync_end = mode->hsync_start +
  48                                 ((ti->hsync_pulse_width_hi << 8) |
  49                                 ti->hsync_pulse_width_lo);
  50                 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) |
  51                                                                 ti->hblank_lo);
  52                 mode->vsync_start =
  53                         mode->vdisplay + ((ti->vsync_offset_hi << 8) |
  54                                                 ti->vsync_offset_lo);
  55                 mode->vsync_end =
  56                         mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) |
  57                                                 ti->vsync_pulse_width_lo);
  58                 mode->vtotal = mode->vdisplay +
  59                                 ((ti->vblank_hi << 8) | ti->vblank_lo);
  60                 mode->clock = ti->pixel_clock * 10;
  61
  62                 dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay);
  63                 dev_dbg(dev->dev, "vdisplay is %d\n", mode->vdisplay);
  64                 dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start);
  65                 dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end);
  66                 dev_dbg(dev->dev, "htotal is %d\n", mode->htotal);
  67                 dev_dbg(dev->dev, "VSS is %d\n", mode->vsync_start);
  68                 dev_dbg(dev->dev, "VSE is %d\n", mode->vsync_end);
  69                 dev_dbg(dev->dev, "vtotal is %d\n", mode->vtotal);
  70                 dev_dbg(dev->dev, "clock is %d\n", mode->clock);
  71         } else {
  72                 mode->hdisplay = 864;
  73                 mode->vdisplay = 480;
  74                 mode->hsync_start = 873;
  75                 mode->hsync_end = 876;
  76                 mode->htotal = 887;
  77                 mode->vsync_start = 487;
  78                 mode->vsync_end = 490;
  79                 mode->vtotal = 499;
  80                 mode->clock = 33264;
  81         }
  82
  83         drm_mode_set_name(mode);
  84         drm_mode_set_crtcinfo(mode, 0);
  85
  86         mode->type |= DRM_MODE_TYPE_PREFERRED;
  87
  88         return mode;
  89 }
  90
  91 static int tpo_vid_get_panel_info(struct drm_device *dev,
  92                                 int pipe,
  93                                 struct panel_info *pi)
  94 {
  95         if (!dev || !pi)
  96                 return -EINVAL;
  97
  98         pi->width_mm = TPO_PANEL_WIDTH;
  99         pi->height_mm = TPO_PANEL_HEIGHT;
 100
 101         return 0;
 102 }
 103
 104 /*TPO DPI encoder helper funcs*/
 105 static const struct drm_encoder_helper_funcs
 106                                 mdfld_tpo_dpi_encoder_helper_funcs = {
 107         .dpms = mdfld_dsi_dpi_dpms,
 108         .mode_fixup = mdfld_dsi_dpi_mode_fixup,
 109         .prepare = mdfld_dsi_dpi_prepare,
 110         .mode_set = mdfld_dsi_dpi_mode_set,
 111         .commit = mdfld_dsi_dpi_commit,
 112 };
 113
 114 /*TPO DPI encoder funcs*/
 115 static const struct drm_encoder_funcs mdfld_tpo_dpi_encoder_funcs = {
 116         .destroy = drm_encoder_cleanup,
 117 };
 118
 119 const struct panel_funcs mdfld_tpo_vid_funcs = {
 120         .encoder_funcs = &mdfld_tpo_dpi_encoder_funcs,
 121         .encoder_helper_funcs = &mdfld_tpo_dpi_encoder_helper_funcs,
 122         .get_config_mode = &tpo_vid_get_config_mode,
 123         .get_panel_info = tpo_vid_get_panel_info,
 124 };