drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  56 {
  57         return container_of(encoder, struct intel_crt, base);
  58 }
  59
  60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  61 {
  62         return intel_encoder_to_crt(intel_attached_encoder(connector));
  63 }
  64
  65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66                                    enum pipe *pipe)
  67 {
  68         struct drm_device *dev = encoder->base.dev;
  69         struct drm_i915_private *dev_priv = dev->dev_private;
  70         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71         u32 tmp;
  72
  73         tmp = I915_READ(crt->adpa_reg);
  74
  75         if (!(tmp & ADPA_DAC_ENABLE))
  76                 return false;
  77
  78         if (HAS_PCH_CPT(dev))
  79                 *pipe = PORT_TO_PIPE_CPT(tmp);
  80         else
  81                 *pipe = PORT_TO_PIPE(tmp);
  82
  83         return true;
  84 }
  85
  86 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  87 {
  88         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  89         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  90         u32 tmp, flags = 0;
  91
  92         tmp = I915_READ(crt->adpa_reg);
  93
  94         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
  95                 flags |= DRM_MODE_FLAG_PHSYNC;
  96         else
  97                 flags |= DRM_MODE_FLAG_NHSYNC;
  98
  99         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 100                 flags |= DRM_MODE_FLAG_PVSYNC;
 101         else
 102                 flags |= DRM_MODE_FLAG_NVSYNC;
 103
 104         return flags;
 105 }
 106
 107 static void intel_crt_get_config(struct intel_encoder *encoder,
 108                                  struct intel_crtc_config *pipe_config)
 109 {
 110         struct drm_device *dev = encoder->base.dev;
 111         int dotclock;
 112
 113         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 114
 115         dotclock = pipe_config->port_clock;
 116
 117         if (HAS_PCH_SPLIT(dev))
 118                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 119
 120         pipe_config->adjusted_mode.crtc_clock = dotclock;
 121 }
 122
 123 static void hsw_crt_get_config(struct intel_encoder *encoder,
 124                                struct intel_crtc_config *pipe_config)
 125 {
 126         intel_ddi_get_config(encoder, pipe_config);
 127
 128         pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 129                                               DRM_MODE_FLAG_NHSYNC |
 130                                               DRM_MODE_FLAG_PVSYNC |
 131                                               DRM_MODE_FLAG_NVSYNC);
 132         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 133 }
 134
 135 /* Note: The caller is required to filter out dpms modes not supported by the
 136  * platform. */
 137 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 138 {
 139         struct drm_device *dev = encoder->base.dev;
 140         struct drm_i915_private *dev_priv = dev->dev_private;
 141         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 142         u32 temp;
 143
 144         temp = I915_READ(crt->adpa_reg);
 145         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 146         temp &= ~ADPA_DAC_ENABLE;
 147
 148         switch (mode) {
 149         case DRM_MODE_DPMS_ON:
 150                 temp |= ADPA_DAC_ENABLE;
 151                 break;
 152         case DRM_MODE_DPMS_STANDBY:
 153                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 154                 break;
 155         case DRM_MODE_DPMS_SUSPEND:
 156                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 157                 break;
 158         case DRM_MODE_DPMS_OFF:
 159                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 160                 break;
 161         }
 162
 163         I915_WRITE(crt->adpa_reg, temp);
 164 }
 165
 166 static void intel_disable_crt(struct intel_encoder *encoder)
 167 {
 168         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 169 }
 170
 171 static void intel_enable_crt(struct intel_encoder *encoder)
 172 {
 173         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 174
 175         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 176 }
 177
 178 /* Special dpms function to support cloning between dvo/sdvo/crt. */
 179 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 180 {
 181         struct drm_device *dev = connector->dev;
 182         struct intel_encoder *encoder = intel_attached_encoder(connector);
 183         struct drm_crtc *crtc;
 184         int old_dpms;
 185
 186         /* PCH platforms and VLV only support on/off. */
 187         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 188                 mode = DRM_MODE_DPMS_OFF;
 189
 190         if (mode == connector->dpms)
 191                 return;
 192
 193         old_dpms = connector->dpms;
 194         connector->dpms = mode;
 195
 196         /* Only need to change hw state when actually enabled */
 197         crtc = encoder->base.crtc;
 198         if (!crtc) {
 199                 encoder->connectors_active = false;
 200                 return;
 201         }
 202
 203         /* We need the pipe to run for anything but OFF. */
 204         if (mode == DRM_MODE_DPMS_OFF)
 205                 encoder->connectors_active = false;
 206         else
 207                 encoder->connectors_active = true;
 208
 209         /* We call connector dpms manually below in case pipe dpms doesn't
 210          * change due to cloning. */
 211         if (mode < old_dpms) {
 212                 /* From off to on, enable the pipe first. */
 213                 intel_crtc_update_dpms(crtc);
 214
 215                 intel_crt_set_dpms(encoder, mode);
 216         } else {
 217                 intel_crt_set_dpms(encoder, mode);
 218
 219                 intel_crtc_update_dpms(crtc);
 220         }
 221
 222         intel_modeset_check_state(connector->dev);
 223 }
 224
 225 static enum drm_mode_status
 226 intel_crt_mode_valid(struct drm_connector *connector,
 227                      struct drm_display_mode *mode)
 228 {
 229         struct drm_device *dev = connector->dev;
 230
 231         int max_clock = 0;
 232         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 233                 return MODE_NO_DBLESCAN;
 234
 235         if (mode->clock < 25000)
 236                 return MODE_CLOCK_LOW;
 237
 238         if (IS_GEN2(dev))
 239                 max_clock = 350000;
 240         else
 241                 max_clock = 400000;
 242         if (mode->clock > max_clock)
 243                 return MODE_CLOCK_HIGH;
 244
 245         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 246         if (HAS_PCH_LPT(dev) &&
 247             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 248                 return MODE_CLOCK_HIGH;
 249
 250         return MODE_OK;
 251 }
 252
 253 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 254                                      struct intel_crtc_config *pipe_config)
 255 {
 256         struct drm_device *dev = encoder->base.dev;
 257
 258         if (HAS_PCH_SPLIT(dev))
 259                 pipe_config->has_pch_encoder = true;
 260
 261         /* LPT FDI RX only supports 8bpc. */
 262         if (HAS_PCH_LPT(dev))
 263                 pipe_config->pipe_bpp = 24;
 264
 265         return true;
 266 }
 267
 268 static void intel_crt_mode_set(struct intel_encoder *encoder)
 269 {
 270
 271         struct drm_device *dev = encoder->base.dev;
 272         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 273         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 274         struct drm_i915_private *dev_priv = dev->dev_private;
 275         struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
 276         u32 adpa;
 277
 278         if (INTEL_INFO(dev)->gen >= 5)
 279                 adpa = ADPA_HOTPLUG_BITS;
 280         else
 281                 adpa = 0;
 282
 283         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 284                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 285         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 286                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 287
 288         /* For CPT allow 3 pipe config, for others just use A or B */
 289         if (HAS_PCH_LPT(dev))
 290                 ; /* Those bits don't exist here */
 291         else if (HAS_PCH_CPT(dev))
 292                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 293         else if (crtc->pipe == 0)
 294                 adpa |= ADPA_PIPE_A_SELECT;
 295         else
 296                 adpa |= ADPA_PIPE_B_SELECT;
 297
 298         if (!HAS_PCH_SPLIT(dev))
 299                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 300
 301         I915_WRITE(crt->adpa_reg, adpa);
 302 }
 303
 304 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 305 {
 306         struct drm_device *dev = connector->dev;
 307         struct intel_crt *crt = intel_attached_crt(connector);
 308         struct drm_i915_private *dev_priv = dev->dev_private;
 309         u32 adpa;
 310         bool ret;
 311
 312         /* The first time through, trigger an explicit detection cycle */
 313         if (crt->force_hotplug_required) {
 314                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 315                 u32 save_adpa;
 316
 317                 crt->force_hotplug_required = 0;
 318
 319                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 320                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 321
 322                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 323                 if (turn_off_dac)
 324                         adpa &= ~ADPA_DAC_ENABLE;
 325
 326                 I915_WRITE(crt->adpa_reg, adpa);
 327
 328                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 329                              1000))
 330                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 331
 332                 if (turn_off_dac) {
 333                         I915_WRITE(crt->adpa_reg, save_adpa);
 334                         POSTING_READ(crt->adpa_reg);
 335                 }
 336         }
 337
 338         /* Check the status to see if both blue and green are on now */
 339         adpa = I915_READ(crt->adpa_reg);
 340         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 341                 ret = true;
 342         else
 343                 ret = false;
 344         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 345
 346         return ret;
 347 }
 348
 349 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 350 {
 351         struct drm_device *dev = connector->dev;
 352         struct intel_crt *crt = intel_attached_crt(connector);
 353         struct drm_i915_private *dev_priv = dev->dev_private;
 354         u32 adpa;
 355         bool ret;
 356         u32 save_adpa;
 357
 358         save_adpa = adpa = I915_READ(crt->adpa_reg);
 359         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 360
 361         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 362
 363         I915_WRITE(crt->adpa_reg, adpa);
 364
 365         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 366                      1000)) {
 367                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 368                 I915_WRITE(crt->adpa_reg, save_adpa);
 369         }
 370
 371         /* Check the status to see if both blue and green are on now */
 372         adpa = I915_READ(crt->adpa_reg);
 373         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 374                 ret = true;
 375         else
 376                 ret = false;
 377
 378         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 379
 380         return ret;
 381 }
 382
 383 /**
 384  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 385  *
 386  * Not for i915G/i915GM
 387  *
 388  * \return true if CRT is connected.
 389  * \return false if CRT is disconnected.
 390  */
 391 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 392 {
 393         struct drm_device *dev = connector->dev;
 394         struct drm_i915_private *dev_priv = dev->dev_private;
 395         u32 hotplug_en, orig, stat;
 396         bool ret = false;
 397         int i, tries = 0;
 398
 399         if (HAS_PCH_SPLIT(dev))
 400                 return intel_ironlake_crt_detect_hotplug(connector);
 401
 402         if (IS_VALLEYVIEW(dev))
 403                 return valleyview_crt_detect_hotplug(connector);
 404
 405         /*
 406          * On 4 series desktop, CRT detect sequence need to be done twice
 407          * to get a reliable result.
 408          */
 409
 410         if (IS_G4X(dev) && !IS_GM45(dev))
 411                 tries = 2;
 412         else
 413                 tries = 1;
 414         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 415         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 416
 417         for (i = 0; i < tries ; i++) {
 418                 /* turn on the FORCE_DETECT */
 419                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 420                 /* wait for FORCE_DETECT to go off */
 421                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 422                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 423                              1000))
 424                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 425         }
 426
 427         stat = I915_READ(PORT_HOTPLUG_STAT);
 428         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 429                 ret = true;
 430
 431         /* clear the interrupt we just generated, if any */
 432         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 433
 434         /* and put the bits back */
 435         I915_WRITE(PORT_HOTPLUG_EN, orig);
 436
 437         return ret;
 438 }
 439
 440 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 441                                 struct i2c_adapter *i2c)
 442 {
 443         struct edid *edid;
 444
 445         edid = drm_get_edid(connector, i2c);
 446
 447         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 448                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 449                 intel_gmbus_force_bit(i2c, true);
 450                 edid = drm_get_edid(connector, i2c);
 451                 intel_gmbus_force_bit(i2c, false);
 452         }
 453
 454         return edid;
 455 }
 456
 457 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 458 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 459                                 struct i2c_adapter *adapter)
 460 {
 461         struct edid *edid;
 462         int ret;
 463
 464         edid = intel_crt_get_edid(connector, adapter);
 465         if (!edid)
 466                 return 0;
 467
 468         ret = intel_connector_update_modes(connector, edid);
 469         kfree(edid);
 470
 471         return ret;
 472 }
 473
 474 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 475 {
 476         struct intel_crt *crt = intel_attached_crt(connector);
 477         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 478         struct edid *edid;
 479         struct i2c_adapter *i2c;
 480
 481         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 482
 483         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 484         edid = intel_crt_get_edid(connector, i2c);
 485
 486         if (edid) {
 487                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 488
 489                 /*
 490                  * This may be a DVI-I connector with a shared DDC
 491                  * link between analog and digital outputs, so we
 492                  * have to check the EDID input spec of the attached device.
 493                  */
 494                 if (!is_digital) {
 495                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 496                         return true;
 497                 }
 498
 499                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 500         } else {
 501                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 502         }
 503
 504         kfree(edid);
 505
 506         return false;
 507 }
 508
 509 static enum drm_connector_status
 510 intel_crt_load_detect(struct intel_crt *crt)
 511 {
 512         struct drm_device *dev = crt->base.base.dev;
 513         struct drm_i915_private *dev_priv = dev->dev_private;
 514         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 515         uint32_t save_bclrpat;
 516         uint32_t save_vtotal;
 517         uint32_t vtotal, vactive;
 518         uint32_t vsample;
 519         uint32_t vblank, vblank_start, vblank_end;
 520         uint32_t dsl;
 521         uint32_t bclrpat_reg;
 522         uint32_t vtotal_reg;
 523         uint32_t vblank_reg;
 524         uint32_t vsync_reg;
 525         uint32_t pipeconf_reg;
 526         uint32_t pipe_dsl_reg;
 527         uint8_t st00;
 528         enum drm_connector_status status;
 529
 530         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 531
 532         bclrpat_reg = BCLRPAT(pipe);
 533         vtotal_reg = VTOTAL(pipe);
 534         vblank_reg = VBLANK(pipe);
 535         vsync_reg = VSYNC(pipe);
 536         pipeconf_reg = PIPECONF(pipe);
 537         pipe_dsl_reg = PIPEDSL(pipe);
 538
 539         save_bclrpat = I915_READ(bclrpat_reg);
 540         save_vtotal = I915_READ(vtotal_reg);
 541         vblank = I915_READ(vblank_reg);
 542
 543         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 544         vactive = (save_vtotal & 0x7ff) + 1;
 545
 546         vblank_start = (vblank & 0xfff) + 1;
 547         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 548
 549         /* Set the border color to purple. */
 550         I915_WRITE(bclrpat_reg, 0x500050);
 551
 552         if (!IS_GEN2(dev)) {
 553                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 554                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 555                 POSTING_READ(pipeconf_reg);
 556                 /* Wait for next Vblank to substitue
 557                  * border color for Color info */
 558                 intel_wait_for_vblank(dev, pipe);
 559                 st00 = I915_READ8(VGA_MSR_WRITE);
 560                 status = ((st00 & (1 << 4)) != 0) ?
 561                         connector_status_connected :
 562                         connector_status_disconnected;
 563
 564                 I915_WRITE(pipeconf_reg, pipeconf);
 565         } else {
 566                 bool restore_vblank = false;
 567                 int count, detect;
 568
 569                 /*
 570                 * If there isn't any border, add some.
 571                 * Yes, this will flicker
 572                 */
 573                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 574                         uint32_t vsync = I915_READ(vsync_reg);
 575                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 576
 577                         vblank_start = vsync_start;
 578                         I915_WRITE(vblank_reg,
 579                                    (vblank_start - 1) |
 580                                    ((vblank_end - 1) << 16));
 581                         restore_vblank = true;
 582                 }
 583                 /* sample in the vertical border, selecting the larger one */
 584                 if (vblank_start - vactive >= vtotal - vblank_end)
 585                         vsample = (vblank_start + vactive) >> 1;
 586                 else
 587                         vsample = (vtotal + vblank_end) >> 1;
 588
 589                 /*
 590                  * Wait for the border to be displayed
 591                  */
 592                 while (I915_READ(pipe_dsl_reg) >= vactive)
 593                         ;
 594                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 595                         ;
 596                 /*
 597                  * Watch ST00 for an entire scanline
 598                  */
 599                 detect = 0;
 600                 count = 0;
 601                 do {
 602                         count++;
 603                         /* Read the ST00 VGA status register */
 604                         st00 = I915_READ8(VGA_MSR_WRITE);
 605                         if (st00 & (1 << 4))
 606                                 detect++;
 607                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 608
 609                 /* restore vblank if necessary */
 610                 if (restore_vblank)
 611                         I915_WRITE(vblank_reg, vblank);
 612                 /*
 613                  * If more than 3/4 of the scanline detected a monitor,
 614                  * then it is assumed to be present. This works even on i830,
 615                  * where there isn't any way to force the border color across
 616                  * the screen
 617                  */
 618                 status = detect * 4 > count * 3 ?
 619                          connector_status_connected :
 620                          connector_status_disconnected;
 621         }
 622
 623         /* Restore previous settings */
 624         I915_WRITE(bclrpat_reg, save_bclrpat);
 625
 626         return status;
 627 }
 628
 629 static enum drm_connector_status
 630 intel_crt_detect(struct drm_connector *connector, bool force)
 631 {
 632         struct drm_device *dev = connector->dev;
 633         struct intel_crt *crt = intel_attached_crt(connector);
 634         enum drm_connector_status status;
 635         struct intel_load_detect_pipe tmp;
 636
 637         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 638                       connector->base.id, drm_get_connector_name(connector),
 639                       force);
 640
 641         if (I915_HAS_HOTPLUG(dev)) {
 642                 /* We can not rely on the HPD pin always being correctly wired
 643                  * up, for example many KVM do not pass it through, and so
 644                  * only trust an assertion that the monitor is connected.
 645                  */
 646                 if (intel_crt_detect_hotplug(connector)) {
 647                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 648                         return connector_status_connected;
 649                 } else
 650                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 651         }
 652
 653         if (intel_crt_detect_ddc(connector))
 654                 return connector_status_connected;
 655
 656         /* Load detection is broken on HPD capable machines. Whoever wants a
 657          * broken monitor (without edid) to work behind a broken kvm (that fails
 658          * to have the right resistors for HP detection) needs to fix this up.
 659          * For now just bail out. */
 660         if (I915_HAS_HOTPLUG(dev))
 661                 return connector_status_disconnected;
 662
 663         if (!force)
 664                 return connector->status;
 665
 666         /* for pre-945g platforms use load detect */
 667         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 668                 if (intel_crt_detect_ddc(connector))
 669                         status = connector_status_connected;
 670                 else
 671                         status = intel_crt_load_detect(crt);
 672                 intel_release_load_detect_pipe(connector, &tmp);
 673         } else
 674                 status = connector_status_unknown;
 675
 676         return status;
 677 }
 678
 679 static void intel_crt_destroy(struct drm_connector *connector)
 680 {
 681         drm_connector_cleanup(connector);
 682         kfree(connector);
 683 }
 684
 685 static int intel_crt_get_modes(struct drm_connector *connector)
 686 {
 687         struct drm_device *dev = connector->dev;
 688         struct drm_i915_private *dev_priv = dev->dev_private;
 689         int ret;
 690         struct i2c_adapter *i2c;
 691
 692         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 693         ret = intel_crt_ddc_get_modes(connector, i2c);
 694         if (ret || !IS_G4X(dev))
 695                 return ret;
 696
 697         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 698         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 699         return intel_crt_ddc_get_modes(connector, i2c);
 700 }
 701
 702 static int intel_crt_set_property(struct drm_connector *connector,
 703                                   struct drm_property *property,
 704                                   uint64_t value)
 705 {
 706         return 0;
 707 }
 708
 709 static void intel_crt_reset(struct drm_connector *connector)
 710 {
 711         struct drm_device *dev = connector->dev;
 712         struct drm_i915_private *dev_priv = dev->dev_private;
 713         struct intel_crt *crt = intel_attached_crt(connector);
 714
 715         if (INTEL_INFO(dev)->gen >= 5) {
 716                 u32 adpa;
 717
 718                 adpa = I915_READ(crt->adpa_reg);
 719                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 720                 adpa |= ADPA_HOTPLUG_BITS;
 721                 I915_WRITE(crt->adpa_reg, adpa);
 722                 POSTING_READ(crt->adpa_reg);
 723
 724                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 725                 crt->force_hotplug_required = 1;
 726         }
 727
 728 }
 729
 730 /*
 731  * Routines for controlling stuff on the analog port
 732  */
 733
 734 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 735         .reset = intel_crt_reset,
 736         .dpms = intel_crt_dpms,
 737         .detect = intel_crt_detect,
 738         .fill_modes = drm_helper_probe_single_connector_modes,
 739         .destroy = intel_crt_destroy,
 740         .set_property = intel_crt_set_property,
 741 };
 742
 743 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 744         .mode_valid = intel_crt_mode_valid,
 745         .get_modes = intel_crt_get_modes,
 746         .best_encoder = intel_best_encoder,
 747 };
 748
 749 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 750         .destroy = intel_encoder_destroy,
 751 };
 752
 753 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 754 {
 755         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 756         return 1;
 757 }
 758
 759 static const struct dmi_system_id intel_no_crt[] = {
 760         {
 761                 .callback = intel_no_crt_dmi_callback,
 762                 .ident = "ACER ZGB",
 763                 .matches = {
 764                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 765                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 766                 },
 767         },
 768         { }
 769 };
 770
 771 void intel_crt_init(struct drm_device *dev)
 772 {
 773         struct drm_connector *connector;
 774         struct intel_crt *crt;
 775         struct intel_connector *intel_connector;
 776         struct drm_i915_private *dev_priv = dev->dev_private;
 777
 778         /* Skip machines without VGA that falsely report hotplug events */
 779         if (dmi_check_system(intel_no_crt))
 780                 return;
 781
 782         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 783         if (!crt)
 784                 return;
 785
 786         intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
 787         if (!intel_connector) {
 788                 kfree(crt);
 789                 return;
 790         }
 791
 792         connector = &intel_connector->base;
 793         crt->connector = intel_connector;
 794         drm_connector_init(dev, &intel_connector->base,
 795                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 796
 797         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 798                          DRM_MODE_ENCODER_DAC);
 799
 800         intel_connector_attach_encoder(intel_connector, &crt->base);
 801
 802         crt->base.type = INTEL_OUTPUT_ANALOG;
 803         crt->base.cloneable = true;
 804         if (IS_I830(dev))
 805                 crt->base.crtc_mask = (1 << 0);
 806         else
 807                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 808
 809         if (IS_GEN2(dev))
 810                 connector->interlace_allowed = 0;
 811         else
 812                 connector->interlace_allowed = 1;
 813         connector->doublescan_allowed = 0;
 814
 815         if (HAS_PCH_SPLIT(dev))
 816                 crt->adpa_reg = PCH_ADPA;
 817         else if (IS_VALLEYVIEW(dev))
 818                 crt->adpa_reg = VLV_ADPA;
 819         else
 820                 crt->adpa_reg = ADPA;
 821
 822         crt->base.compute_config = intel_crt_compute_config;
 823         crt->base.mode_set = intel_crt_mode_set;
 824         crt->base.disable = intel_disable_crt;
 825         crt->base.enable = intel_enable_crt;
 826         if (I915_HAS_HOTPLUG(dev))
 827                 crt->base.hpd_pin = HPD_CRT;
 828         if (HAS_DDI(dev)) {
 829                 crt->base.get_config = hsw_crt_get_config;
 830                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 831         } else {
 832                 crt->base.get_config = intel_crt_get_config;
 833                 crt->base.get_hw_state = intel_crt_get_hw_state;
 834         }
 835         intel_connector->get_hw_state = intel_connector_get_hw_state;
 836
 837         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 838
 839         drm_sysfs_connector_add(connector);
 840
 841         if (!I915_HAS_HOTPLUG(dev))
 842                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 843
 844         /*
 845          * Configure the automatic hotplug detection stuff
 846          */
 847         crt->force_hotplug_required = 0;
 848
 849         /*
 850          * TODO: find a proper way to discover whether we need to set the the
 851          * polarity and link reversal bits or not, instead of relying on the
 852          * BIOS.
 853          */
 854         if (HAS_PCH_LPT(dev)) {
 855                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 856                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 857
 858                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 859         }
 860 }