drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __MDP4_KMS_H__
  19 #define __MDP4_KMS_H__
  20
  21 #include "msm_drv.h"
  22 #include "msm_kms.h"
  23 #include "mdp/mdp_kms.h"
  24 #include "mdp4.xml.h"
  25
  26 struct mdp4_kms {
  27         struct mdp_kms base;
  28
  29         struct drm_device *dev;
  30
  31         int rev;
  32
  33         /* mapper-id used to request GEM buffer mapped for scanout: */
  34         int id;
  35
  36         void __iomem *mmio;
  37
  38         struct regulator *dsi_pll_vdda;
  39         struct regulator *dsi_pll_vddio;
  40         struct regulator *vdd;
  41
  42         struct clk *clk;
  43         struct clk *pclk;
  44         struct clk *lut_clk;
  45
  46         struct mdp_irq error_handler;
  47 };
  48 #define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base)
  49
  50 /* platform config data (ie. from DT, or pdata) */
  51 struct mdp4_platform_config {
  52         struct iommu_domain *iommu;
  53         uint32_t max_clk;
  54 };
  55
  56 static inline void mdp4_write(struct mdp4_kms *mdp4_kms, u32 reg, u32 data)
  57 {
  58         msm_writel(data, mdp4_kms->mmio + reg);
  59 }
  60
  61 static inline u32 mdp4_read(struct mdp4_kms *mdp4_kms, u32 reg)
  62 {
  63         return msm_readl(mdp4_kms->mmio + reg);
  64 }
  65
  66 static inline uint32_t pipe2flush(enum mdp4_pipe pipe)
  67 {
  68         switch (pipe) {
  69         case VG1:      return MDP4_OVERLAY_FLUSH_VG1;
  70         case VG2:      return MDP4_OVERLAY_FLUSH_VG2;
  71         case RGB1:     return MDP4_OVERLAY_FLUSH_RGB1;
  72         case RGB2:     return MDP4_OVERLAY_FLUSH_RGB1;
  73         default:       return 0;
  74         }
  75 }
  76
  77 static inline uint32_t ovlp2flush(int ovlp)
  78 {
  79         switch (ovlp) {
  80         case 0:        return MDP4_OVERLAY_FLUSH_OVLP0;
  81         case 1:        return MDP4_OVERLAY_FLUSH_OVLP1;
  82         default:       return 0;
  83         }
  84 }
  85
  86 static inline uint32_t dma2irq(enum mdp4_dma dma)
  87 {
  88         switch (dma) {
  89         case DMA_P:    return MDP4_IRQ_DMA_P_DONE;
  90         case DMA_S:    return MDP4_IRQ_DMA_S_DONE;
  91         case DMA_E:    return MDP4_IRQ_DMA_E_DONE;
  92         default:       return 0;
  93         }
  94 }
  95
  96 static inline uint32_t dma2err(enum mdp4_dma dma)
  97 {
  98         switch (dma) {
  99         case DMA_P:    return MDP4_IRQ_PRIMARY_INTF_UDERRUN;
 100         case DMA_S:    return 0;  // ???
 101         case DMA_E:    return MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
 102         default:       return 0;
 103         }
 104 }
 105
 106 static inline uint32_t mixercfg(int mixer, enum mdp4_pipe pipe,
 107                 enum mdp_mixer_stage_id stage)
 108 {
 109         uint32_t mixer_cfg = 0;
 110
 111         switch (pipe) {
 112         case VG1:
 113                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE0(stage) |
 114                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE0_MIXER1);
 115                 break;
 116         case VG2:
 117                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE1(stage) |
 118                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE1_MIXER1);
 119                 break;
 120         case RGB1:
 121                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE2(stage) |
 122                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE2_MIXER1);
 123                 break;
 124         case RGB2:
 125                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE3(stage) |
 126                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE3_MIXER1);
 127                 break;
 128         case RGB3:
 129                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE4(stage) |
 130                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE4_MIXER1);
 131                 break;
 132         case VG3:
 133                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE5(stage) |
 134                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE5_MIXER1);
 135                 break;
 136         case VG4:
 137                 mixer_cfg = MDP4_LAYERMIXER_IN_CFG_PIPE6(stage) |
 138                         COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE6_MIXER1);
 139                 break;
 140         default:
 141                 WARN_ON("invalid pipe");
 142                 break;
 143         }
 144
 145         return mixer_cfg;
 146 }
 147
 148 int mdp4_disable(struct mdp4_kms *mdp4_kms);
 149 int mdp4_enable(struct mdp4_kms *mdp4_kms);
 150
 151 void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask);
 152 void mdp4_irq_preinstall(struct msm_kms *kms);
 153 int mdp4_irq_postinstall(struct msm_kms *kms);
 154 void mdp4_irq_uninstall(struct msm_kms *kms);
 155 irqreturn_t mdp4_irq(struct msm_kms *kms);
 156 int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
 157 void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
 158
 159 static inline
 160 uint32_t mdp4_get_formats(enum mdp4_pipe pipe_id, uint32_t *pixel_formats,
 161                 uint32_t max_formats)
 162 {
 163         /* TODO when we have YUV, we need to filter supported formats
 164          * based on pipe_id..
 165          */
 166         return mdp_get_formats(pixel_formats, max_formats);
 167 }
 168
 169 void mdp4_plane_install_properties(struct drm_plane *plane,
 170                 struct drm_mode_object *obj);
 171 void mdp4_plane_set_scanout(struct drm_plane *plane,
 172                 struct drm_framebuffer *fb);
 173 int mdp4_plane_mode_set(struct drm_plane *plane,
 174                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
 175                 int crtc_x, int crtc_y,
 176                 unsigned int crtc_w, unsigned int crtc_h,
 177                 uint32_t src_x, uint32_t src_y,
 178                 uint32_t src_w, uint32_t src_h);
 179 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane);
 180 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
 181                 enum mdp4_pipe pipe_id, bool private_plane);
 182
 183 uint32_t mdp4_crtc_vblank(struct drm_crtc *crtc);
 184 void mdp4_crtc_cancel_pending_flip(struct drm_crtc *crtc, struct drm_file *file);
 185 void mdp4_crtc_set_config(struct drm_crtc *crtc, uint32_t config);
 186 void mdp4_crtc_set_intf(struct drm_crtc *crtc, enum mdp4_intf intf);
 187 void mdp4_crtc_attach(struct drm_crtc *crtc, struct drm_plane *plane);
 188 void mdp4_crtc_detach(struct drm_crtc *crtc, struct drm_plane *plane);
 189 struct drm_crtc *mdp4_crtc_init(struct drm_device *dev,
 190                 struct drm_plane *plane, int id, int ovlp_id,
 191                 enum mdp4_dma dma_id);
 192
 193 long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate);
 194 struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev);
 195
 196 #ifdef CONFIG_MSM_BUS_SCALING
 197 static inline int match_dev_name(struct device *dev, void *data)
 198 {
 199         return !strcmp(dev_name(dev), data);
 200 }
 201 /* bus scaling data is associated with extra pointless platform devices,
 202  * "dtv", etc.. this is a bit of a hack, but we need a way for encoders
 203  * to find their pdata to make the bus-scaling stuff work.
 204  */
 205 static inline void *mdp4_find_pdata(const char *devname)
 206 {
 207         struct device *dev;
 208         dev = bus_find_device(&platform_bus_type, NULL,
 209                         (void *)devname, match_dev_name);
 210         return dev ? dev->platform_data : NULL;
 211 }
 212 #endif
 213
 214 #endif /* __MDP4_KMS_H__ */