PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / gpu / drm / omapdrm / omap_drv.c
blobbf39fcc49e0f181ddcbf340632fa4f77c8b1bb10
1 /*
2 * drivers/gpu/drm/omapdrm/omap_drv.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "omap_drv.h"
22 #include "drm_crtc_helper.h"
23 #include "drm_fb_helper.h"
24 #include "omap_dmm_tiler.h"
26 #define DRIVER_NAME MODULE_NAME
27 #define DRIVER_DESC "OMAP DRM"
28 #define DRIVER_DATE "20110917"
29 #define DRIVER_MAJOR 1
30 #define DRIVER_MINOR 0
31 #define DRIVER_PATCHLEVEL 0
33 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
35 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36 module_param(num_crtc, int, 0600);
39 * mode config funcs
42 /* Notes about mapping DSS and DRM entities:
43 * CRTC: overlay
44 * encoder: manager.. with some extension to allow one primary CRTC
45 * and zero or more video CRTC's to be mapped to one encoder?
46 * connector: dssdev.. manager can be attached/detached from different
47 * devices
50 static void omap_fb_output_poll_changed(struct drm_device *dev)
52 struct omap_drm_private *priv = dev->dev_private;
53 DBG("dev=%p", dev);
54 if (priv->fbdev)
55 drm_fb_helper_hotplug_event(priv->fbdev);
58 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
59 .fb_create = omap_framebuffer_create,
60 .output_poll_changed = omap_fb_output_poll_changed,
63 static int get_connector_type(struct omap_dss_device *dssdev)
65 switch (dssdev->type) {
66 case OMAP_DISPLAY_TYPE_HDMI:
67 return DRM_MODE_CONNECTOR_HDMIA;
68 case OMAP_DISPLAY_TYPE_DVI:
69 return DRM_MODE_CONNECTOR_DVID;
70 default:
71 return DRM_MODE_CONNECTOR_Unknown;
75 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
77 struct omap_drm_private *priv = dev->dev_private;
78 int i;
80 for (i = 0; i < priv->num_crtcs; i++) {
81 struct drm_crtc *crtc = priv->crtcs[i];
83 if (omap_crtc_channel(crtc) == channel)
84 return true;
87 return false;
89 static void omap_disconnect_dssdevs(void)
91 struct omap_dss_device *dssdev = NULL;
93 for_each_dss_dev(dssdev)
94 dssdev->driver->disconnect(dssdev);
97 static int omap_connect_dssdevs(void)
99 int r;
100 struct omap_dss_device *dssdev = NULL;
101 bool no_displays = true;
103 for_each_dss_dev(dssdev) {
104 r = dssdev->driver->connect(dssdev);
105 if (r == -EPROBE_DEFER) {
106 omap_dss_put_device(dssdev);
107 goto cleanup;
108 } else if (r) {
109 dev_warn(dssdev->dev, "could not connect display: %s\n",
110 dssdev->name);
111 } else {
112 no_displays = false;
116 if (no_displays)
117 return -EPROBE_DEFER;
119 return 0;
121 cleanup:
123 * if we are deferring probe, we disconnect the devices we previously
124 * connected
126 omap_disconnect_dssdevs();
128 return r;
131 static int omap_modeset_init(struct drm_device *dev)
133 struct omap_drm_private *priv = dev->dev_private;
134 struct omap_dss_device *dssdev = NULL;
135 int num_ovls = dss_feat_get_num_ovls();
136 int num_mgrs = dss_feat_get_num_mgrs();
137 int num_crtcs;
138 int i, id = 0;
140 drm_mode_config_init(dev);
142 omap_drm_irq_install(dev);
145 * We usually don't want to create a CRTC for each manager, at least
146 * not until we have a way to expose private planes to userspace.
147 * Otherwise there would not be enough video pipes left for drm planes.
148 * We use the num_crtc argument to limit the number of crtcs we create.
150 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
152 dssdev = NULL;
154 for_each_dss_dev(dssdev) {
155 struct drm_connector *connector;
156 struct drm_encoder *encoder;
157 enum omap_channel channel;
158 struct omap_overlay_manager *mgr;
160 if (!omapdss_device_is_connected(dssdev))
161 continue;
163 encoder = omap_encoder_init(dev, dssdev);
165 if (!encoder) {
166 dev_err(dev->dev, "could not create encoder: %s\n",
167 dssdev->name);
168 return -ENOMEM;
171 connector = omap_connector_init(dev,
172 get_connector_type(dssdev), dssdev, encoder);
174 if (!connector) {
175 dev_err(dev->dev, "could not create connector: %s\n",
176 dssdev->name);
177 return -ENOMEM;
180 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
181 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
183 priv->encoders[priv->num_encoders++] = encoder;
184 priv->connectors[priv->num_connectors++] = connector;
186 drm_mode_connector_attach_encoder(connector, encoder);
189 * if we have reached the limit of the crtcs we are allowed to
190 * create, let's not try to look for a crtc for this
191 * panel/encoder and onwards, we will, of course, populate the
192 * the possible_crtcs field for all the encoders with the final
193 * set of crtcs we create
195 if (id == num_crtcs)
196 continue;
199 * get the recommended DISPC channel for this encoder. For now,
200 * we only try to get create a crtc out of the recommended, the
201 * other possible channels to which the encoder can connect are
202 * not considered.
205 mgr = omapdss_find_mgr_from_display(dssdev);
206 channel = mgr->id;
208 * if this channel hasn't already been taken by a previously
209 * allocated crtc, we create a new crtc for it
211 if (!channel_used(dev, channel)) {
212 struct drm_plane *plane;
213 struct drm_crtc *crtc;
215 plane = omap_plane_init(dev, id, true);
216 crtc = omap_crtc_init(dev, plane, channel, id);
218 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
219 priv->crtcs[id] = crtc;
220 priv->num_crtcs++;
222 priv->planes[id] = plane;
223 priv->num_planes++;
225 id++;
230 * we have allocated crtcs according to the need of the panels/encoders,
231 * adding more crtcs here if needed
233 for (; id < num_crtcs; id++) {
235 /* find a free manager for this crtc */
236 for (i = 0; i < num_mgrs; i++) {
237 if (!channel_used(dev, i)) {
238 struct drm_plane *plane;
239 struct drm_crtc *crtc;
241 plane = omap_plane_init(dev, id, true);
242 crtc = omap_crtc_init(dev, plane, i, id);
244 BUG_ON(priv->num_crtcs >=
245 ARRAY_SIZE(priv->crtcs));
247 priv->crtcs[id] = crtc;
248 priv->num_crtcs++;
250 priv->planes[id] = plane;
251 priv->num_planes++;
253 break;
254 } else {
255 continue;
259 if (i == num_mgrs) {
260 /* this shouldn't really happen */
261 dev_err(dev->dev, "no managers left for crtc\n");
262 return -ENOMEM;
267 * Create normal planes for the remaining overlays:
269 for (; id < num_ovls; id++) {
270 struct drm_plane *plane = omap_plane_init(dev, id, false);
272 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
273 priv->planes[priv->num_planes++] = plane;
276 for (i = 0; i < priv->num_encoders; i++) {
277 struct drm_encoder *encoder = priv->encoders[i];
278 struct omap_dss_device *dssdev =
279 omap_encoder_get_dssdev(encoder);
280 struct omap_dss_device *output;
282 output = omapdss_find_output_from_display(dssdev);
284 /* figure out which crtc's we can connect the encoder to: */
285 encoder->possible_crtcs = 0;
286 for (id = 0; id < priv->num_crtcs; id++) {
287 struct drm_crtc *crtc = priv->crtcs[id];
288 enum omap_channel crtc_channel;
289 enum omap_dss_output_id supported_outputs;
291 crtc_channel = omap_crtc_channel(crtc);
292 supported_outputs =
293 dss_feat_get_supported_outputs(crtc_channel);
295 if (supported_outputs & output->id)
296 encoder->possible_crtcs |= (1 << id);
299 omap_dss_put_device(output);
302 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
303 priv->num_planes, priv->num_crtcs, priv->num_encoders,
304 priv->num_connectors);
306 dev->mode_config.min_width = 32;
307 dev->mode_config.min_height = 32;
309 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
310 * to fill in these limits properly on different OMAP generations..
312 dev->mode_config.max_width = 2048;
313 dev->mode_config.max_height = 2048;
315 dev->mode_config.funcs = &omap_mode_config_funcs;
317 return 0;
320 static void omap_modeset_free(struct drm_device *dev)
322 drm_mode_config_cleanup(dev);
326 * drm ioctl funcs
330 static int ioctl_get_param(struct drm_device *dev, void *data,
331 struct drm_file *file_priv)
333 struct omap_drm_private *priv = dev->dev_private;
334 struct drm_omap_param *args = data;
336 DBG("%p: param=%llu", dev, args->param);
338 switch (args->param) {
339 case OMAP_PARAM_CHIPSET_ID:
340 args->value = priv->omaprev;
341 break;
342 default:
343 DBG("unknown parameter %lld", args->param);
344 return -EINVAL;
347 return 0;
350 static int ioctl_set_param(struct drm_device *dev, void *data,
351 struct drm_file *file_priv)
353 struct drm_omap_param *args = data;
355 switch (args->param) {
356 default:
357 DBG("unknown parameter %lld", args->param);
358 return -EINVAL;
361 return 0;
364 static int ioctl_gem_new(struct drm_device *dev, void *data,
365 struct drm_file *file_priv)
367 struct drm_omap_gem_new *args = data;
368 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
369 args->size.bytes, args->flags);
370 return omap_gem_new_handle(dev, file_priv, args->size,
371 args->flags, &args->handle);
374 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
375 struct drm_file *file_priv)
377 struct drm_omap_gem_cpu_prep *args = data;
378 struct drm_gem_object *obj;
379 int ret;
381 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
383 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
384 if (!obj)
385 return -ENOENT;
387 ret = omap_gem_op_sync(obj, args->op);
389 if (!ret)
390 ret = omap_gem_op_start(obj, args->op);
392 drm_gem_object_unreference_unlocked(obj);
394 return ret;
397 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
398 struct drm_file *file_priv)
400 struct drm_omap_gem_cpu_fini *args = data;
401 struct drm_gem_object *obj;
402 int ret;
404 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
406 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
407 if (!obj)
408 return -ENOENT;
410 /* XXX flushy, flushy */
411 ret = 0;
413 if (!ret)
414 ret = omap_gem_op_finish(obj, args->op);
416 drm_gem_object_unreference_unlocked(obj);
418 return ret;
421 static int ioctl_gem_info(struct drm_device *dev, void *data,
422 struct drm_file *file_priv)
424 struct drm_omap_gem_info *args = data;
425 struct drm_gem_object *obj;
426 int ret = 0;
428 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
430 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
431 if (!obj)
432 return -ENOENT;
434 args->size = omap_gem_mmap_size(obj);
435 args->offset = omap_gem_mmap_offset(obj);
437 drm_gem_object_unreference_unlocked(obj);
439 return ret;
442 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
443 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
444 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
445 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
446 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
447 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
448 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
452 * drm driver funcs
456 * load - setup chip and create an initial config
457 * @dev: DRM device
458 * @flags: startup flags
460 * The driver load routine has to do several things:
461 * - initialize the memory manager
462 * - allocate initial config memory
463 * - setup the DRM framebuffer with the allocated memory
465 static int dev_load(struct drm_device *dev, unsigned long flags)
467 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
468 struct omap_drm_private *priv;
469 int ret;
471 DBG("load: dev=%p", dev);
473 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
474 if (!priv)
475 return -ENOMEM;
477 priv->omaprev = pdata->omaprev;
479 dev->dev_private = priv;
481 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
483 INIT_LIST_HEAD(&priv->obj_list);
485 omap_gem_init(dev);
487 ret = omap_modeset_init(dev);
488 if (ret) {
489 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
490 dev->dev_private = NULL;
491 kfree(priv);
492 return ret;
495 ret = drm_vblank_init(dev, priv->num_crtcs);
496 if (ret)
497 dev_warn(dev->dev, "could not init vblank\n");
499 priv->fbdev = omap_fbdev_init(dev);
500 if (!priv->fbdev) {
501 dev_warn(dev->dev, "omap_fbdev_init failed\n");
502 /* well, limp along without an fbdev.. maybe X11 will work? */
505 /* store off drm_device for use in pm ops */
506 dev_set_drvdata(dev->dev, dev);
508 drm_kms_helper_poll_init(dev);
510 return 0;
513 static int dev_unload(struct drm_device *dev)
515 struct omap_drm_private *priv = dev->dev_private;
517 DBG("unload: dev=%p", dev);
519 drm_kms_helper_poll_fini(dev);
521 omap_fbdev_free(dev);
522 omap_modeset_free(dev);
523 omap_gem_deinit(dev);
525 destroy_workqueue(priv->wq);
527 drm_vblank_cleanup(dev);
528 omap_drm_irq_uninstall(dev);
530 kfree(dev->dev_private);
531 dev->dev_private = NULL;
533 dev_set_drvdata(dev->dev, NULL);
535 return 0;
538 static int dev_open(struct drm_device *dev, struct drm_file *file)
540 file->driver_priv = NULL;
542 DBG("open: dev=%p, file=%p", dev, file);
544 return 0;
548 * lastclose - clean up after all DRM clients have exited
549 * @dev: DRM device
551 * Take care of cleaning up after all DRM clients have exited. In the
552 * mode setting case, we want to restore the kernel's initial mode (just
553 * in case the last client left us in a bad state).
555 static void dev_lastclose(struct drm_device *dev)
557 int i;
559 /* we don't support vga-switcheroo.. so just make sure the fbdev
560 * mode is active
562 struct omap_drm_private *priv = dev->dev_private;
563 int ret;
565 DBG("lastclose: dev=%p", dev);
567 if (priv->rotation_prop) {
568 /* need to restore default rotation state.. not sure
569 * if there is a cleaner way to restore properties to
570 * default state? Maybe a flag that properties should
571 * automatically be restored to default state on
572 * lastclose?
574 for (i = 0; i < priv->num_crtcs; i++) {
575 drm_object_property_set_value(&priv->crtcs[i]->base,
576 priv->rotation_prop, 0);
579 for (i = 0; i < priv->num_planes; i++) {
580 drm_object_property_set_value(&priv->planes[i]->base,
581 priv->rotation_prop, 0);
585 drm_modeset_lock_all(dev);
586 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
587 drm_modeset_unlock_all(dev);
588 if (ret)
589 DBG("failed to restore crtc mode");
592 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
594 DBG("preclose: dev=%p", dev);
597 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
599 DBG("postclose: dev=%p, file=%p", dev, file);
602 static const struct vm_operations_struct omap_gem_vm_ops = {
603 .fault = omap_gem_fault,
604 .open = drm_gem_vm_open,
605 .close = drm_gem_vm_close,
608 static const struct file_operations omapdriver_fops = {
609 .owner = THIS_MODULE,
610 .open = drm_open,
611 .unlocked_ioctl = drm_ioctl,
612 .release = drm_release,
613 .mmap = omap_gem_mmap,
614 .poll = drm_poll,
615 .read = drm_read,
616 .llseek = noop_llseek,
619 static struct drm_driver omap_drm_driver = {
620 .driver_features =
621 DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
622 .load = dev_load,
623 .unload = dev_unload,
624 .open = dev_open,
625 .lastclose = dev_lastclose,
626 .preclose = dev_preclose,
627 .postclose = dev_postclose,
628 .get_vblank_counter = drm_vblank_count,
629 .enable_vblank = omap_irq_enable_vblank,
630 .disable_vblank = omap_irq_disable_vblank,
631 .irq_preinstall = omap_irq_preinstall,
632 .irq_postinstall = omap_irq_postinstall,
633 .irq_uninstall = omap_irq_uninstall,
634 .irq_handler = omap_irq_handler,
635 #ifdef CONFIG_DEBUG_FS
636 .debugfs_init = omap_debugfs_init,
637 .debugfs_cleanup = omap_debugfs_cleanup,
638 #endif
639 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
640 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
641 .gem_prime_export = omap_gem_prime_export,
642 .gem_prime_import = omap_gem_prime_import,
643 .gem_free_object = omap_gem_free_object,
644 .gem_vm_ops = &omap_gem_vm_ops,
645 .dumb_create = omap_gem_dumb_create,
646 .dumb_map_offset = omap_gem_dumb_map_offset,
647 .dumb_destroy = drm_gem_dumb_destroy,
648 .ioctls = ioctls,
649 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
650 .fops = &omapdriver_fops,
651 .name = DRIVER_NAME,
652 .desc = DRIVER_DESC,
653 .date = DRIVER_DATE,
654 .major = DRIVER_MAJOR,
655 .minor = DRIVER_MINOR,
656 .patchlevel = DRIVER_PATCHLEVEL,
659 static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
661 DBG("");
662 return 0;
665 static int pdev_resume(struct platform_device *device)
667 DBG("");
668 return 0;
671 static void pdev_shutdown(struct platform_device *device)
673 DBG("");
676 static int pdev_probe(struct platform_device *device)
678 int r;
680 if (omapdss_is_initialized() == false)
681 return -EPROBE_DEFER;
683 omap_crtc_pre_init();
685 r = omap_connect_dssdevs();
686 if (r) {
687 omap_crtc_pre_uninit();
688 return r;
691 DBG("%s", device->name);
692 return drm_platform_init(&omap_drm_driver, device);
695 static int pdev_remove(struct platform_device *device)
697 DBG("");
699 omap_disconnect_dssdevs();
700 omap_crtc_pre_uninit();
702 drm_put_dev(platform_get_drvdata(device));
703 return 0;
706 #ifdef CONFIG_PM
707 static const struct dev_pm_ops omapdrm_pm_ops = {
708 .resume = omap_gem_resume,
710 #endif
712 static struct platform_driver pdev = {
713 .driver = {
714 .name = DRIVER_NAME,
715 .owner = THIS_MODULE,
716 #ifdef CONFIG_PM
717 .pm = &omapdrm_pm_ops,
718 #endif
720 .probe = pdev_probe,
721 .remove = pdev_remove,
722 .suspend = pdev_suspend,
723 .resume = pdev_resume,
724 .shutdown = pdev_shutdown,
727 static int __init omap_drm_init(void)
729 DBG("init");
730 if (platform_driver_register(&omap_dmm_driver)) {
731 /* we can continue on without DMM.. so not fatal */
732 dev_err(NULL, "DMM registration failed\n");
734 return platform_driver_register(&pdev);
737 static void __exit omap_drm_fini(void)
739 DBG("fini");
740 platform_driver_unregister(&pdev);
743 /* need late_initcall() so we load after dss_driver's are loaded */
744 late_initcall(omap_drm_init);
745 module_exit(omap_drm_fini);
747 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
748 MODULE_DESCRIPTION("OMAP DRM Display Driver");
749 MODULE_ALIAS("platform:" DRIVER_NAME);
750 MODULE_LICENSE("GPL v2");